From patchwork Tue Feb 16 20:35:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Boyer X-Patchwork-Id: 87953 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8D516A054D; Tue, 16 Feb 2021 21:37:23 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6E9A4160800; Tue, 16 Feb 2021 21:36:17 +0100 (CET) Received: from mail-pj1-f51.google.com (mail-pj1-f51.google.com [209.85.216.51]) by mails.dpdk.org (Postfix) with ESMTP id BB2441607C4 for ; Tue, 16 Feb 2021 21:36:13 +0100 (CET) Received: by mail-pj1-f51.google.com with SMTP id l18so33984pji.3 for ; Tue, 16 Feb 2021 12:36:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pensando.io; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=QeNNymWUPKDtzMw83UcjDh/XmwFbM156RAu7l4XrryE=; b=BhYE/3VdbuUEvs2WDe3PCx/E4TaNHmaG/5c4xfRBYeHgqRFPFK5YW3AESgH5WdOYOg GeJmXEdeOnnY+Bv1V1q4hn9QTHjRfZzBfoBIaOt5Cyz5DsfVIEd2Cd0+ZGeTXCi9Wnag AR4cEnC3lk1pRlkxUW3oH0W0m845q8Jyu3LLfwM/3gadfdEY3HT0UnCxiPASp8Iozs7S mXFgpYeB4dHZUE1HgqQwK7NoHzT0fq83/K7FG1otnYxTDoQ/zaA70eV7fsz6iCmRM+Fn LG86btgsZIcOf+VRcew9dUzkCnSVG5INo8lU+Qq04kdil1sQRu7Gw3saFzLpw3S0Kg9+ p47Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=QeNNymWUPKDtzMw83UcjDh/XmwFbM156RAu7l4XrryE=; b=KZ0dd5nbnIQIkqOQHe86zTf9ZdYSPoZHNvN9eOQwZSU3LkM0pLq/JFFFw7tzjdFpY6 7n1Mttl1vTzeHPlCy7bqD3dHLnYwUU821TB62Oxta9PgMpPLLbrwmyGr4xWUTPhCwo4z +wHSV9tPSrgBMC8Dp8GwafZEkkyac4L96Gbj5IyL8m3Pe8Hyh5feEpv0H3IdIjtFVYk/ o65PAiUhJPkEu1VyfO7Z/2DNTtzV3M4RVfqiIWuLyG5B6oxbbDivvQ6HCrHyeaItC5fp ZyADssh6SiX4YkqwjMwodn+97fnYZxA8VAmS0AgWtFslZWDi4koGn3jOrvVgqu4CINCu ZSGg== X-Gm-Message-State: AOAM533hko2IbP670PQ9LzFyeW5fRO696aL308++ZT0qZ8I3mj1YUG0m qQUnJqrPPHXOS7tMLatNaT6OqYsFoAwVqw== X-Google-Smtp-Source: ABdhPJz2VPDm2scQcwEUy+RbQ09pi2shh1BVsYDj20kTgtr0dMYo9Cn7hZPe1SdpvE2sr4Le7L+z9Q== X-Received: by 2002:a17:90b:198c:: with SMTP id mv12mr5812411pjb.25.1613507772801; Tue, 16 Feb 2021 12:36:12 -0800 (PST) Received: from driver-dev1.pensando.io ([12.226.153.42]) by smtp.gmail.com with ESMTPSA id u17sm11371pgh.72.2021.02.16.12.36.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Feb 2021 12:36:12 -0800 (PST) From: Andrew Boyer To: dev@dpdk.org Cc: Alfredo Cardigliano , Andrew Boyer Date: Tue, 16 Feb 2021 12:35:39 -0800 Message-Id: <20210216203540.29290-15-aboyer@pensando.io> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210216203540.29290-1-aboyer@pensando.io> References: <20210216203540.29290-1-aboyer@pensando.io> In-Reply-To: <20210204195853.13411-1-aboyer@pensando.io> References: <20210204195853.13411-1-aboyer@pensando.io> Subject: [dpdk-dev] [PATCH v2 14/15] net/ionic: store Tx fragment limit in queue X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" A future patch will allow Tx scatter/gather to be disabled. Store the value in the queue so it can be changed at runtime based on the configuration. Signed-off-by: Andrew Boyer --- drivers/net/ionic/ionic_lif.c | 6 +++++- drivers/net/ionic/ionic_lif.h | 1 + drivers/net/ionic/ionic_rxtx.c | 6 +++--- 3 files changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c index dd79068948..b8023e0632 100644 --- a/drivers/net/ionic/ionic_lif.c +++ b/drivers/net/ionic/ionic_lif.c @@ -757,10 +757,13 @@ ionic_tx_qcq_alloc(struct ionic_lif *lif, uint32_t socket_id, uint32_t index, uint16_t ntxq_descs, struct ionic_tx_qcq **txq_out) { struct ionic_tx_qcq *txq; - uint16_t flags; + uint16_t flags, num_segs_fw; int err; flags = IONIC_QCQ_F_SG; + + num_segs_fw = IONIC_TX_MAX_SG_ELEMS_V1 + 1; + err = ionic_qcq_alloc(lif, IONIC_QTYPE_TXQ, sizeof(struct ionic_tx_qcq), @@ -777,6 +780,7 @@ ionic_tx_qcq_alloc(struct ionic_lif *lif, uint32_t socket_id, uint32_t index, return err; txq->flags = flags; + txq->num_segs_fw = num_segs_fw; lif->txqcqs[index] = txq; *txq_out = txq; diff --git a/drivers/net/ionic/ionic_lif.h b/drivers/net/ionic/ionic_lif.h index 5885aa1546..9f00ba2973 100644 --- a/drivers/net/ionic/ionic_lif.h +++ b/drivers/net/ionic/ionic_lif.h @@ -92,6 +92,7 @@ struct ionic_tx_qcq { struct ionic_qcq qcq; /* cacheline2 */ + uint16_t num_segs_fw; /* # segs supported by current FW */ uint16_t flags; struct ionic_tx_stats stats; diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c index b4bdeabad1..b83ea1bcaa 100644 --- a/drivers/net/ionic/ionic_rxtx.c +++ b/drivers/net/ionic/ionic_rxtx.c @@ -598,9 +598,9 @@ ionic_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, (PKT_TX_OFFLOAD_MASK ^ IONIC_TX_OFFLOAD_MASK) uint16_t -ionic_prep_pkts(void *tx_queue __rte_unused, struct rte_mbuf **tx_pkts, - uint16_t nb_pkts) +ionic_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) { + struct ionic_tx_qcq *txq = tx_queue; struct rte_mbuf *txm; uint64_t offloads; int i = 0; @@ -608,7 +608,7 @@ ionic_prep_pkts(void *tx_queue __rte_unused, struct rte_mbuf **tx_pkts, for (i = 0; i < nb_pkts; i++) { txm = tx_pkts[i]; - if (txm->nb_segs > IONIC_TX_MAX_SG_ELEMS_V1 + 1) { + if (txm->nb_segs > txq->num_segs_fw) { rte_errno = -EINVAL; break; }