[v5,03/11] net/octeontx_ep: add device init and uninit
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Commit Message
Add basic init and uninit function which includes
initializing fields of ethdev private structure.
Signed-off-by: Nalla Pradeep <pnalla@marvell.com>
---
drivers/common/octeontx2/otx2_common.h | 2 +-
drivers/net/octeontx_ep/otx_ep_common.h | 19 ++++++-
drivers/net/octeontx_ep/otx_ep_ethdev.c | 72 +++++++++++++++++++++++--
3 files changed, 86 insertions(+), 7 deletions(-)
Comments
On 1/28/2021 3:22 PM, Nalla Pradeep wrote:
> Add basic init and uninit function which includes
> initializing fields of ethdev private structure.
>
> Signed-off-by: Nalla Pradeep <pnalla@marvell.com>
> ---
> drivers/common/octeontx2/otx2_common.h | 2 +-
> drivers/net/octeontx_ep/otx_ep_common.h | 19 ++++++-
> drivers/net/octeontx_ep/otx_ep_ethdev.c | 72 +++++++++++++++++++++++--
> 3 files changed, 86 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/common/octeontx2/otx2_common.h b/drivers/common/octeontx2/otx2_common.h
> index 96021eda2..cd52e098e 100644
> --- a/drivers/common/octeontx2/otx2_common.h
> +++ b/drivers/common/octeontx2/otx2_common.h
> @@ -136,7 +136,7 @@ extern int otx2_logtype_ree;
> #define PCI_DEVID_OCTEONTX2_RVU_CPT_VF 0xA0FE
> #define PCI_DEVID_OCTEONTX2_RVU_AF_VF 0xA0f8
> #define PCI_DEVID_OCTEONTX2_DPI_VF 0xA081
> -#define PCI_DEVID_OCTEONTX2_EP_VF 0xB203 /* OCTEON TX2 EP mode */
> +#define PCI_DEVID_OCTEONTX2_EP_NET_VF 0xB203 /* OCTEON TX2 EP mode */
Hi Nalla,
Can you prepare a patch as a first patch of your series, that
1) renames 'PCI_DEVID_OCTEONTX2_EP_VF' -> 'PCI_DEVID_OCTEONTX2_EP_NET_VF'
2) adds 'PCI_DEVID_OCTEONTX2_EP_RAW_VF'
And does required driver changes for above.
Since that change requires update in the existing driver, 'raw/octeontx2_ep',
better to get it out of way before 'net/octeontx_ep' changes, instead of
spreading this into the 'net/octeontx_ep' patches.
What do you think?
> /* OCTEON TX2 98xx EP mode */
> #define PCI_DEVID_CN98XX_EP_NET_VF 0xB103
> #define PCI_DEVID_OCTEONTX2_EP_RAW_VF 0xB204 /* OCTEON TX2 EP mode */
> diff --git a/drivers/net/octeontx_ep/otx_ep_common.h b/drivers/net/octeontx_ep/otx_ep_common.h
> index 35ea99a79..0d6484c87 100644
> --- a/drivers/net/octeontx_ep/otx_ep_common.h
> +++ b/drivers/net/octeontx_ep/otx_ep_common.h
> @@ -4,11 +4,28 @@
> #ifndef _OTX_EP_COMMON_H_
> #define _OTX_EP_COMMON_H_
>
> +#define otx_ep_info(fmt, args...) \
> + RTE_LOG(INFO, PMD, fmt "\n", ## args)
> +
> +#define otx_ep_err(fmt, args...) \
> + RTE_LOG(ERR, PMD, "%s():%u " fmt "\n", \
> + __func__, __LINE__, ## args)
Below is using new log type, 'otx_net_ep_logtype', but why above two, 'info' &
'err' types continue to use 'RTE_LOGTYPE_PMD'?
Can you switch them to new log type please?
> +
> +#define otx_ep_dbg(fmt, args...) \
> + rte_log(RTE_LOG_DEBUG, otx_net_ep_logtype, \
> + "%s():%u " fmt "\n", \
> + __func__, __LINE__, ##args)
> +
I think you need to move 'RTE_LOG_REGISTER' into this patch, that macro creates
the 'otx_net_ep_logtype' logtype variable. Currently that macro is in next patch.
<...>
> static int
> otx_ep_eth_dev_init(struct rte_eth_dev *eth_dev)
> {
> - RTE_SET_USED(eth_dev);
> + struct rte_pci_device *pdev = RTE_ETH_DEV_TO_PCI(eth_dev);
> + struct otx_ep_device *otx_epvf = OTX_EP_DEV(eth_dev);
> + struct rte_ether_addr vf_mac_addr;
> +
> + /* Single process support */
> + if (rte_eal_process_type() != RTE_PROC_PRIMARY)
> + return 0;
> +
> + otx_epvf->eth_dev = eth_dev;
> + otx_epvf->port_id = eth_dev->data->port_id;
> + eth_dev->data->mac_addrs = rte_zmalloc("otx_ep", RTE_ETHER_ADDR_LEN, 0);
> + if (eth_dev->data->mac_addrs == NULL) {
> + otx_ep_err("MAC addresses memory allocation failed\n");
> + return -ENOMEM;
> + }
> + rte_eth_random_addr(vf_mac_addr.addr_bytes);
> + rte_ether_addr_copy(eth_dev->data->mac_addrs, &vf_mac_addr);
The API is 'rte_ether_addr_copy(from, to)', _unfortunately it is reverse of the
more standard (dst, src) order_, can parameters be used wrong above?
@@ -136,7 +136,7 @@ extern int otx2_logtype_ree;
#define PCI_DEVID_OCTEONTX2_RVU_CPT_VF 0xA0FE
#define PCI_DEVID_OCTEONTX2_RVU_AF_VF 0xA0f8
#define PCI_DEVID_OCTEONTX2_DPI_VF 0xA081
-#define PCI_DEVID_OCTEONTX2_EP_VF 0xB203 /* OCTEON TX2 EP mode */
+#define PCI_DEVID_OCTEONTX2_EP_NET_VF 0xB203 /* OCTEON TX2 EP mode */
/* OCTEON TX2 98xx EP mode */
#define PCI_DEVID_CN98XX_EP_NET_VF 0xB103
#define PCI_DEVID_OCTEONTX2_EP_RAW_VF 0xB204 /* OCTEON TX2 EP mode */
@@ -4,11 +4,28 @@
#ifndef _OTX_EP_COMMON_H_
#define _OTX_EP_COMMON_H_
+#define otx_ep_info(fmt, args...) \
+ RTE_LOG(INFO, PMD, fmt "\n", ## args)
+
+#define otx_ep_err(fmt, args...) \
+ RTE_LOG(ERR, PMD, "%s():%u " fmt "\n", \
+ __func__, __LINE__, ## args)
+
+#define otx_ep_dbg(fmt, args...) \
+ rte_log(RTE_LOG_DEBUG, otx_net_ep_logtype, \
+ "%s():%u " fmt "\n", \
+ __func__, __LINE__, ##args)
+
/* OTX_EP EP VF device data structure */
struct otx_ep_device {
/* PCI device pointer */
struct rte_pci_device *pdev;
-
+ uint16_t chip_id;
struct rte_eth_dev *eth_dev;
+ int port_id;
+ /* Memory mapped h/w address */
+ uint8_t *hw_addr;
};
+
+extern int otx_net_ep_logtype;
#endif /* _OTX_EP_COMMON_H_ */
@@ -8,20 +8,81 @@
#include "otx_ep_common.h"
#include "otx_ep_vf.h"
+#define OTX_EP_DEV(_eth_dev) ((_eth_dev)->data->dev_private)
static int
-otx_ep_eth_dev_uninit(struct rte_eth_dev *eth_dev)
+otx_ep_chip_specific_setup(struct otx_ep_device *otx_epvf)
{
- RTE_SET_USED(eth_dev);
+ struct rte_pci_device *pdev = otx_epvf->pdev;
+ uint32_t dev_id = pdev->id.device_id;
+ int ret = 0;
- return -ENODEV;
+ switch (dev_id) {
+ case PCI_DEVID_OCTEONTX_EP_VF:
+ otx_epvf->chip_id = dev_id;
+ break;
+ case PCI_DEVID_OCTEONTX2_EP_NET_VF:
+ case PCI_DEVID_CN98XX_EP_NET_VF:
+ otx_epvf->chip_id = dev_id;
+ break;
+ default:
+ otx_ep_err("Unsupported device\n");
+ ret = -EINVAL;
+ }
+
+ if (!ret)
+ otx_ep_info("OTX_EP dev_id[%d]\n", dev_id);
+
+ return ret;
+}
+
+/* OTX_EP VF device initialization */
+static int
+otx_epdev_init(struct otx_ep_device *otx_epvf)
+{
+ int ret = 0;
+
+ ret = otx_ep_chip_specific_setup(otx_epvf);
+ if (ret) {
+ otx_ep_err("Chip specific setup failed\n");
+ goto setup_fail;
+ }
+
+setup_fail:
+ return ret;
+}
+
+static int
+otx_ep_eth_dev_uninit(__rte_unused struct rte_eth_dev *eth_dev)
+{
+ return 0;
}
static int
otx_ep_eth_dev_init(struct rte_eth_dev *eth_dev)
{
- RTE_SET_USED(eth_dev);
+ struct rte_pci_device *pdev = RTE_ETH_DEV_TO_PCI(eth_dev);
+ struct otx_ep_device *otx_epvf = OTX_EP_DEV(eth_dev);
+ struct rte_ether_addr vf_mac_addr;
+
+ /* Single process support */
+ if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ return 0;
+
+ otx_epvf->eth_dev = eth_dev;
+ otx_epvf->port_id = eth_dev->data->port_id;
+ eth_dev->data->mac_addrs = rte_zmalloc("otx_ep", RTE_ETHER_ADDR_LEN, 0);
+ if (eth_dev->data->mac_addrs == NULL) {
+ otx_ep_err("MAC addresses memory allocation failed\n");
+ return -ENOMEM;
+ }
+ rte_eth_random_addr(vf_mac_addr.addr_bytes);
+ rte_ether_addr_copy(eth_dev->data->mac_addrs, &vf_mac_addr);
+ otx_epvf->hw_addr = pdev->mem_resource[0].addr;
+ otx_epvf->pdev = pdev;
+
+ otx_epdev_init(otx_epvf);
- return -ENODEV;
+ return 0;
}
static int
@@ -43,6 +104,7 @@ otx_ep_eth_dev_pci_remove(struct rte_pci_device *pci_dev)
/* Set of PCI devices this driver supports */
static const struct rte_pci_id pci_id_otx_ep_map[] = {
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX_EP_VF) },
+ { RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_EP_NET_VF) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN98XX_EP_NET_VF) },
{ .vendor_id = 0, /* sentinel */ }
};