From patchwork Fri Jan 22 19:18:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liron Himi X-Patchwork-Id: 87122 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BA0E4A0A0A; Fri, 22 Jan 2021 20:21:20 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A741D1410BF; Fri, 22 Jan 2021 20:20:15 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 0209A1410D5 for ; Fri, 22 Jan 2021 20:20:11 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 10MJB4ii016361 for ; Fri, 22 Jan 2021 11:20:11 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=Py32qA0YkBgx4DXUAE1oxn45KZp6DPAzuajflNOOcHI=; b=dJgOp4HqlflNSx/FwVji0fHZXCUk9r3eI7M+RHwDa3tgd2bXxRmVaze1NcHw26MLcXcf Z9Y6G+hw7U1QOSnlsrL6uYdrTvfiZcN9psZ+i/LA/QlOyNvZy+Hwkt+g3SlowZgzZxII yadc6QyOWynK/d95VWVH/GjPkjkKecmS+F2h/N3j8JgOP2KhQ0r3vFYLYRx1RF7QH63k g2TMiMVfgE+Ce0CFOVAEJmPkDnpOs112fg2mxw9KxYTHrvLS6zApQIdUPB2T2hz+uiQf nWPOxIs/oSHz1YAF+1Ahcx3cdym96uWgRxwqv6zXCv7/GULARMakmN5/byxk9SK5jgwH BA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 3668p7tpet-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 22 Jan 2021 11:20:11 -0800 Received: from SC-EXCH02.marvell.com (10.93.176.82) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 22 Jan 2021 11:20:09 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 22 Jan 2021 11:20:08 -0800 Received: from pt-lxl0023.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 22 Jan 2021 11:20:07 -0800 From: To: CC: , Yuri Chipchev , Liron Himi Date: Fri, 22 Jan 2021 21:18:59 +0200 Message-ID: <20210122191925.24308-12-lironh@marvell.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20210122191925.24308-1-lironh@marvell.com> References: <20201202101212.4717-1-lironh@marvell.com> <20210122191925.24308-1-lironh@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.343, 18.0.737 definitions=2021-01-22_14:2021-01-22, 2021-01-22 signatures=0 Subject: [dpdk-dev] [PATCH v2 11/37] net/mvpp2: save initial configuration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Yuri Chipchev Save configuration that was done prior 'start' as only then the ppio is being configured. Signed-off-by: Yuri Chipchev Reviewed-by: Liron Himi --- drivers/net/mvpp2/mrvl_ethdev.c | 107 +++++++++++++++++++++++++++----- 1 file changed, 92 insertions(+), 15 deletions(-) diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c index 47b3aa28f..3891313cf 100644 --- a/drivers/net/mvpp2/mrvl_ethdev.c +++ b/drivers/net/mvpp2/mrvl_ethdev.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2017 Marvell International Ltd. - * Copyright(c) 2017 Semihalf. + * Copyright(c) 2017-2021 Marvell International Ltd. + * Copyright(c) 2017-2021 Semihalf. * All rights reserved. */ @@ -146,6 +146,15 @@ static int rte_pmd_mrvl_remove(struct rte_vdev_device *vdev); static void mrvl_deinit_pp2(void); static void mrvl_deinit_hifs(void); +static int +mrvl_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr, + uint32_t index, uint32_t vmdq __rte_unused); +static int +mrvl_mac_addr_set(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr); +static int +mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on); +static int mrvl_promiscuous_enable(struct rte_eth_dev *dev); +static int mrvl_allmulticast_enable(struct rte_eth_dev *dev); #define MRVL_XSTATS_TBL_ENTRY(name) { \ #name, offsetof(struct pp2_ppio_statistics, name), \ @@ -404,8 +413,12 @@ mrvl_dev_configure(struct rte_eth_dev *dev) return 0; } - return mrvl_configure_rss(priv, - &dev->data->dev_conf.rx_adv_conf.rss_conf); + ret = mrvl_configure_rss(priv, + &dev->data->dev_conf.rx_adv_conf.rss_conf); + if (ret < 0) + return ret; + + return 0; } /** @@ -492,8 +505,10 @@ mrvl_dev_set_link_up(struct rte_eth_dev *dev) struct mrvl_priv *priv = dev->data->dev_private; int ret; - if (!priv->ppio) - return -EPERM; + if (!priv->ppio) { + dev->data->dev_link.link_status = ETH_LINK_UP; + return 0; + } ret = pp2_ppio_enable(priv->ppio); if (ret) @@ -507,10 +522,13 @@ mrvl_dev_set_link_up(struct rte_eth_dev *dev) * Set mtu to default DPDK value here. */ ret = mrvl_mtu_set(dev, dev->data->mtu); - if (ret) + if (ret) { pp2_ppio_disable(priv->ppio); + return ret; + } - return ret; + dev->data->dev_link.link_status = ETH_LINK_UP; + return 0; } /** @@ -526,11 +544,18 @@ static int mrvl_dev_set_link_down(struct rte_eth_dev *dev) { struct mrvl_priv *priv = dev->data->dev_private; + int ret; - if (!priv->ppio) - return -EPERM; + if (!priv->ppio) { + dev->data->dev_link.link_status = ETH_LINK_DOWN; + return 0; + } + ret = pp2_ppio_disable(priv->ppio); + if (ret) + return ret; - return pp2_ppio_disable(priv->ppio); + dev->data->dev_link.link_status = ETH_LINK_DOWN; + return 0; } /** @@ -612,6 +637,9 @@ mrvl_dev_start(struct rte_eth_dev *dev) struct mrvl_priv *priv = dev->data->dev_private; char match[MRVL_MATCH_LEN]; int ret = 0, i, def_init_size; + uint32_t j; + struct rte_vlan_filter_conf *vfc; + struct rte_ether_addr *mac_addr; if (priv->ppio) return mrvl_dev_set_link_up(dev); @@ -677,6 +705,47 @@ mrvl_dev_start(struct rte_eth_dev *dev) if (ret) MRVL_LOG(ERR, "Failed to set MTU to %d", dev->data->mtu); + if (!rte_is_zero_ether_addr(&dev->data->mac_addrs[0])) + mrvl_mac_addr_set(dev, &dev->data->mac_addrs[0]); + + for (i = 1; i < MRVL_MAC_ADDRS_MAX; i++) { + mac_addr = &dev->data->mac_addrs[i]; + + /* skip zero address */ + if (rte_is_zero_ether_addr(mac_addr)) + continue; + + mrvl_mac_addr_add(dev, mac_addr, i, 0); + } + + if (dev->data->all_multicast == 1) + mrvl_allmulticast_enable(dev); + + vfc = &dev->data->vlan_filter_conf; + for (j = 0; j < RTE_DIM(vfc->ids); j++) { + uint64_t vlan; + uint64_t vbit; + uint64_t ids = vfc->ids[j]; + + if (ids == 0) + continue; + + while (ids) { + vlan = 64 * j; + /* count trailing zeroes */ + vbit = ~ids & (ids - 1); + /* clear least significant bit set */ + ids ^= (ids ^ (ids - 1)) ^ vbit; + for (; vbit; vlan++) + vbit >>= 1; + ret = mrvl_vlan_filter_set(dev, vlan, 1); + if (ret) { + MRVL_LOG(ERR, "Failed to setup VLAN filter\n"); + goto out; + } + } + } + /* For default QoS config, don't start classifier. */ if (mrvl_qos_cfg && mrvl_qos_cfg->port[dev->data->port_id].use_global_defaults == 0) { @@ -687,10 +756,16 @@ mrvl_dev_start(struct rte_eth_dev *dev) } } - ret = mrvl_dev_set_link_up(dev); - if (ret) { - MRVL_LOG(ERR, "Failed to set link up"); - goto out; + if (dev->data->promiscuous == 1) + mrvl_promiscuous_enable(dev); + + if (dev->data->dev_link.link_status == ETH_LINK_UP) { + ret = mrvl_dev_set_link_up(dev); + if (ret) { + MRVL_LOG(ERR, "Failed to set link up"); + dev->data->dev_link.link_status = ETH_LINK_DOWN; + goto out; + } } /* start tx queues */ @@ -2936,6 +3011,8 @@ mrvl_eth_dev_create(struct rte_vdev_device *vdev, const char *name) eth_dev->dev_ops = &mrvl_ops; eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; + eth_dev->data->dev_link.link_status = ETH_LINK_UP; + rte_eth_dev_probing_finish(eth_dev); return 0; out_free: