diff mbox series

[v1,5/5] app/eventdev: remove unnecessary barriers for order test

Message ID 20210114070830.707550-6-feifei.wang2@arm.com (mailing list archive)
State Accepted, archived
Delegated to: Jerin Jacob
Headers show
Series refactor smp barriers in app/eventdev | expand

Checks

Context Check Description
ci/iol-testing success Testing PASS
ci/intel-Testing success Testing PASS
ci/intel-Testing success Testing PASS
ci/Intel-compilation success Compilation OK
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/checkpatch success coding style OK

Commit Message

Feifei Wang Jan. 14, 2021, 7:08 a.m. UTC
For the wmb in order_process_stage_1 and order_process_stage_invalid in
the order test, they can be removed. This is because when the test results
are wrong, the worker core writes 'true' to t->err. Then other worker
cores, producer cores and the main core will load the 'error' index and
stop testing. So, for the worker cores, no other storing operation needs
to be guaranteed after this when errors happen.

Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
---
 app/test-eventdev/test_order_common.h | 2 --
 1 file changed, 2 deletions(-)

Comments

Pavan Nikhilesh Bhagavatula Jan. 25, 2021, 5:49 p.m. UTC | #1
>For the wmb in order_process_stage_1 and
>order_process_stage_invalid in
>the order test, they can be removed. This is because when the test
>results
>are wrong, the worker core writes 'true' to t->err. Then other worker
>cores, producer cores and the main core will load the 'error' index and
>stop testing. So, for the worker cores, no other storing operation needs
>to be guaranteed after this when errors happen.
>
>Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
>Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
>---
> app/test-eventdev/test_order_common.h | 2 --
> 1 file changed, 2 deletions(-)
>
>diff --git a/app/test-eventdev/test_order_common.h b/app/test-
>eventdev/test_order_common.h
>index 5ef840493..cd9d6009e 100644
>--- a/app/test-eventdev/test_order_common.h
>+++ b/app/test-eventdev/test_order_common.h
>@@ -104,7 +104,6 @@ order_process_stage_1(struct test_order
>*const t,
> 			flow, *order_mbuf_seqn(t, ev->mbuf),
> 			expected_flow_seq[flow]);
> 		t->err = true;
>-		rte_smp_wmb();
> 	}
> 	/*
> 	 * Events from an atomic flow of an event queue can be
>scheduled only to
>@@ -123,7 +122,6 @@ order_process_stage_invalid(struct test_order
>*const t,
> {
> 	evt_err("invalid queue %d", ev->queue_id);
> 	t->err = true;
>-	rte_smp_wmb();
> }
>
> #define ORDER_WORKER_INIT\
>--
>2.25.1
Jerin Jacob Jan. 26, 2021, 3:56 p.m. UTC | #2
On Mon, Jan 25, 2021 at 11:19 PM Pavan Nikhilesh Bhagavatula
<pbhagavatula@marvell.com> wrote:
>
> >For the wmb in order_process_stage_1 and
> >order_process_stage_invalid in
> >the order test, they can be removed. This is because when the test
> >results
> >are wrong, the worker core writes 'true' to t->err. Then other worker
> >cores, producer cores and the main core will load the 'error' index and
> >stop testing. So, for the worker cores, no other storing operation needs
> >to be guaranteed after this when errors happen.
> >
> >Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
> >Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
> Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>


Series applied to dpdk-next-eventdev/for-main. Thanks.


> >---
> > app/test-eventdev/test_order_common.h | 2 --
> > 1 file changed, 2 deletions(-)
> >
> >diff --git a/app/test-eventdev/test_order_common.h b/app/test-
> >eventdev/test_order_common.h
> >index 5ef840493..cd9d6009e 100644
> >--- a/app/test-eventdev/test_order_common.h
> >+++ b/app/test-eventdev/test_order_common.h
> >@@ -104,7 +104,6 @@ order_process_stage_1(struct test_order
> >*const t,
> >                       flow, *order_mbuf_seqn(t, ev->mbuf),
> >                       expected_flow_seq[flow]);
> >               t->err = true;
> >-              rte_smp_wmb();
> >       }
> >       /*
> >        * Events from an atomic flow of an event queue can be
> >scheduled only to
> >@@ -123,7 +122,6 @@ order_process_stage_invalid(struct test_order
> >*const t,
> > {
> >       evt_err("invalid queue %d", ev->queue_id);
> >       t->err = true;
> >-      rte_smp_wmb();
> > }
> >
> > #define ORDER_WORKER_INIT\
> >--
> >2.25.1
>
diff mbox series

Patch

diff --git a/app/test-eventdev/test_order_common.h b/app/test-eventdev/test_order_common.h
index 5ef840493..cd9d6009e 100644
--- a/app/test-eventdev/test_order_common.h
+++ b/app/test-eventdev/test_order_common.h
@@ -104,7 +104,6 @@  order_process_stage_1(struct test_order *const t,
 			flow, *order_mbuf_seqn(t, ev->mbuf),
 			expected_flow_seq[flow]);
 		t->err = true;
-		rte_smp_wmb();
 	}
 	/*
 	 * Events from an atomic flow of an event queue can be scheduled only to
@@ -123,7 +122,6 @@  order_process_stage_invalid(struct test_order *const t,
 {
 	evt_err("invalid queue %d", ev->queue_id);
 	t->err = true;
-	rte_smp_wmb();
 }
 
 #define ORDER_WORKER_INIT\