From patchwork Mon Jan 11 17:43:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 86328 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B8B60A09FF; Mon, 11 Jan 2021 18:44:21 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 09966140FA2; Mon, 11 Jan 2021 18:44:13 +0100 (CET) Received: from mail-pl1-f177.google.com (mail-pl1-f177.google.com [209.85.214.177]) by mails.dpdk.org (Postfix) with ESMTP id 0F798140F9A for ; Mon, 11 Jan 2021 18:44:10 +0100 (CET) Received: by mail-pl1-f177.google.com with SMTP id r4so201850pls.11 for ; Mon, 11 Jan 2021 09:44:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QjJsPQwxHzH6eKBpzx/SBNEjsRg91DUBB1vquBRgSeI=; b=S/ihKnepiExoyU+jufyZmKlYjsXC0XC3zbLmeDBTxYYh9koUr4aT1f9pV9RQui6lSa ZRWC1Js1MTl3x1522Ncpb6PxIn7NZtyBoWbQUbuwvdlYnfaRDyVlnkfygZUfrFRLc/HH KW9pRRAbQHohLcq0mGg2D0KgWygIagwBckON+3/zAzNYFVt6fTXMNJnWP7lxIE71+zum OwGfpqeKnlYxq4+GXEbJnFXRhj30sKuBGQYqy47/XhYGdXDdMoiK/vR9ojAn93hYdPQd IloHfQ5DoohGGc3lKjSjFI4ckAxAMTaYGNO4l0bofthR4bQGc0p35d8TWCRb692zkExe SheA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QjJsPQwxHzH6eKBpzx/SBNEjsRg91DUBB1vquBRgSeI=; b=mKa4nBTjX7x/qy+jbTeqXlx99BSIwrsMqOMhZZ3LQhSeVlQqIPiyoD5HgxyK/PXVLZ IjLH50shPaSQfcz7GH0hGqHtF1qJTnH+iBV+rnZaAcGPGnKPlk/WdGUcSXdKAqihQOJ5 /wZ8wAe4E15YxWJ0HmLfDR0pazPDnk3ELRaNDFyhJRMgSS6wf+p+1le/TM6sPYGUF7qQ S2+bktydmkn59zs5bax1s6Y1KU2dglCoRgNTK1rJWSlhVDGfrfOV0bQcDQlP642ZaSTg TXRTmiXYzQEOB0mjqZ7oANHnX/DvMFz7HWrZeH24gRPgnXY3kqmv5g4q1Q33vRRrX90U Pqcw== X-Gm-Message-State: AOAM533HazlFoHmupkVcjDCoP1eqPXZjXkkC8zpkLKSVad2YhagaJrtN gRFEA1Ir7HHPfWe28IwLoDQZK0oyHUnwpA== X-Google-Smtp-Source: ABdhPJypqPBK+yilUhrQs706AMVakPdsO1kSE9J/Eu8G+yLGwPbMSzihg7CJwyPF+n0wt5I/MAfxLg== X-Received: by 2002:a17:90a:cb8d:: with SMTP id a13mr354053pju.155.1610387049008; Mon, 11 Jan 2021 09:44:09 -0800 (PST) Received: from localhost.localdomain ([192.19.228.250]) by smtp.gmail.com with ESMTPSA id t6sm4750pjg.49.2021.01.11.09.44.07 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 11 Jan 2021 09:44:08 -0800 (PST) From: Ajit Khaparde X-Google-Original-From: Ajit Khaparde To: dev@dpdk.org Cc: ferruh.yigit@intel.com, Kalesh AP Date: Mon, 11 Jan 2021 09:43:56 -0800 Message-Id: <20210111174400.10606-3-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20210111174400.10606-1-ajit.khaparde@broadcom.com> References: <20210108051301.33416-1-ajit.khaparde@broadcom.com> <20210111174400.10606-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v4 2/6] net/bnxt: add new RX checksum mode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kalesh AP The 58818 chips support two different checksum modes. Host driver has to register with FW which checksum mode it prefers to use. DPDK driver want to use "cs_all_ok_mode=1". FW advertises the support of the different checksum modes on per VNIC basis in the HWRM_VNIC_QCAPS response. Driver should use HWRM_VNIC_CFG to configure the needed checksum mode. Signed-off-by: Kalesh AP Reviewed-by: Ajit Khaparde --- drivers/net/bnxt/bnxt.h | 1 + drivers/net/bnxt/bnxt_hwrm.c | 8 ++++++++ 2 files changed, 9 insertions(+) diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h index 0d3998f20..14f52b2c4 100644 --- a/drivers/net/bnxt/bnxt.h +++ b/drivers/net/bnxt/bnxt.h @@ -679,6 +679,7 @@ struct bnxt { uint32_t vnic_cap_flags; #define BNXT_VNIC_CAP_COS_CLASSIFY BIT(0) #define BNXT_VNIC_CAP_OUTER_RSS BIT(1) +#define BNXT_VNIC_CAP_RX_CMPL_V2 BIT(2) unsigned int rx_nr_rings; unsigned int rx_cp_nr_rings; unsigned int rx_num_qs_per_vnic; diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c index 36c229de1..350fe2f97 100644 --- a/drivers/net/bnxt/bnxt_hwrm.c +++ b/drivers/net/bnxt/bnxt_hwrm.c @@ -860,6 +860,9 @@ int bnxt_hwrm_vnic_qcaps(struct bnxt *bp) if (flags & HWRM_VNIC_QCAPS_OUTPUT_FLAGS_OUTERMOST_RSS_CAP) bp->vnic_cap_flags |= BNXT_VNIC_CAP_OUTER_RSS; + if (flags & HWRM_VNIC_QCAPS_OUTPUT_FLAGS_RX_CMPL_V2_CAP) + bp->vnic_cap_flags |= BNXT_VNIC_CAP_RX_CMPL_V2; + bp->max_tpa_v2 = rte_le_to_cpu_16(resp->max_aggs_supported); HWRM_UNLOCK(); @@ -1961,6 +1964,11 @@ int bnxt_hwrm_vnic_cfg(struct bnxt *bp, struct bnxt_vnic_info *vnic) rte_cpu_to_le_16(cpr->cp_ring_struct->fw_ring_id); enables = HWRM_VNIC_CFG_INPUT_ENABLES_DEFAULT_RX_RING_ID | HWRM_VNIC_CFG_INPUT_ENABLES_DEFAULT_CMPL_RING_ID; + if (bp->vnic_cap_flags & BNXT_VNIC_CAP_RX_CMPL_V2) { + enables |= HWRM_VNIC_CFG_INPUT_ENABLES_RX_CSUM_V2_MODE; + req.rx_csum_v2_mode = + HWRM_VNIC_CFG_INPUT_RX_CSUM_V2_MODE_ALL_OK; + } goto config_mru; }