From patchwork Tue Dec 8 20:11:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 84825 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id E89C7A09E9; Tue, 8 Dec 2020 21:13:29 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 82B2DC9BE; Tue, 8 Dec 2020 21:11:52 +0100 (CET) Received: from mail-pg1-f195.google.com (mail-pg1-f195.google.com [209.85.215.195]) by dpdk.org (Postfix) with ESMTP id 1DE97C996 for ; Tue, 8 Dec 2020 21:11:47 +0100 (CET) Received: by mail-pg1-f195.google.com with SMTP id t3so13173770pgi.11 for ; Tue, 08 Dec 2020 12:11:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version; bh=PVKWrp5/0DRDnbKjW56ZpvFye44In3RBlXsxb3XaoI0=; b=MvZYk2rLluzTV4edMs8PvwfCR+mndB2S7XOdCUM7njrwPp8tID1uurYEdjXYYvqWBh /3LBvYgIkQsjeqrli7I5GUuotixSVDA3lOhJOqF9JGhOXBzOPtzZO5eQaFUgAPLxxGoz hQshpIldIF9mnYyP/GVVSNtX486YrkdqFVsts= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version; bh=PVKWrp5/0DRDnbKjW56ZpvFye44In3RBlXsxb3XaoI0=; b=OsAcriVhWZtZoup/tKRhwiFYJhXJBR1rJA+JFtY1bkDOFzDdDIYxdOP4+KmqQDdSrZ kOm4BFAI5M+7LojylafEZ9RgNidJEYIYoSZ6MLjr9QVAgA44zKuRMZWAJHI8gayd3HsB F7KMy/K1gnLNKRodr184bbsjzuJke71w/fgPUCk5zBu/H+FEzxGkMtFOGuaCQbJ9Q4xN IkKvZMnzEk04/hQNE18Mh4v2+8iKm4wmPJPPyLZoZqGrF8TdDnm5Mun6IXayELVYkM2v VvNXk/ooITBNYFpOsfjcvdU5ia56Uq587WU+90P7CorZUKv5wHZGbAq2sQRoiHkZEH6C 2t9w== X-Gm-Message-State: AOAM530locs7iAQGWNbBtArQPsWu4M6Z1E9vuFbDD5+tmnovg+RrfmB/ Jddl3TcE//GS9rtPvG7z+HIoc0dKiPhzaLKej7d85qClCtMZYInS9NDvhfumJXlXVbR2k049NLm H6YT0NYCcZJnyktiicm2IkC5sR5wBEmqrf8lgVu58xqEfhDrOp3Fw0Vb0pMfRSnAadw== X-Google-Smtp-Source: ABdhPJwhon7FbuPtoQVI87d+esd8gmcqYvObnfzuPQTjE7EqRmNPOJ/VGcOOyN0qZplAVC2bmHayLA== X-Received: by 2002:a63:5d51:: with SMTP id o17mr24158232pgm.302.1607458305543; Tue, 08 Dec 2020 12:11:45 -0800 (PST) Received: from localhost.localdomain ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id x10sm5729187pfc.157.2020.12.08.12.11.44 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Tue, 08 Dec 2020 12:11:45 -0800 (PST) From: Ajit Khaparde To: dev@dpdk.org Date: Tue, 8 Dec 2020 12:11:22 -0800 Message-Id: <20201208201134.47844-6-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20201208201134.47844-1-ajit.khaparde@broadcom.com> References: <20201208201134.47844-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.15 Subject: [dpdk-dev] [PATCH 05/17] net/bnxt: remove references to Thor X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Refactor code to remove references to Thor. Instead use P5 as in phase 5 of development cycle since it is applicable to boards other than Thor as well. Signed-off-by: Ajit Khaparde --- drivers/net/bnxt/bnxt.h | 20 +++++++------- drivers/net/bnxt/bnxt_ethdev.c | 43 +++++++++++++++-------------- drivers/net/bnxt/bnxt_hwrm.c | 44 +++++++++++++++--------------- drivers/net/bnxt/bnxt_ring.c | 8 +++--- drivers/net/bnxt/bnxt_rxq.c | 4 +-- drivers/net/bnxt/bnxt_rxr.c | 12 ++++---- drivers/net/bnxt/bnxt_rxr.h | 2 +- drivers/net/bnxt/bnxt_vnic.c | 4 +-- drivers/net/bnxt/tf_ulp/bnxt_ulp.c | 2 +- 9 files changed, 70 insertions(+), 69 deletions(-) diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h index f13d586d4..9c1c87489 100644 --- a/drivers/net/bnxt/bnxt.h +++ b/drivers/net/bnxt/bnxt.h @@ -112,11 +112,11 @@ #define TPA_MAX_SEGS 5 /* 32 segments in log2 units */ #define BNXT_TPA_MAX_AGGS(bp) \ - (BNXT_CHIP_THOR(bp) ? TPA_MAX_AGGS_TH : \ + (BNXT_CHIP_P5(bp) ? TPA_MAX_AGGS_TH : \ TPA_MAX_AGGS) #define BNXT_TPA_MAX_SEGS(bp) \ - (BNXT_CHIP_THOR(bp) ? TPA_MAX_SEGS_TH : \ + (BNXT_CHIP_P5(bp) ? TPA_MAX_SEGS_TH : \ TPA_MAX_SEGS) /* @@ -389,10 +389,10 @@ struct bnxt_coal { #define DBR_TYPE_NQ (0xaULL << 60) #define DBR_TYPE_NQ_ARM (0xbULL << 60) -#define BNXT_RSS_TBL_SIZE_THOR 512U -#define BNXT_RSS_ENTRIES_PER_CTX_THOR 64 -#define BNXT_MAX_RSS_CTXTS_THOR \ - (BNXT_RSS_TBL_SIZE_THOR / BNXT_RSS_ENTRIES_PER_CTX_THOR) +#define BNXT_RSS_TBL_SIZE_P5 512U +#define BNXT_RSS_ENTRIES_PER_CTX_P5 64 +#define BNXT_MAX_RSS_CTXTS_P5 \ + (BNXT_RSS_TBL_SIZE_P5 / BNXT_RSS_ENTRIES_PER_CTX_P5) #define BNXT_MAX_TC 8 #define BNXT_MAX_QUEUE 8 @@ -629,7 +629,7 @@ struct bnxt { #define BNXT_FLAG_KONG_MB_EN BIT(10) #define BNXT_FLAG_TRUSTED_VF_EN BIT(11) #define BNXT_FLAG_DFLT_VNIC_SET BIT(12) -#define BNXT_FLAG_THOR_CHIP BIT(13) +#define BNXT_FLAG_CHIP_P5 BIT(13) #define BNXT_FLAG_STINGRAY BIT(14) #define BNXT_FLAG_FW_RESET BIT(15) #define BNXT_FLAG_FATAL_ERROR BIT(16) @@ -653,10 +653,10 @@ struct bnxt { #define BNXT_USE_CHIMP_MB 0 //For non-CFA commands, everything uses Chimp. #define BNXT_USE_KONG(bp) ((bp)->flags & BNXT_FLAG_KONG_MB_EN) #define BNXT_VF_IS_TRUSTED(bp) ((bp)->flags & BNXT_FLAG_TRUSTED_VF_EN) -#define BNXT_CHIP_THOR(bp) ((bp)->flags & BNXT_FLAG_THOR_CHIP) +#define BNXT_CHIP_P5(bp) ((bp)->flags & BNXT_FLAG_CHIP_P5) #define BNXT_STINGRAY(bp) ((bp)->flags & BNXT_FLAG_STINGRAY) -#define BNXT_HAS_NQ(bp) BNXT_CHIP_THOR(bp) -#define BNXT_HAS_RING_GRPS(bp) (!BNXT_CHIP_THOR(bp)) +#define BNXT_HAS_NQ(bp) BNXT_CHIP_P5(bp) +#define BNXT_HAS_RING_GRPS(bp) (!BNXT_CHIP_P5(bp)) #define BNXT_FLOW_XSTATS_EN(bp) ((bp)->flags & BNXT_FLAG_FLOW_XSTATS_EN) #define BNXT_HAS_DFLT_MAC_SET(bp) ((bp)->flags & BNXT_FLAG_DFLT_MAC_SET) #define BNXT_TRUFLOW_EN(bp) ((bp)->flags & BNXT_FLAG_TRUFLOW_EN) diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index c363c8427..8047b0b5d 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -208,22 +208,22 @@ int is_bnxt_in_error(struct bnxt *bp) static uint16_t bnxt_rss_ctxts(const struct bnxt *bp) { unsigned int num_rss_rings = RTE_MIN(bp->rx_nr_rings, - BNXT_RSS_TBL_SIZE_THOR); + BNXT_RSS_TBL_SIZE_P5); - if (!BNXT_CHIP_THOR(bp)) + if (!BNXT_CHIP_P5(bp)) return 1; return RTE_ALIGN_MUL_CEIL(num_rss_rings, - BNXT_RSS_ENTRIES_PER_CTX_THOR) / - BNXT_RSS_ENTRIES_PER_CTX_THOR; + BNXT_RSS_ENTRIES_PER_CTX_P5) / + BNXT_RSS_ENTRIES_PER_CTX_P5; } uint16_t bnxt_rss_hash_tbl_size(const struct bnxt *bp) { - if (!BNXT_CHIP_THOR(bp)) + if (!BNXT_CHIP_P5(bp)) return HW_HASH_INDEX_SIZE; - return bnxt_rss_ctxts(bp) * BNXT_RSS_ENTRIES_PER_CTX_THOR; + return bnxt_rss_ctxts(bp) * BNXT_RSS_ENTRIES_PER_CTX_P5; } static void bnxt_free_parent_info(struct bnxt *bp) @@ -427,12 +427,12 @@ static int bnxt_setup_one_vnic(struct bnxt *bp, uint16_t vnic_id) if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS) { int j, nr_ctxs = bnxt_rss_ctxts(bp); - if (bp->rx_nr_rings > BNXT_RSS_TBL_SIZE_THOR) { + if (bp->rx_nr_rings > BNXT_RSS_TBL_SIZE_P5) { PMD_DRV_LOG(ERR, "RxQ cnt %d > reta_size %d\n", - bp->rx_nr_rings, BNXT_RSS_TBL_SIZE_THOR); + bp->rx_nr_rings, BNXT_RSS_TBL_SIZE_P5); PMD_DRV_LOG(ERR, "Only queues 0-%d will be in RSS table\n", - BNXT_RSS_TBL_SIZE_THOR - 1); + BNXT_RSS_TBL_SIZE_P5 - 1); } rc = 0; @@ -712,8 +712,8 @@ static int bnxt_init_chip(struct bnxt *bp) /* THOR does not support ring groups. * But we will use the array to save RSS context IDs. */ - if (BNXT_CHIP_THOR(bp)) - bp->max_ring_grps = BNXT_MAX_RSS_CTXTS_THOR; + if (BNXT_CHIP_P5(bp)) + bp->max_ring_grps = BNXT_MAX_RSS_CTXTS_P5; rc = bnxt_alloc_all_hwrm_stat_ctxs(bp); if (rc) { @@ -1832,7 +1832,7 @@ static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev, return -EINVAL; } - if (BNXT_CHIP_THOR(bp)) { + if (BNXT_CHIP_P5(bp)) { vnic->rss_table[i * 2] = rxq->rx_ring->rx_ring_struct->fw_ring_id; vnic->rss_table[i * 2 + 1] = @@ -1881,7 +1881,7 @@ static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev, if (reta_conf[idx].mask & (1ULL << sft)) { uint16_t qid; - if (BNXT_CHIP_THOR(bp)) + if (BNXT_CHIP_P5(bp)) qid = bnxt_rss_to_qid(bp, vnic->rss_table[i * 2]); else @@ -3232,7 +3232,7 @@ bnxt_timesync_read_time(struct rte_eth_dev *dev, struct timespec *ts) if (!ptp) return 0; - if (BNXT_CHIP_THOR(bp)) + if (BNXT_CHIP_P5(bp)) rc = bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_CURRENT_TIME, &systime_cycles); else @@ -3278,7 +3278,7 @@ bnxt_timesync_enable(struct rte_eth_dev *dev) ptp->tx_tstamp_tc.cc_shift = shift; ptp->tx_tstamp_tc.nsec_mask = (1ULL << shift) - 1; - if (!BNXT_CHIP_THOR(bp)) + if (!BNXT_CHIP_P5(bp)) bnxt_map_ptp_regs(bp); return 0; @@ -3299,7 +3299,7 @@ bnxt_timesync_disable(struct rte_eth_dev *dev) bnxt_hwrm_ptp_cfg(bp); - if (!BNXT_CHIP_THOR(bp)) + if (!BNXT_CHIP_P5(bp)) bnxt_unmap_ptp_regs(bp); return 0; @@ -3318,7 +3318,7 @@ bnxt_timesync_read_rx_timestamp(struct rte_eth_dev *dev, if (!ptp) return 0; - if (BNXT_CHIP_THOR(bp)) + if (BNXT_CHIP_P5(bp)) rx_tstamp_cycles = ptp->rx_timestamp; else bnxt_get_rx_ts(bp, &rx_tstamp_cycles); @@ -3341,7 +3341,7 @@ bnxt_timesync_read_tx_timestamp(struct rte_eth_dev *dev, if (!ptp) return 0; - if (BNXT_CHIP_THOR(bp)) + if (BNXT_CHIP_P5(bp)) rc = bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_PATH_TX, &tx_tstamp_cycles); else @@ -4007,7 +4007,8 @@ static bool bnxt_vf_pciid(uint16_t device_id) } } -static bool bnxt_thor_device(uint16_t device_id) +/* Phase 5 device */ +static bool bnxt_p5_device(uint16_t device_id) { switch (device_id) { case BROADCOM_DEV_ID_57508: @@ -5240,8 +5241,8 @@ bnxt_dev_init(struct rte_eth_dev *eth_dev, void *params __rte_unused) if (bnxt_vf_pciid(pci_dev->id.device_id)) bp->flags |= BNXT_FLAG_VF; - if (bnxt_thor_device(pci_dev->id.device_id)) - bp->flags |= BNXT_FLAG_THOR_CHIP; + if (bnxt_p5_device(pci_dev->id.device_id)) + bp->flags |= BNXT_FLAG_CHIP_P5; if (pci_dev->id.device_id == BROADCOM_DEV_ID_58802 || pci_dev->id.device_id == BROADCOM_DEV_ID_58804 || diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c index 784e9778a..6f5402070 100644 --- a/drivers/net/bnxt/bnxt_hwrm.c +++ b/drivers/net/bnxt/bnxt_hwrm.c @@ -635,7 +635,7 @@ static int bnxt_hwrm_ptp_qcfg(struct bnxt *bp) HWRM_CHECK_RESULT(); - if (!BNXT_CHIP_THOR(bp) && + if (!BNXT_CHIP_P5(bp) && !(resp->flags & HWRM_PORT_MAC_PTP_QCFG_OUTPUT_FLAGS_DIRECT_ACCESS)) return 0; @@ -646,7 +646,7 @@ static int bnxt_hwrm_ptp_qcfg(struct bnxt *bp) if (!ptp) return -ENOMEM; - if (!BNXT_CHIP_THOR(bp)) { + if (!BNXT_CHIP_P5(bp)) { ptp->rx_regs[BNXT_PTP_RX_TS_L] = rte_le_to_cpu_32(resp->rx_ts_reg_off_lower); ptp->rx_regs[BNXT_PTP_RX_TS_H] = @@ -766,7 +766,7 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp) bp->first_vf_id = rte_le_to_cpu_16(resp->first_vf_id); bp->max_rx_em_flows = rte_le_to_cpu_16(resp->max_rx_em_flows); bp->max_l2_ctx = rte_le_to_cpu_16(resp->max_l2_ctxs); - if (!BNXT_CHIP_THOR(bp) && !bp->pdev->max_vfs) + if (!BNXT_CHIP_P5(bp) && !bp->pdev->max_vfs) bp->max_l2_ctx += bp->max_rx_em_flows; /* TODO: For now, do not support VMDq/RFS on VFs. */ if (BNXT_PF(bp)) { @@ -1056,7 +1056,7 @@ int bnxt_hwrm_func_resc_qcaps(struct bnxt *bp) * So use the value provided by func_qcaps. */ bp->max_l2_ctx = rte_le_to_cpu_16(resp->max_l2_ctxs); - if (!BNXT_CHIP_THOR(bp) && !bp->pdev->max_vfs) + if (!BNXT_CHIP_P5(bp) && !bp->pdev->max_vfs) bp->max_l2_ctx += bp->max_rx_em_flows; bp->max_vnics = rte_le_to_cpu_16(resp->max_vnics); bp->max_stat_ctx = rte_le_to_cpu_16(resp->max_stat_ctx); @@ -1557,7 +1557,7 @@ int bnxt_hwrm_ring_alloc(struct bnxt *bp, req.ring_type = ring_type; req.cmpl_ring_id = rte_cpu_to_le_16(cmpl_ring_id); req.stat_ctx_id = rte_cpu_to_le_32(stats_ctx_id); - if (BNXT_CHIP_THOR(bp)) { + if (BNXT_CHIP_P5(bp)) { mb_pool = bp->rx_queues[0]->mb_pool; rx_buf_size = rte_pktmbuf_data_room_size(mb_pool) - RTE_PKTMBUF_HEADROOM; @@ -1927,7 +1927,7 @@ int bnxt_hwrm_vnic_cfg(struct bnxt *bp, struct bnxt_vnic_info *vnic) HWRM_PREP(&req, HWRM_VNIC_CFG, BNXT_USE_CHIMP_MB); - if (BNXT_CHIP_THOR(bp)) { + if (BNXT_CHIP_P5(bp)) { int dflt_rxq = vnic->start_grp_id; struct bnxt_rx_ring_info *rxr; struct bnxt_cp_ring_info *cpr; @@ -2117,7 +2117,7 @@ int bnxt_hwrm_vnic_ctx_free(struct bnxt *bp, struct bnxt_vnic_info *vnic) { int rc = 0; - if (BNXT_CHIP_THOR(bp)) { + if (BNXT_CHIP_P5(bp)) { int j; for (j = 0; j < vnic->num_lb_ctxts; j++) { @@ -2164,7 +2164,7 @@ int bnxt_hwrm_vnic_free(struct bnxt *bp, struct bnxt_vnic_info *vnic) } static int -bnxt_hwrm_vnic_rss_cfg_thor(struct bnxt *bp, struct bnxt_vnic_info *vnic) +bnxt_hwrm_vnic_rss_cfg_p5(struct bnxt *bp, struct bnxt_vnic_info *vnic) { int i; int rc = 0; @@ -2208,8 +2208,8 @@ int bnxt_hwrm_vnic_rss_cfg(struct bnxt *bp, if (!vnic->rss_table) return 0; - if (BNXT_CHIP_THOR(bp)) - return bnxt_hwrm_vnic_rss_cfg_thor(bp, vnic); + if (BNXT_CHIP_P5(bp)) + return bnxt_hwrm_vnic_rss_cfg_p5(bp, vnic); HWRM_PREP(&req, HWRM_VNIC_RSS_CFG, BNXT_USE_CHIMP_MB); @@ -2274,7 +2274,7 @@ int bnxt_hwrm_vnic_tpa_cfg(struct bnxt *bp, struct hwrm_vnic_tpa_cfg_input req = {.req_type = 0 }; struct hwrm_vnic_tpa_cfg_output *resp = bp->hwrm_cmd_resp_addr; - if (BNXT_CHIP_THOR(bp) && !bp->max_tpa_v2) { + if (BNXT_CHIP_P5(bp) && !bp->max_tpa_v2) { if (enable) PMD_DRV_LOG(ERR, "No HW support for LRO\n"); return -ENOTSUP; @@ -2566,7 +2566,7 @@ void bnxt_free_hwrm_rx_ring(struct bnxt *bp, int queue_index) ring = rxr->ag_ring_struct; if (ring->fw_ring_id != INVALID_HW_RING_ID) { bnxt_hwrm_ring_free(bp, ring, - BNXT_CHIP_THOR(bp) ? + BNXT_CHIP_P5(bp) ? HWRM_RING_FREE_INPUT_RING_TYPE_RX_AGG : HWRM_RING_FREE_INPUT_RING_TYPE_RX); if (BNXT_HAS_RING_GRPS(bp)) @@ -3068,7 +3068,7 @@ int bnxt_set_hwrm_link_config(struct bnxt *bp, bool link_up) goto port_phy_cfg; autoneg = bnxt_check_eth_link_autoneg(dev_conf->link_speeds); - if (BNXT_CHIP_THOR(bp) && + if (BNXT_CHIP_P5(bp) && dev_conf->link_speeds == ETH_LINK_SPEED_40G) { /* 40G is not supported as part of media auto detect. * The speed should be forced and autoneg disabled @@ -3093,7 +3093,7 @@ int bnxt_set_hwrm_link_config(struct bnxt *bp, bool link_up) * to 40G until link comes up at new speed. */ if (autoneg == 1 && - !(!BNXT_CHIP_THOR(bp) && + !(!BNXT_CHIP_P5(bp) && (bp->link_info->auto_link_speed || bp->link_info->force_link_speed))) { link_req.phy_flags |= @@ -4820,7 +4820,7 @@ int bnxt_hwrm_clear_ntuple_filter(struct bnxt *bp, } static int -bnxt_vnic_rss_configure_thor(struct bnxt *bp, struct bnxt_vnic_info *vnic) +bnxt_vnic_rss_configure_p5(struct bnxt *bp, struct bnxt_vnic_info *vnic) { struct hwrm_vnic_rss_cfg_output *resp = bp->hwrm_cmd_resp_addr; uint8_t *rx_queue_state = bp->eth_dev->data->rx_queue_state; @@ -4844,7 +4844,7 @@ bnxt_vnic_rss_configure_thor(struct bnxt *bp, struct bnxt_vnic_info *vnic) req.ring_grp_tbl_addr = rte_cpu_to_le_64(vnic->rss_table_dma_addr + - i * BNXT_RSS_ENTRIES_PER_CTX_THOR * + i * BNXT_RSS_ENTRIES_PER_CTX_P5 * 2 * sizeof(*ring_tbl)); req.hash_key_tbl_addr = rte_cpu_to_le_64(vnic->rss_hash_key_dma_addr); @@ -4899,8 +4899,8 @@ int bnxt_vnic_rss_configure(struct bnxt *bp, struct bnxt_vnic_info *vnic) if (!(vnic->rss_table && vnic->hash_type)) return 0; - if (BNXT_CHIP_THOR(bp)) - return bnxt_vnic_rss_configure_thor(bp, vnic); + if (BNXT_CHIP_P5(bp)) + return bnxt_vnic_rss_configure_p5(bp, vnic); if (vnic->fw_vnic_id == INVALID_HW_RING_ID) return 0; @@ -4959,7 +4959,7 @@ static void bnxt_hwrm_set_coal_params(struct bnxt_coal *hw_coal, req->flags = rte_cpu_to_le_16(flags); } -static int bnxt_hwrm_set_coal_params_thor(struct bnxt *bp, +static int bnxt_hwrm_set_coal_params_p5(struct bnxt *bp, struct hwrm_ring_cmpl_ring_cfg_aggint_params_input *agg_req) { struct hwrm_ring_aggint_qcaps_input req = {0}; @@ -4996,8 +4996,8 @@ int bnxt_hwrm_set_ring_coal(struct bnxt *bp, int rc; /* Set ring coalesce parameters only for 100G NICs */ - if (BNXT_CHIP_THOR(bp)) { - if (bnxt_hwrm_set_coal_params_thor(bp, &req)) + if (BNXT_CHIP_P5(bp)) { + if (bnxt_hwrm_set_coal_params_p5(bp, &req)) return -1; } else if (bnxt_stratus_device(bp)) { bnxt_hwrm_set_coal_params(coal, &req); @@ -5026,7 +5026,7 @@ int bnxt_hwrm_func_backing_store_qcaps(struct bnxt *bp) int total_alloc_len; int rc, i, tqm_rings; - if (!BNXT_CHIP_THOR(bp) || + if (!BNXT_CHIP_P5(bp) || bp->hwrm_spec_code < HWRM_VERSION_1_9_2 || BNXT_VF(bp) || bp->ctx) diff --git a/drivers/net/bnxt/bnxt_ring.c b/drivers/net/bnxt/bnxt_ring.c index aeb6cb615..579c48d8c 100644 --- a/drivers/net/bnxt/bnxt_ring.c +++ b/drivers/net/bnxt/bnxt_ring.c @@ -57,8 +57,8 @@ int bnxt_alloc_ring_grps(struct bnxt *bp) /* THOR does not support ring groups. * But we will use the array to save RSS context IDs. */ - if (BNXT_CHIP_THOR(bp)) { - bp->max_ring_grps = BNXT_MAX_RSS_CTXTS_THOR; + if (BNXT_CHIP_P5(bp)) { + bp->max_ring_grps = BNXT_MAX_RSS_CTXTS_P5; } else if (bp->max_ring_grps < bp->rx_cp_nr_rings) { /* 1 ring is for default completion ring */ PMD_DRV_LOG(ERR, "Insufficient resource: Ring Group\n"); @@ -344,7 +344,7 @@ static void bnxt_set_db(struct bnxt *bp, uint32_t map_idx, uint32_t fid) { - if (BNXT_CHIP_THOR(bp)) { + if (BNXT_CHIP_P5(bp)) { if (BNXT_PF(bp)) db->doorbell = (char *)bp->doorbell_base + 0x10000; else @@ -538,7 +538,7 @@ static int bnxt_alloc_rx_agg_ring(struct bnxt *bp, int queue_index) ring->fw_rx_ring_id = rxr->rx_ring_struct->fw_ring_id; - if (BNXT_CHIP_THOR(bp)) { + if (BNXT_CHIP_P5(bp)) { ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX_AGG; hw_stats_ctx_id = cpr->hw_stats_ctx_id; } else { diff --git a/drivers/net/bnxt/bnxt_rxq.c b/drivers/net/bnxt/bnxt_rxq.c index 61196eba9..328cc994d 100644 --- a/drivers/net/bnxt/bnxt_rxq.c +++ b/drivers/net/bnxt/bnxt_rxq.c @@ -472,7 +472,7 @@ int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id) if (rc) return rc; - if (BNXT_CHIP_THOR(bp)) { + if (BNXT_CHIP_P5(bp)) { /* Reconfigure default receive ring and MRU. */ bnxt_hwrm_vnic_cfg(bp, rxq->vnic); } @@ -562,7 +562,7 @@ int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id) if (bp->rx_queues[i]->rx_started) active_queue_cnt++; - if (BNXT_CHIP_THOR(bp)) { + if (BNXT_CHIP_P5(bp)) { /* * For Thor, we need to ensure that the VNIC default receive * ring corresponds to an active receive queue. When no queue diff --git a/drivers/net/bnxt/bnxt_rxr.c b/drivers/net/bnxt/bnxt_rxr.c index af1774844..e9c4fffed 100644 --- a/drivers/net/bnxt/bnxt_rxr.c +++ b/drivers/net/bnxt/bnxt_rxr.c @@ -225,13 +225,13 @@ static int bnxt_rx_pages(struct bnxt_rx_queue *rxq, uint16_t cp_cons, ag_cons; struct rx_pkt_cmpl *rxcmp; struct rte_mbuf *last = mbuf; - bool is_thor_tpa = tpa_info && BNXT_CHIP_THOR(rxq->bp); + bool is_p5_tpa = tpa_info && BNXT_CHIP_P5(rxq->bp); for (i = 0; i < agg_buf; i++) { struct rte_mbuf **ag_buf; struct rte_mbuf *ag_mbuf; - if (is_thor_tpa) { + if (is_p5_tpa) { rxcmp = (void *)&tpa_info->agg_arr[i]; } else { *tmp_raw_cons = NEXT_RAW_CMP(*tmp_raw_cons); @@ -285,7 +285,7 @@ static inline struct rte_mbuf *bnxt_tpa_end( uint8_t payload_offset; struct bnxt_tpa_info *tpa_info; - if (BNXT_CHIP_THOR(rxq->bp)) { + if (BNXT_CHIP_P5(rxq->bp)) { struct rx_tpa_v2_end_cmpl *th_tpa_end; struct rx_tpa_v2_end_cmpl_hi *th_tpa_end1; @@ -497,11 +497,11 @@ bnxt_set_ol_flags(struct rx_pkt_cmpl *rxcmp, struct rx_pkt_cmpl_hi *rxcmp1, #ifdef RTE_LIBRTE_IEEE1588 static void -bnxt_get_rx_ts_thor(struct bnxt *bp, uint32_t rx_ts_cmpl) +bnxt_get_rx_ts_p5(struct bnxt *bp, uint32_t rx_ts_cmpl) { uint64_t systime_cycles = 0; - if (!BNXT_CHIP_THOR(bp)) + if (!BNXT_CHIP_P5(bp)) return; /* On Thor, Rx timestamps are provided directly in the @@ -747,7 +747,7 @@ static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt, RX_PKT_CMPL_FLAGS_MASK) == RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP)) { mbuf->ol_flags |= PKT_RX_IEEE1588_PTP | PKT_RX_IEEE1588_TMST; - bnxt_get_rx_ts_thor(rxq->bp, rxcmp1->reorder); + bnxt_get_rx_ts_p5(rxq->bp, rxcmp1->reorder); } #endif diff --git a/drivers/net/bnxt/bnxt_rxr.h b/drivers/net/bnxt/bnxt_rxr.h index 3fc901fdf..2a53cf87b 100644 --- a/drivers/net/bnxt/bnxt_rxr.h +++ b/drivers/net/bnxt/bnxt_rxr.h @@ -17,7 +17,7 @@ static inline uint16_t bnxt_tpa_start_agg_id(struct bnxt *bp, struct rx_tpa_start_cmpl *cmp) { - if (BNXT_CHIP_THOR(bp)) + if (BNXT_CHIP_P5(bp)) return BNXT_TPA_START_AGG_ID_TH(cmp); else return BNXT_TPA_START_AGG_ID_PRE_TH(cmp); diff --git a/drivers/net/bnxt/bnxt_vnic.c b/drivers/net/bnxt/bnxt_vnic.c index 1602fb2b8..4d378eca4 100644 --- a/drivers/net/bnxt/bnxt_vnic.c +++ b/drivers/net/bnxt/bnxt_vnic.c @@ -129,8 +129,8 @@ int bnxt_alloc_vnic_attributes(struct bnxt *bp) entry_length = HW_HASH_KEY_SIZE + BNXT_MAX_MC_ADDRS * RTE_ETHER_ADDR_LEN; - if (BNXT_CHIP_THOR(bp)) - rss_table_size = BNXT_RSS_TBL_SIZE_THOR * + if (BNXT_CHIP_P5(bp)) + rss_table_size = BNXT_RSS_TBL_SIZE_P5 * 2 * sizeof(*vnic->rss_table); else rss_table_size = HW_HASH_INDEX_SIZE * sizeof(*vnic->rss_table); diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c index 26fd3009f..de47fde88 100644 --- a/drivers/net/bnxt/tf_ulp/bnxt_ulp.c +++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp.c @@ -52,7 +52,7 @@ static int32_t bnxt_ulp_devid_get(struct bnxt *bp, enum bnxt_ulp_device_id *ulp_dev_id) { - if (BNXT_CHIP_THOR(bp)) + if (BNXT_CHIP_P5(bp)) return -EINVAL; /* Assuming Whitney */ *ulp_dev_id = BNXT_ULP_DEVICE_ID_WH_PLUS;