From patchwork Wed Dec 2 10:12:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liron Himi X-Patchwork-Id: 84706 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5C426A04DB; Wed, 2 Dec 2020 11:23:30 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 66975C9DA; Wed, 2 Dec 2020 11:13:28 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 27263C9C2 for ; Wed, 2 Dec 2020 11:13:27 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 0B2AAT4i024223 for ; Wed, 2 Dec 2020 02:13:23 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=NvlUb5wCv+21GOx33UPZpD1AOUjpai7e7WRNPr0rFNU=; b=VWc/14jahpwT9qteUrEG/YUWi7GixdA3wCC21GddN6LhX9VKN388V3+7OlMb9I3gmrbo pJo5xO/nI5MRGNgkanw/yQw660o+72eOZ/aRyJRxzD+0IZff5rUlm3G2rC2yHanzVfEE ghssJ7P843xRJSZLkf/E56mnoZ3XUX0BXzKWAi9zNbFoaxJsBJ/SMgXRxhLMdyIuUcxC TGCpi7XYpqFbRm3/8qdVZNFjvgPM59jQNBxUtRmcCBGt3lbv/ZaIVe9rOGyjLigKhzAS k/PBUELlPZvSbO5dTfXX24rTV6DkdNBydfjXzNOdtsOlkhifrJexJ9pSeRr6HbhARqGu OQ== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0b-0016f401.pphosted.com with ESMTP id 355w509r6g-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Wed, 02 Dec 2020 02:13:21 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 2 Dec 2020 02:13:16 -0800 Received: from pt-lxl0023.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 2 Dec 2020 02:13:15 -0800 From: To: CC: , Liron Himi Date: Wed, 2 Dec 2020 12:12:06 +0200 Message-ID: <20201202101212.4717-33-lironh@marvell.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201202101212.4717-1-lironh@marvell.com> References: <20201202101212.4717-1-lironh@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.312, 18.0.737 definitions=2020-12-02_04:2020-11-30, 2020-12-02 signatures=0 Subject: [dpdk-dev] [PATCH v1 32/38] net/mvpp2: apply flow-ctrl after port init X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Liron Himi in case ppio was not initialized yet (only at 'start' function) the flow-ctrl setting should be saved for later stage. Signed-off-by: Liron Himi Reviewed-by: Liron Himi Reviewed-by: Michael Shamis Signed-off-by: Liron Himi Reviewed-by: Liron Himi --- drivers/net/mvpp2/mrvl_ethdev.c | 26 +++++++++++++++++++++----- drivers/net/mvpp2/mrvl_ethdev.h | 2 ++ 2 files changed, 23 insertions(+), 5 deletions(-) diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c index d388fde96..fe5fd90ef 100644 --- a/drivers/net/mvpp2/mrvl_ethdev.c +++ b/drivers/net/mvpp2/mrvl_ethdev.c @@ -164,6 +164,8 @@ static int mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on); static int mrvl_promiscuous_enable(struct rte_eth_dev *dev); static int mrvl_allmulticast_enable(struct rte_eth_dev *dev); +static int +mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf); #define MRVL_XSTATS_TBL_ENTRY(name) { \ #name, offsetof(struct pp2_ppio_statistics, name), \ @@ -912,6 +914,15 @@ mrvl_dev_start(struct rte_eth_dev *dev) if (dev->data->promiscuous == 1) mrvl_promiscuous_enable(dev); + if (priv->flow_ctrl) { + ret = mrvl_flow_ctrl_set(dev, &priv->fc_conf); + if (ret) { + MRVL_LOG(ERR, "Failed to configure flow control"); + goto out; + } + priv->flow_ctrl = 0; + } + if (dev->data->dev_link.link_status == ETH_LINK_UP) { ret = mrvl_dev_set_link_up(dev); if (ret) { @@ -2147,8 +2158,10 @@ mrvl_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) struct mrvl_priv *priv = dev->data->dev_private; int ret, en; - if (!priv) - return -EPERM; + if (!priv->ppio) { + memcpy(fc_conf, &priv->fc_conf, sizeof(struct rte_eth_fc_conf)); + return 0; + } fc_conf->autoneg = 1; ret = pp2_ppio_get_rx_pause(priv->ppio, &en); @@ -2194,9 +2207,6 @@ mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) int ret; int rx_en, tx_en; - if (!priv) - return -EPERM; - if (fc_conf->high_water || fc_conf->low_water || fc_conf->pause_time || @@ -2211,6 +2221,12 @@ mrvl_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) return -EINVAL; } + if (!priv->ppio) { + memcpy(&priv->fc_conf, fc_conf, sizeof(struct rte_eth_fc_conf)); + priv->flow_ctrl = 1; + return 0; + } + switch (fc_conf->mode) { case RTE_FC_FULL: rx_en = 1; diff --git a/drivers/net/mvpp2/mrvl_ethdev.h b/drivers/net/mvpp2/mrvl_ethdev.h index ada2c51b2..148f2acba 100644 --- a/drivers/net/mvpp2/mrvl_ethdev.h +++ b/drivers/net/mvpp2/mrvl_ethdev.h @@ -161,6 +161,8 @@ struct mrvl_priv { uint8_t isolated; uint8_t multiseg; uint16_t max_mtu; + uint8_t flow_ctrl; + struct rte_eth_fc_conf fc_conf; struct pp2_ppio_params ppio_params; struct pp2_cls_qos_tbl_params qos_tbl_params;