From patchwork Wed Dec 2 10:11:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liron Himi X-Patchwork-Id: 84687 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8EA25A04DB; Wed, 2 Dec 2020 11:17:13 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BDF56CA90; Wed, 2 Dec 2020 11:12:50 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id DF50ACA68 for ; Wed, 2 Dec 2020 11:12:48 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 0B2AAKqa024171 for ; Wed, 2 Dec 2020 02:12:47 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=pvs79yd5+oGmirRsTiAxl4a9LfYB8HTHAtnMKN2cWgo=; b=QhB0uqcQnGyRi28vokVP7UIuSJ/vpJZ5u/TXTsF0f0l8f77sg8enSaSgW2YsG3ofpGvS KUvIHLIUcm3PA+jGPuC1CuE2Es9vGNvpjsWO+7WVDO0Zm2k1876Cee7h0mZRyL2N0ewO mGpTJX0vUm2bfLxAsYRKrPNf3FK+g1nol2Bn2/1PsE4MJL2/q5uEiU3L/YRbIEAsr3lJ K7bjP4ugmR5C6ViTtrhhYVECDaR7AwD9JHdMxjCbNRdyPeRqW3twQfFaiNmJ3yU3YYkx vVhGws7qDpHUX51LQgzWDES2E2WBDUnOcJ+TI/sVftq56zjIC3IR4Xx059aY90yp6i4D qA== Received: from sc-exch02.marvell.com ([199.233.58.182]) by mx0b-0016f401.pphosted.com with ESMTP id 355w509r57-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Wed, 02 Dec 2020 02:12:47 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 2 Dec 2020 02:12:45 -0800 Received: from pt-lxl0023.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 2 Dec 2020 02:12:44 -0800 From: To: CC: , Yuri Chipchev , Liron Himi Date: Wed, 2 Dec 2020 12:11:48 +0200 Message-ID: <20201202101212.4717-15-lironh@marvell.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201202101212.4717-1-lironh@marvell.com> References: <20201202101212.4717-1-lironh@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.312, 18.0.737 definitions=2020-12-02_04:2020-11-30, 2020-12-02 signatures=0 Subject: [dpdk-dev] [PATCH v1 14/38] net/mvpp2: add vlan offload support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Yuri Chipchev enable vlan filter configuration Signed-off-by: Yuri Chipchev Reviewed-by: Liron Himi Reviewed-by: Michael Shamis Signed-off-by: Yuri Chipchev Reviewed-by: Liron Himi --- drivers/net/mvpp2/mrvl_ethdev.c | 110 +++++++++++++++++++++++++------- 1 file changed, 86 insertions(+), 24 deletions(-) diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c index 5cd9ee38d..a87336a4c 100644 --- a/drivers/net/mvpp2/mrvl_ethdev.c +++ b/drivers/net/mvpp2/mrvl_ethdev.c @@ -620,6 +620,51 @@ mrvl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t queue_id) return 0; } +/** + * Populate Vlan Filter configuration. + * + * @param dev + * Pointer to Ethernet device structure. + * @param on + * Toggle filter. + * + * @return + * 0 on success, negative error value otherwise. + */ +static int mrvl_populate_vlan_table(struct rte_eth_dev *dev, int on) +{ + uint32_t j; + int ret; + struct rte_vlan_filter_conf *vfc; + + vfc = &dev->data->vlan_filter_conf; + for (j = 0; j < RTE_DIM(vfc->ids); j++) { + uint64_t vlan; + uint64_t vbit; + uint64_t ids = vfc->ids[j]; + + if (ids == 0) + continue; + + while (ids) { + vlan = 64 * j; + /* count trailing zeroes */ + vbit = ~ids & (ids - 1); + /* clear least significant bit set */ + ids ^= (ids ^ (ids - 1)) ^ vbit; + for (; vbit; vlan++) + vbit >>= 1; + ret = mrvl_vlan_filter_set(dev, vlan, on); + if (ret) { + MRVL_LOG(ERR, "Failed to setup VLAN filter\n"); + return ret; + } + } + } + + return 0; +} + /** * DPDK callback to start the device. * @@ -635,8 +680,6 @@ mrvl_dev_start(struct rte_eth_dev *dev) struct mrvl_priv *priv = dev->data->dev_private; char match[MRVL_MATCH_LEN]; int ret = 0, i, def_init_size; - uint32_t j; - struct rte_vlan_filter_conf *vfc; struct rte_ether_addr *mac_addr; if (priv->ppio) @@ -731,28 +774,11 @@ mrvl_dev_start(struct rte_eth_dev *dev) if (dev->data->all_multicast == 1) mrvl_allmulticast_enable(dev); - vfc = &dev->data->vlan_filter_conf; - for (j = 0; j < RTE_DIM(vfc->ids); j++) { - uint64_t vlan; - uint64_t vbit; - uint64_t ids = vfc->ids[j]; - - if (ids == 0) - continue; - - while (ids) { - vlan = 64 * j; - /* count trailing zeroes */ - vbit = ~ids & (ids - 1); - /* clear least significant bit set */ - ids ^= (ids ^ (ids - 1)) ^ vbit; - for (; vbit; vlan++) - vbit >>= 1; - ret = mrvl_vlan_filter_set(dev, vlan, 1); - if (ret) { - MRVL_LOG(ERR, "Failed to setup VLAN filter\n"); - goto out; - } + if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_VLAN_FILTER) { + ret = mrvl_populate_vlan_table(dev, 1); + if (ret) { + MRVL_LOG(ERR, "Failed to populate vlan table"); + goto out; } } @@ -1687,6 +1713,41 @@ mrvl_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) pp2_ppio_remove_vlan(priv->ppio, vlan_id); } +/** + * DPDK callback to Configure VLAN offload. + * + * @param dev + * Pointer to Ethernet device structure. + * @param mask + * VLAN offload mask. + * + * @return + * 0 on success, negative error value otherwise. + */ +static int mrvl_vlan_offload_set(struct rte_eth_dev *dev, int mask) +{ + uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads; + int ret; + + if (mask & ETH_VLAN_STRIP_MASK) + MRVL_LOG(ERR, "VLAN stripping is not supported\n"); + + if (mask & ETH_VLAN_FILTER_MASK) { + if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER) + ret = mrvl_populate_vlan_table(dev, 1); + else + ret = mrvl_populate_vlan_table(dev, 0); + + if (ret) + return ret; + } + + if (mask & ETH_VLAN_EXTEND_MASK) + MRVL_LOG(ERR, "Extend VLAN not supported\n"); + + return 0; +} + /** * Release buffers to hardware bpool (buffer-pool) * @@ -2268,6 +2329,7 @@ static const struct eth_dev_ops mrvl_ops = { .rxq_info_get = mrvl_rxq_info_get, .txq_info_get = mrvl_txq_info_get, .vlan_filter_set = mrvl_vlan_filter_set, + .vlan_offload_set = mrvl_vlan_offload_set, .tx_queue_start = mrvl_tx_queue_start, .tx_queue_stop = mrvl_tx_queue_stop, .rx_queue_setup = mrvl_rx_queue_setup,