diff mbox series

[3/8] doc: fix driver names in crypto devices guide

Message ID 20201102174507.1085128-4-bruce.richardson@intel.com (mailing list archive)
State Changes Requested, archived
Delegated to: David Marchand
Headers show
Series fix driver filenames in the docs | expand

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Bruce Richardson Nov. 2, 2020, 5:45 p.m. UTC
Since the built driver filenames have changed in DPDK 20.11, we need to
update the driver doc to match.

Fixes: a20b2c01a7a1 ("build: standardize component names and defines")

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
---
 doc/guides/cryptodevs/aesni_gcm.rst | 2 +-
 doc/guides/cryptodevs/aesni_mb.rst  | 2 +-
 doc/guides/cryptodevs/ccp.rst       | 2 +-
 doc/guides/cryptodevs/kasumi.rst    | 2 +-
 doc/guides/cryptodevs/null.rst      | 2 +-
 doc/guides/cryptodevs/scheduler.rst | 4 ++--
 doc/guides/cryptodevs/zuc.rst       | 2 +-
 7 files changed, 8 insertions(+), 8 deletions(-)

Comments

David Marchand Nov. 2, 2020, 8 p.m. UTC | #1
On Mon, Nov 2, 2020 at 6:46 PM Bruce Richardson
<bruce.richardson@intel.com> wrote:
>
> Since the built driver filenames have changed in DPDK 20.11, we need to
> update the driver doc to match.
>
> Fixes: a20b2c01a7a1 ("build: standardize component names and defines")
>
> Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
> ---
>  doc/guides/cryptodevs/aesni_gcm.rst | 2 +-
>  doc/guides/cryptodevs/aesni_mb.rst  | 2 +-
>  doc/guides/cryptodevs/ccp.rst       | 2 +-
>  doc/guides/cryptodevs/kasumi.rst    | 2 +-
>  doc/guides/cryptodevs/null.rst      | 2 +-
>  doc/guides/cryptodevs/scheduler.rst | 4 ++--
>  doc/guides/cryptodevs/zuc.rst       | 2 +-
>  7 files changed, 8 insertions(+), 8 deletions(-)

We still have:
doc/guides/cryptodevs/mvsam.rst:The MVSAM CRYPTO PMD
(**librte_crypto_mvsam_pmd**) provides poll mode crypto driver


The rest lgtm.
Reviewed-by: David Marchand <david.marchand@redhat.com>
David Marchand Nov. 2, 2020, 8:02 p.m. UTC | #2
On Mon, Nov 2, 2020 at 9:00 PM David Marchand <david.marchand@redhat.com> wrote:
> We still have:
> doc/guides/cryptodevs/mvsam.rst:The MVSAM CRYPTO PMD
> (**librte_crypto_mvsam_pmd**) provides poll mode crypto driver

Ah.. and:
doc/guides/cryptodevs/snow3g.rst:The SNOW3G PMD
(**librte_snow3g_zuc**) provides poll mode crypto driver support for

Grepping librte_ is a better check than pmd.
Bruce Richardson Nov. 3, 2020, 10:28 a.m. UTC | #3
On Mon, Nov 02, 2020 at 09:02:26PM +0100, David Marchand wrote:
> On Mon, Nov 2, 2020 at 9:00 PM David Marchand <david.marchand@redhat.com> wrote:
> > We still have:
> > doc/guides/cryptodevs/mvsam.rst:The MVSAM CRYPTO PMD
> > (**librte_crypto_mvsam_pmd**) provides poll mode crypto driver
> 
> Ah.. and:
> doc/guides/cryptodevs/snow3g.rst:The SNOW3G PMD
> (**librte_snow3g_zuc**) provides poll mode crypto driver support for
> 
> Grepping librte_ is a better check than pmd.
> 
I'll fix these missing 2 in v2.

/Bruce
diff mbox series

Patch

diff --git a/doc/guides/cryptodevs/aesni_gcm.rst b/doc/guides/cryptodevs/aesni_gcm.rst
index e4f244a991..2fd32b021f 100644
--- a/doc/guides/cryptodevs/aesni_gcm.rst
+++ b/doc/guides/cryptodevs/aesni_gcm.rst
@@ -5,7 +5,7 @@  AES-NI GCM Crypto Poll Mode Driver
 ==================================
 
 
-The AES-NI GCM PMD (**librte_pmd_aesni_gcm**) provides poll mode crypto driver
+The AES-NI GCM PMD (**librte_crypto_aesni_gcm**) provides poll mode crypto driver
 support for utilizing Intel multi buffer library (see AES-NI Multi-buffer PMD documentation
 to learn more about it, including installation).
 
diff --git a/doc/guides/cryptodevs/aesni_mb.rst b/doc/guides/cryptodevs/aesni_mb.rst
index 32850c977c..042d95baee 100644
--- a/doc/guides/cryptodevs/aesni_mb.rst
+++ b/doc/guides/cryptodevs/aesni_mb.rst
@@ -5,7 +5,7 @@  AESN-NI Multi Buffer Crypto Poll Mode Driver
 ============================================
 
 
-The AESNI MB PMD (**librte_pmd_aesni_mb**) provides poll mode crypto driver
+The AESNI MB PMD (**librte_crypto_aesni_mb**) provides poll mode crypto driver
 support for utilizing Intel multi buffer library, see the white paper
 `Fast Multi-buffer IPsec Implementations on Intel® Architecture Processors
 <https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/fast-multi-buffer-ipsec-implementations-ia-processors-paper.pdf>`_.
diff --git a/doc/guides/cryptodevs/ccp.rst b/doc/guides/cryptodevs/ccp.rst
index 4cf9f5907e..36dae090f9 100644
--- a/doc/guides/cryptodevs/ccp.rst
+++ b/doc/guides/cryptodevs/ccp.rst
@@ -5,7 +5,7 @@  AMD CCP Poll Mode Driver
 ========================
 
 This code provides the initial implementation of the ccp poll mode driver.
-The CCP poll mode driver library (librte_pmd_ccp) implements support for
+The CCP poll mode driver library (**librte_crypto_ccp**) implements support for
 AMD’s cryptographic co-processor (CCP). The CCP PMD is a virtual crypto
 poll mode driver which schedules crypto operations to one or more available
 CCP hardware engines on the platform. The CCP PMD provides poll mode crypto
diff --git a/doc/guides/cryptodevs/kasumi.rst b/doc/guides/cryptodevs/kasumi.rst
index 5770a60cb2..4790f0ff77 100644
--- a/doc/guides/cryptodevs/kasumi.rst
+++ b/doc/guides/cryptodevs/kasumi.rst
@@ -4,7 +4,7 @@ 
 KASUMI Crypto Poll Mode Driver
 ===============================
 
-The KASUMI PMD (**librte_pmd_kasumi**) provides poll mode crypto driver support for
+The KASUMI PMD (**librte_crypto_kasumi**) provides poll mode crypto driver support for
 utilizing `Intel IPSec Multi-buffer library <https://github.com/01org/intel-ipsec-mb>`_
 which implements F8 and F9 functions for KASUMI UEA1 cipher and UIA1 hash algorithms.
 
diff --git a/doc/guides/cryptodevs/null.rst b/doc/guides/cryptodevs/null.rst
index aac5904b1d..12577fa0bf 100644
--- a/doc/guides/cryptodevs/null.rst
+++ b/doc/guides/cryptodevs/null.rst
@@ -4,7 +4,7 @@ 
 Null Crypto Poll Mode Driver
 ============================
 
-The Null Crypto PMD (**librte_pmd_null_crypto**) provides a crypto poll mode
+The Null Crypto PMD (**librte_crypto_null**) provides a crypto poll mode
 driver which provides a minimal implementation for a software crypto device. As
 a null device it does not modify the data in the mbuf on which the crypto
 operation is to operate and it only has support for a single cipher and
diff --git a/doc/guides/cryptodevs/scheduler.rst b/doc/guides/cryptodevs/scheduler.rst
index 0b731fe8ad..835d999cfa 100644
--- a/doc/guides/cryptodevs/scheduler.rst
+++ b/doc/guides/cryptodevs/scheduler.rst
@@ -13,14 +13,14 @@  crypto ops among them in a certain manner.
    Cryptodev Scheduler Overview
 
 
-The Cryptodev Scheduler PMD library (**librte_pmd_crypto_scheduler**) acts as
+The Cryptodev Scheduler PMD library (**librte_crypto_scheduler**) acts as
 a software crypto PMD and shares the same API provided by librte_cryptodev.
 The PMD supports attaching multiple crypto PMDs, software or hardware, as
 workers, and distributes the crypto workload to them with certain behavior.
 The behaviors are categorizes as different "modes". Basically, a scheduling
 mode defines certain actions for scheduling crypto ops to its workers.
 
-The librte_pmd_crypto_scheduler library exports a C API which provides an API
+The librte_crypto_scheduler library exports a C API which provides an API
 for attaching/detaching workers, set/get scheduling modes, and enable/disable
 crypto ops reordering.
 
diff --git a/doc/guides/cryptodevs/zuc.rst b/doc/guides/cryptodevs/zuc.rst
index 907840ef05..800d371f4b 100644
--- a/doc/guides/cryptodevs/zuc.rst
+++ b/doc/guides/cryptodevs/zuc.rst
@@ -4,7 +4,7 @@ 
 ZUC Crypto Poll Mode Driver
 ===========================
 
-The ZUC PMD (**librte_pmd_zuc**) provides poll mode crypto driver support for
+The ZUC PMD (**librte_crypto_zuc**) provides poll mode crypto driver support for
 utilizing `Intel IPSec Multi-buffer library <https://github.com/01org/intel-ipsec-mb>`_
 which implements F8 and F9 functions for ZUC EEA3 cipher and EIA3 hash algorithms.