diff mbox series

[v2,5/9] net/hns3: offload calculating the shapping para to firmware

Message ID 20200929120117.50394-6-huwei013@chinasoftinc.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers show
Series updates and fixes for hns3 PMD driver | expand

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Wei Hu (Xavier) Sept. 29, 2020, 12:01 p.m. UTC
From: Huisong Li <lihuisong@huawei.com>

In order to have more flexible selection of shapping algorithm based on
different versions of hns3 network engine, moves the algorithm of
calculating shapping parameter to firmware to execute. If bit
HNS3_TM_RATE_VLD_B of flag field of struct named hns3_pri_shapping_cmd,
hns3_pg_shapping_cmd or hns3_port_shapping_cmd is set to 1, firmware of
network engine, which device revision_id is greater than and equal to 0x30,
will recalculate the shapping parameters according to the xxx_rate field
of struct hns3_xxx_shapping_cmd and the opcode of scheduling level, and
configure to hardware.

But driver still needs to calculate shapping parameters and configure
firmware, so as to be compatible with the network engine with revision_id
eqauls 0x21. And the rate and the flag will be ignored based on the network
engine with revision_id equals 0x21.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
---
 drivers/net/hns3/hns3_dcb.c | 55 +++++++++++++++++++++++++++++++++++----------
 drivers/net/hns3/hns3_dcb.h | 39 +++++++++++++++++++++++++-------
 2 files changed, 74 insertions(+), 20 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/hns3/hns3_dcb.c b/drivers/net/hns3/hns3_dcb.c
index fecedff..857e79e 100644
--- a/drivers/net/hns3/hns3_dcb.c
+++ b/drivers/net/hns3/hns3_dcb.c
@@ -365,12 +365,22 @@  hns3_dcb_port_shaper_cfg(struct hns3_hw *hw)
 
 	shap_cfg_cmd->port_shapping_para = rte_cpu_to_le_32(shapping_para);
 
+	/*
+	 * Configure the port_rate and set bit HNS3_TM_RATE_VLD_B of flag
+	 * field in hns3_port_shapping_cmd to require firmware to recalculate
+	 * shapping parameters. And whether the parameters are recalculated
+	 * depends on the firmware version. But driver still needs to
+	 * calculate it and configure to firmware for better compatibility.
+	 */
+	shap_cfg_cmd->port_rate = rte_cpu_to_le_32(hw->mac.link_speed);
+	hns3_set_bit(shap_cfg_cmd->flag, HNS3_TM_RATE_VLD_B, 1);
+
 	return hns3_cmd_send(hw, &desc, 1);
 }
 
 static int
 hns3_dcb_pg_shapping_cfg(struct hns3_hw *hw, enum hns3_shap_bucket bucket,
-			 uint8_t pg_id, uint32_t shapping_para)
+			 uint8_t pg_id, uint32_t shapping_para, uint32_t rate)
 {
 	struct hns3_pg_shapping_cmd *shap_cfg_cmd;
 	enum hns3_opcode_type opcode;
@@ -386,6 +396,16 @@  hns3_dcb_pg_shapping_cfg(struct hns3_hw *hw, enum hns3_shap_bucket bucket,
 
 	shap_cfg_cmd->pg_shapping_para = rte_cpu_to_le_32(shapping_para);
 
+	/*
+	 * Configure the pg_rate and set bit HNS3_TM_RATE_VLD_B of flag field in
+	 * hns3_pg_shapping_cmd to require firmware to recalculate shapping
+	 * parameters. And whether parameters are recalculated depends on
+	 * the firmware version. But driver still needs to calculate it and
+	 * configure to firmware for better compatibility.
+	 */
+	shap_cfg_cmd->pg_rate = rte_cpu_to_le_32(rate);
+	hns3_set_bit(shap_cfg_cmd->flag, HNS3_TM_RATE_VLD_B, 1);
+
 	return hns3_cmd_send(hw, &desc, 1);
 }
 
@@ -397,6 +417,7 @@  hns3_dcb_pg_shaper_cfg(struct hns3_hw *hw)
 	struct hns3_pf *pf = &hns->pf;
 	uint32_t ir_u, ir_b, ir_s;
 	uint32_t shaper_para;
+	uint32_t rate;
 	uint8_t i;
 	int ret;
 
@@ -406,10 +427,10 @@  hns3_dcb_pg_shaper_cfg(struct hns3_hw *hw)
 
 	/* Pg to pri */
 	for (i = 0; i < hw->dcb_info.num_pg; i++) {
+		rate = hw->dcb_info.pg_info[i].bw_limit;
+
 		/* Calc shaper para */
-		ret = hns3_shaper_para_calc(hw,
-					    hw->dcb_info.pg_info[i].bw_limit,
-					    HNS3_SHAPER_LVL_PG,
+		ret = hns3_shaper_para_calc(hw, rate, HNS3_SHAPER_LVL_PG,
 					    &shaper_parameter);
 		if (ret) {
 			hns3_err(hw, "calculate shaper parameter failed: %d",
@@ -422,7 +443,7 @@  hns3_dcb_pg_shaper_cfg(struct hns3_hw *hw)
 							 HNS3_SHAPER_BS_S_DEF);
 
 		ret = hns3_dcb_pg_shapping_cfg(hw, HNS3_DCB_SHAP_C_BUCKET, i,
-					       shaper_para);
+					       shaper_para, rate);
 		if (ret) {
 			hns3_err(hw,
 				 "config PG CIR shaper parameter failed: %d",
@@ -438,7 +459,7 @@  hns3_dcb_pg_shaper_cfg(struct hns3_hw *hw)
 							 HNS3_SHAPER_BS_S_DEF);
 
 		ret = hns3_dcb_pg_shapping_cfg(hw, HNS3_DCB_SHAP_P_BUCKET, i,
-					       shaper_para);
+					       shaper_para, rate);
 		if (ret) {
 			hns3_err(hw,
 				 "config PG PIR shaper parameter failed: %d",
@@ -486,7 +507,7 @@  hns3_dcb_pri_schd_mode_cfg(struct hns3_hw *hw, uint8_t pri_id)
 
 static int
 hns3_dcb_pri_shapping_cfg(struct hns3_hw *hw, enum hns3_shap_bucket bucket,
-			  uint8_t pri_id, uint32_t shapping_para)
+			  uint8_t pri_id, uint32_t shapping_para, uint32_t rate)
 {
 	struct hns3_pri_shapping_cmd *shap_cfg_cmd;
 	enum hns3_opcode_type opcode;
@@ -503,6 +524,16 @@  hns3_dcb_pri_shapping_cfg(struct hns3_hw *hw, enum hns3_shap_bucket bucket,
 
 	shap_cfg_cmd->pri_shapping_para = rte_cpu_to_le_32(shapping_para);
 
+	/*
+	 * Configure the pri_rate and set bit HNS3_TM_RATE_VLD_B of flag
+	 * field in hns3_pri_shapping_cmd to require firmware to recalculate
+	 * shapping parameters. And whether the parameters are recalculated
+	 * depends on the firmware version. But driver still needs to
+	 * calculate it and configure to firmware for better compatibility.
+	 */
+	shap_cfg_cmd->pri_rate = rte_cpu_to_le_32(rate);
+	hns3_set_bit(shap_cfg_cmd->flag, HNS3_TM_RATE_VLD_B, 1);
+
 	return hns3_cmd_send(hw, &desc, 1);
 }
 
@@ -512,12 +543,12 @@  hns3_dcb_pri_tc_base_shaper_cfg(struct hns3_hw *hw)
 	struct hns3_shaper_parameter shaper_parameter;
 	uint32_t ir_u, ir_b, ir_s;
 	uint32_t shaper_para;
+	uint32_t rate;
 	int ret, i;
 
 	for (i = 0; i < hw->dcb_info.num_tc; i++) {
-		ret = hns3_shaper_para_calc(hw,
-					    hw->dcb_info.tc_info[i].bw_limit,
-					    HNS3_SHAPER_LVL_PRI,
+		rate = hw->dcb_info.tc_info[i].bw_limit;
+		ret = hns3_shaper_para_calc(hw, rate, HNS3_SHAPER_LVL_PRI,
 					    &shaper_parameter);
 		if (ret) {
 			hns3_err(hw, "calculate shaper parameter failed: %d",
@@ -530,7 +561,7 @@  hns3_dcb_pri_tc_base_shaper_cfg(struct hns3_hw *hw)
 							 HNS3_SHAPER_BS_S_DEF);
 
 		ret = hns3_dcb_pri_shapping_cfg(hw, HNS3_DCB_SHAP_C_BUCKET, i,
-						shaper_para);
+						shaper_para, rate);
 		if (ret) {
 			hns3_err(hw,
 				 "config priority CIR shaper parameter failed: %d",
@@ -546,7 +577,7 @@  hns3_dcb_pri_tc_base_shaper_cfg(struct hns3_hw *hw)
 							 HNS3_SHAPER_BS_S_DEF);
 
 		ret = hns3_dcb_pri_shapping_cfg(hw, HNS3_DCB_SHAP_P_BUCKET, i,
-						shaper_para);
+						shaper_para, rate);
 		if (ret) {
 			hns3_err(hw,
 				 "config priority PIR shaper parameter failed: %d",
diff --git a/drivers/net/hns3/hns3_dcb.h b/drivers/net/hns3/hns3_dcb.h
index 05c9786..39ff332 100644
--- a/drivers/net/hns3/hns3_dcb.h
+++ b/drivers/net/hns3/hns3_dcb.h
@@ -16,7 +16,7 @@ 
 
 /* SP or DWRR */
 #define HNS3_DCB_TX_SCHD_DWRR_MSK	BIT(0)
-#define HNS3_DCB_TX_SCHD_SP_MSK		(0xFE)
+#define HNS3_DCB_TX_SCHD_SP_MSK		0xFE
 
 enum hns3_shap_bucket {
 	HNS3_DCB_SHAP_C_BUCKET = 0,
@@ -81,18 +81,46 @@  struct hns3_nq_to_qs_link_cmd {
 #define HNS3_DCB_SHAP_BS_S_MSK  GENMASK(25, 21)
 #define HNS3_DCB_SHAP_BS_S_LSH	21
 
+/*
+ * For more flexible selection of shapping algorithm in different network
+ * engine, the algorithm calculating shapping parameter is moved to firmware to
+ * execute. Bit HNS3_TM_RATE_VLD_B of flag field in hns3_pri_shapping_cmd,
+ * hns3_pg_shapping_cmd or hns3_port_shapping_cmd is set to 1 to require
+ * firmware to recalculate shapping parameters. However, whether the parameters
+ * are recalculated depends on the firmware version. If firmware doesn't support
+ * the calculation of shapping parameters, such as on network engine with
+ * revision id 0x21, the value driver calculated will be used to configure to
+ * hardware. On the contrary, firmware ignores configuration of driver
+ * and recalculates the parameter.
+ */
+#define HNS3_TM_RATE_VLD_B	0
+
 struct hns3_pri_shapping_cmd {
 	uint8_t pri_id;
 	uint8_t rsvd[3];
 	uint32_t pri_shapping_para;
-	uint32_t rsvd1[4];
+	uint8_t flag;
+	uint8_t rsvd1[3];
+	uint32_t pri_rate;  /* Unit Mbps */
+	uint8_t rsvd2[8];
 };
 
 struct hns3_pg_shapping_cmd {
 	uint8_t pg_id;
 	uint8_t rsvd[3];
 	uint32_t pg_shapping_para;
-	uint32_t rsvd1[4];
+	uint8_t flag;
+	uint8_t rsvd1[3];
+	uint32_t pg_rate; /* Unit Mbps */
+	uint8_t rsvd2[8];
+};
+
+struct hns3_port_shapping_cmd {
+	uint32_t port_shapping_para;
+	uint8_t flag;
+	uint8_t rsvd[3];
+	uint32_t port_rate;   /* Unit Mbps */
+	uint8_t rsvd1[12];
 };
 
 #define HNS3_BP_GRP_NUM			32
@@ -115,11 +143,6 @@  struct hns3_pfc_en_cmd {
 	uint8_t rsvd[22];
 };
 
-struct hns3_port_shapping_cmd {
-	uint32_t port_shapping_para;
-	uint32_t rsvd[5];
-};
-
 struct hns3_cfg_pause_param_cmd {
 	uint8_t mac_addr[RTE_ETHER_ADDR_LEN];
 	uint8_t pause_trans_gap;