From patchwork Thu Sep 24 08:18:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Radu Nicolau X-Patchwork-Id: 78655 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 11B82A04B1; Thu, 24 Sep 2020 10:19:47 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id CE8061DDA1; Thu, 24 Sep 2020 10:19:39 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 487091DB36 for ; Thu, 24 Sep 2020 10:19:27 +0200 (CEST) IronPort-SDR: fJGdDFOCP0/4a7K91C9amwPQeRJQz3kML46O77ll5mwK+mrqBjaqAkWMux0St9nv7kFAL70s4r jPZylpqUCbag== X-IronPort-AV: E=McAfee;i="6000,8403,9753"; a="148790637" X-IronPort-AV: E=Sophos;i="5.77,296,1596524400"; d="scan'208";a="148790637" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Sep 2020 01:19:26 -0700 IronPort-SDR: oqnxaZTUtdUF2e7WDi8B1zgKI+BaGJpry+rTm0DKmeuQhHdlya0upq2Jac7N4HS/YaK5I48BBh uq6P0C7Pv4FA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,296,1596524400"; d="scan'208";a="455255013" Received: from silpixa00399477.ir.intel.com ([10.237.214.232]) by orsmga004.jf.intel.com with ESMTP; 24 Sep 2020 01:19:21 -0700 From: Radu Nicolau To: dev@dpdk.org Cc: thomas@monjalon.net, david.marchand@redhat.com, viktorin@rehivetech.com, ruifeng.wang@arm.com, jerinj@marvell.com, drc@linux.vnet.ibm.com, bruce.richardson@intel.com, konstantin.ananyev@intel.com, Radu Nicolau , Sean Morrissey Date: Thu, 24 Sep 2020 08:18:31 +0000 Message-Id: <20200924081832.21581-4-radu.nicolau@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200924081832.21581-1-radu.nicolau@intel.com> References: <20200902104343.31774-2-radu.nicolau@intel.com> <20200924081832.21581-1-radu.nicolau@intel.com> Subject: [dpdk-dev] [PATCH v3 3/4] ppc: change cpuflag macros to compiler macros X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Replace use of RTE_MACHINE_CPUFLAG macros with regular compiler macros, which are more complete than those provided by DPDK, and as such it allows new instruction sets to be leveraged without having to do extra work to set them up in DPDK. Signed-off-by: Sean Morrissey Signed-off-by: Radu Nicolau Reviewed-by: David Christensen --- config/ppc/meson.build | 2 -- examples/l3fwd/l3fwd_em.c | 2 +- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/config/ppc/meson.build b/config/ppc/meson.build index aa7d73d11..0d8da87e6 100644 --- a/config/ppc/meson.build +++ b/config/ppc/meson.build @@ -21,5 +21,3 @@ endif dpdk_conf.set('RTE_MAX_LCORE', 1536) dpdk_conf.set('RTE_MAX_NUMA_NODES', 32) dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128) -dpdk_conf.set('RTE_MACHINE_CPUFLAG_ALTIVEC', 1) -dpdk_conf.set('RTE_MACHINE_CPUFLAG_VSX', 1) diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c index 3b35fa3e5..c529dcd3e 100644 --- a/examples/l3fwd/l3fwd_em.c +++ b/examples/l3fwd/l3fwd_em.c @@ -231,7 +231,7 @@ em_mask_key(void *key, xmm_t mask) return vandq_s32(data, mask); } -#elif defined(RTE_MACHINE_CPUFLAG_ALTIVEC) +#elif defined(__ALTIVEC__) static inline xmm_t em_mask_key(void *key, xmm_t mask) {