From patchwork Wed Aug 26 09:55:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Radu Nicolau X-Patchwork-Id: 75989 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5695BA04B2; Wed, 26 Aug 2020 11:56:46 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 087BD1C0BE; Wed, 26 Aug 2020 11:56:18 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 874CA1C0AF for ; Wed, 26 Aug 2020 11:56:15 +0200 (CEST) IronPort-SDR: 2hkVeadccgGOCvFJRul/+kf8vzCsVkGyTLE0+gYqZOqt9onzRDsN/G2k1hCCRU6AM2J1bo2OFr zowMA8iRbM+Q== X-IronPort-AV: E=McAfee;i="6000,8403,9724"; a="157301368" X-IronPort-AV: E=Sophos;i="5.76,355,1592895600"; d="scan'208";a="157301368" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Aug 2020 02:56:15 -0700 IronPort-SDR: UJhb8nqxcYzAW7EhYeepnp1i0mBo6f7dv6RFvFrTLwklf3fwnxsdERYI/WSafJH7Ewbcg1CvWZ Wd7mWeafdd5A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,355,1592895600"; d="scan'208";a="295319516" Received: from silpixa00400567.ir.intel.com ([10.237.214.190]) by orsmga003.jf.intel.com with ESMTP; 26 Aug 2020 02:56:12 -0700 From: Radu Nicolau To: dev@dpdk.org Cc: beilei.xing@intel.com, jia.guo@intel.com, bruce.richardson@intel.com, konstantin.ananyev@intel.com, jerinjacobk@gmail.com, david.marchand@redhat.com, fiona.trahe@intel.com, wei.zhao1@intel.com, ruifeng.wang@arm.com, qiming.yang@intel.com, qi.z.zhang@intel.com, Radu Nicolau Date: Wed, 26 Aug 2020 10:55:52 +0100 Message-Id: <20200826095552.82525-6-radu.nicolau@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200826095552.82525-1-radu.nicolau@intel.com> References: <1591870283-7776-1-git-send-email-radu.nicolau@intel.com> <20200826095552.82525-1-radu.nicolau@intel.com> Subject: [dpdk-dev] [PATCH v11 5/5] net/ice: use WC store to update queue tail registers X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Performance improvement: use a write combining store instead of a regular mmio write to update queue tail registers. Signed-off-by: Radu Nicolau Reviewed-by: Wenzhuo Lu --- drivers/net/ice/base/ice_osdep.h | 1 + drivers/net/ice/ice_rxtx.c | 6 +++--- drivers/net/ice/ice_rxtx_vec_avx2.c | 4 ++-- drivers/net/ice/ice_rxtx_vec_sse.c | 4 ++-- 4 files changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/net/ice/base/ice_osdep.h b/drivers/net/ice/base/ice_osdep.h index 360e435b8..c793f1e38 100644 --- a/drivers/net/ice/base/ice_osdep.h +++ b/drivers/net/ice/base/ice_osdep.h @@ -165,6 +165,7 @@ do { \ #endif #define ICE_PCI_REG_WRITE(reg, value) writel(value, reg) +#define ICE_PCI_REG_WC_WRITE(reg, value) rte_write32_wc(value, reg) #define ICE_READ_REG(hw, reg) rd32(hw, reg) #define ICE_WRITE_REG(hw, reg, value) wr32(hw, reg, value) diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c index 2e1f06d2c..d23841623 100644 --- a/drivers/net/ice/ice_rxtx.c +++ b/drivers/net/ice/ice_rxtx.c @@ -1741,7 +1741,7 @@ ice_recv_scattered_pkts(void *rx_queue, rx_id = (uint16_t)(rx_id == 0 ? (rxq->nb_rx_desc - 1) : (rx_id - 1)); /* write TAIL register */ - ICE_PCI_REG_WRITE(rxq->qrx_tail, rx_id); + ICE_PCI_REG_WC_WRITE(rxq->qrx_tail, rx_id); nb_hold = 0; } rxq->nb_rx_hold = nb_hold; @@ -2131,7 +2131,7 @@ ice_recv_pkts(void *rx_queue, rx_id = (uint16_t)(rx_id == 0 ? (rxq->nb_rx_desc - 1) : (rx_id - 1)); /* write TAIL register */ - ICE_PCI_REG_WRITE(rxq->qrx_tail, rx_id); + ICE_PCI_REG_WC_WRITE(rxq->qrx_tail, rx_id); nb_hold = 0; } rxq->nb_rx_hold = nb_hold; @@ -2846,7 +2846,7 @@ tx_xmit_pkts(struct ice_tx_queue *txq, txq->tx_tail = 0; /* Update the tx tail register */ - ICE_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail); + ICE_PCI_REG_WC_WRITE(txq->qtx_tail, txq->tx_tail); return nb_pkts; } diff --git a/drivers/net/ice/ice_rxtx_vec_avx2.c b/drivers/net/ice/ice_rxtx_vec_avx2.c index be50677c2..d9d475863 100644 --- a/drivers/net/ice/ice_rxtx_vec_avx2.c +++ b/drivers/net/ice/ice_rxtx_vec_avx2.c @@ -129,7 +129,7 @@ ice_rxq_rearm(struct ice_rx_queue *rxq) (rxq->nb_rx_desc - 1) : (rxq->rxrearm_start - 1)); /* Update the tail pointer on the NIC */ - ICE_PCI_REG_WRITE(rxq->qrx_tail, rx_id); + ICE_PCI_REG_WC_WRITE(rxq->qrx_tail, rx_id); } static inline uint16_t @@ -810,7 +810,7 @@ ice_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts, txq->tx_tail = tx_id; - ICE_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail); + ICE_PCI_REG_WC_WRITE(txq->qtx_tail, txq->tx_tail); return nb_pkts; } diff --git a/drivers/net/ice/ice_rxtx_vec_sse.c b/drivers/net/ice/ice_rxtx_vec_sse.c index 382ef31f3..3de162af0 100644 --- a/drivers/net/ice/ice_rxtx_vec_sse.c +++ b/drivers/net/ice/ice_rxtx_vec_sse.c @@ -78,7 +78,7 @@ ice_rxq_rearm(struct ice_rx_queue *rxq) (rxq->nb_rx_desc - 1) : (rxq->rxrearm_start - 1)); /* Update the tail pointer on the NIC */ - ICE_PCI_REG_WRITE(rxq->qrx_tail, rx_id); + ICE_PCI_REG_WC_WRITE(rxq->qrx_tail, rx_id); } static inline void @@ -583,7 +583,7 @@ ice_xmit_fixed_burst_vec(void *tx_queue, struct rte_mbuf **tx_pkts, txq->tx_tail = tx_id; - ICE_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail); + ICE_PCI_REG_WC_WRITE(txq->qtx_tail, txq->tx_tail); return nb_pkts; }