[v6,1/2] eal/arm64: update CPU flags

Message ID 20200819105638.52010-2-huwei013@chinasoftinc.com (mailing list archive)
State Accepted, archived
Delegated to: Thomas Monjalon
Headers
Series update CPU flags for arm64 platform |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Wei Hu (Xavier) Aug. 19, 2020, 10:56 a.m. UTC
  From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com>

ARM64 Linux kernel updated the CPU flags using the HWCAP scheme.
The related marco definition can be found in linux kernel:
  arch/arm64/include/uapi/asm/hwcap.h

This patch incorporates those changes to the eal library.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
---
v4 -> v5:
	No change.
v3 -> v4:
	Update commit log.
v2 -> v3:
	1. Change commit log.
	2. Add HWCAP2_FLAGM2 and HWCAP2_FRINT to rte_cpu_feature_table[].
	3. Add the flags for newly added items into enum rte_cpu_flag_t.
v1 -> v2:
	Adds more sve-related definition to rte_cpu_feature_table,
	sunch as SVE2, etc.
---
 lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++++++++
 lib/librte_eal/arm/rte_cpuflags.c            | 13 +++++++++++++
 2 files changed, 26 insertions(+)
  

Comments

Wei Hu (Xavier) Oct. 12, 2020, 3:30 a.m. UTC | #1
Hi, Thomas Monjalon

For this series, ARM engineer has already given them backed by. If you 
have no other opinion, can we merge them? so we can continue to promote 
other patch sets accelerated by using SVE instructions.
Hope for your reply, thanks.

   Regards
Xavier

On 2020/8/19 18:56, Wei Hu (Xavier) wrote:
> From: "Wei Hu (Xavier)" <xavier.huwei@huawei.com>
>
> ARM64 Linux kernel updated the CPU flags using the HWCAP scheme.
> The related marco definition can be found in linux kernel:
>    arch/arm64/include/uapi/asm/hwcap.h
>
> This patch incorporates those changes to the eal library.
>
> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
> ---
> v4 -> v5:
> 	No change.
> v3 -> v4:
> 	Update commit log.
> v2 -> v3:
> 	1. Change commit log.
> 	2. Add HWCAP2_FLAGM2 and HWCAP2_FRINT to rte_cpu_feature_table[].
> 	3. Add the flags for newly added items into enum rte_cpu_flag_t.
> v1 -> v2:
> 	Adds more sve-related definition to rte_cpu_feature_table,
> 	sunch as SVE2, etc.
> ---
>   lib/librte_eal/arm/include/rte_cpuflags_64.h | 13 +++++++++++++
>   lib/librte_eal/arm/rte_cpuflags.c            | 13 +++++++++++++
>   2 files changed, 26 insertions(+)
>
> diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h b/lib/librte_eal/arm/include/rte_cpuflags_64.h
> index 95cc01474..aa7a56d49 100644
> --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h
> +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h
> @@ -22,6 +22,19 @@ enum rte_cpu_flag_t {
>   	RTE_CPUFLAG_SHA2,
>   	RTE_CPUFLAG_CRC32,
>   	RTE_CPUFLAG_ATOMICS,
> +	RTE_CPUFLAG_SVE,
> +	RTE_CPUFLAG_SVE2,
> +	RTE_CPUFLAG_SVEAES,
> +	RTE_CPUFLAG_SVEPMULL,
> +	RTE_CPUFLAG_SVEBITPERM,
> +	RTE_CPUFLAG_SVESHA3,
> +	RTE_CPUFLAG_SVESM4,
> +	RTE_CPUFLAG_FLAGM2,
> +	RTE_CPUFLAG_FRINT,
> +	RTE_CPUFLAG_SVEI8MM,
> +	RTE_CPUFLAG_SVEF32MM,
> +	RTE_CPUFLAG_SVEF64MM,
> +	RTE_CPUFLAG_SVEBF16,
>   	RTE_CPUFLAG_AARCH64,
>   	/* The last item */
>   	RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
> diff --git a/lib/librte_eal/arm/rte_cpuflags.c b/lib/librte_eal/arm/rte_cpuflags.c
> index caf3dc83a..7b257b787 100644
> --- a/lib/librte_eal/arm/rte_cpuflags.c
> +++ b/lib/librte_eal/arm/rte_cpuflags.c
> @@ -95,6 +95,19 @@ const struct feature_entry rte_cpu_feature_table[] = {
>   	FEAT_DEF(SHA2,		REG_HWCAP,    6)
>   	FEAT_DEF(CRC32,		REG_HWCAP,    7)
>   	FEAT_DEF(ATOMICS,	REG_HWCAP,    8)
> +	FEAT_DEF(SVE,		REG_HWCAP,    22)
> +	FEAT_DEF(SVE2,		REG_HWCAP2,   1)
> +	FEAT_DEF(SVEAES,	REG_HWCAP2,   2)
> +	FEAT_DEF(SVEPMULL,	REG_HWCAP2,   3)
> +	FEAT_DEF(SVEBITPERM,	REG_HWCAP2,   4)
> +	FEAT_DEF(SVESHA3,	REG_HWCAP2,   5)
> +	FEAT_DEF(SVESM4,	REG_HWCAP2,   6)
> +	FEAT_DEF(FLAGM2,	REG_HWCAP2,   7)
> +	FEAT_DEF(FRINT,		REG_HWCAP2,   8)
> +	FEAT_DEF(SVEI8MM,	REG_HWCAP2,   9)
> +	FEAT_DEF(SVEF32MM,	REG_HWCAP2,   10)
> +	FEAT_DEF(SVEF64MM,	REG_HWCAP2,   11)
> +	FEAT_DEF(SVEBF16,	REG_HWCAP2,   12)
>   	FEAT_DEF(AARCH64,	REG_PLATFORM, 1)
>   };
>   #endif /* RTE_ARCH */
  

Patch

diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h b/lib/librte_eal/arm/include/rte_cpuflags_64.h
index 95cc01474..aa7a56d49 100644
--- a/lib/librte_eal/arm/include/rte_cpuflags_64.h
+++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h
@@ -22,6 +22,19 @@  enum rte_cpu_flag_t {
 	RTE_CPUFLAG_SHA2,
 	RTE_CPUFLAG_CRC32,
 	RTE_CPUFLAG_ATOMICS,
+	RTE_CPUFLAG_SVE,
+	RTE_CPUFLAG_SVE2,
+	RTE_CPUFLAG_SVEAES,
+	RTE_CPUFLAG_SVEPMULL,
+	RTE_CPUFLAG_SVEBITPERM,
+	RTE_CPUFLAG_SVESHA3,
+	RTE_CPUFLAG_SVESM4,
+	RTE_CPUFLAG_FLAGM2,
+	RTE_CPUFLAG_FRINT,
+	RTE_CPUFLAG_SVEI8MM,
+	RTE_CPUFLAG_SVEF32MM,
+	RTE_CPUFLAG_SVEF64MM,
+	RTE_CPUFLAG_SVEBF16,
 	RTE_CPUFLAG_AARCH64,
 	/* The last item */
 	RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
diff --git a/lib/librte_eal/arm/rte_cpuflags.c b/lib/librte_eal/arm/rte_cpuflags.c
index caf3dc83a..7b257b787 100644
--- a/lib/librte_eal/arm/rte_cpuflags.c
+++ b/lib/librte_eal/arm/rte_cpuflags.c
@@ -95,6 +95,19 @@  const struct feature_entry rte_cpu_feature_table[] = {
 	FEAT_DEF(SHA2,		REG_HWCAP,    6)
 	FEAT_DEF(CRC32,		REG_HWCAP,    7)
 	FEAT_DEF(ATOMICS,	REG_HWCAP,    8)
+	FEAT_DEF(SVE,		REG_HWCAP,    22)
+	FEAT_DEF(SVE2,		REG_HWCAP2,   1)
+	FEAT_DEF(SVEAES,	REG_HWCAP2,   2)
+	FEAT_DEF(SVEPMULL,	REG_HWCAP2,   3)
+	FEAT_DEF(SVEBITPERM,	REG_HWCAP2,   4)
+	FEAT_DEF(SVESHA3,	REG_HWCAP2,   5)
+	FEAT_DEF(SVESM4,	REG_HWCAP2,   6)
+	FEAT_DEF(FLAGM2,	REG_HWCAP2,   7)
+	FEAT_DEF(FRINT,		REG_HWCAP2,   8)
+	FEAT_DEF(SVEI8MM,	REG_HWCAP2,   9)
+	FEAT_DEF(SVEF32MM,	REG_HWCAP2,   10)
+	FEAT_DEF(SVEF64MM,	REG_HWCAP2,   11)
+	FEAT_DEF(SVEBF16,	REG_HWCAP2,   12)
 	FEAT_DEF(AARCH64,	REG_PLATFORM, 1)
 };
 #endif /* RTE_ARCH */