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[v3,1/2] ethdev: add level support for RSS offload types

Message ID 20200818072143.2189928-1-kirankumark@marvell.com (mailing list archive)
State Superseded, archived
Headers show
Series [v3,1/2] ethdev: add level support for RSS offload types | expand

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Context Check Description
ci/checkpatch success coding style OK

Commit Message

Kiran Kumar Kokkilagadda Aug. 18, 2020, 7:21 a.m. UTC
From: Kiran Kumar K <kirankumark@marvell.com>

This patch reserves 2 bits as input selection to select Inner and
outer layers for RSS computation. It is combined with existing
ETH_RSS_* to choose Inner or outer layers for L2, L3 and L4.
This functionality already exists in rte_flow through level parameter in
RSS action configuration rte_flow_action_rss.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
---
V3 Changes:
* Added testpmd support.

 app/test-pmd/parameters.c      |  6 ++++++
 lib/librte_ethdev/rte_ethdev.h | 27 +++++++++++++++++++++++++++
 2 files changed, 33 insertions(+)

--
2.25.1

Comments

Ajit Khaparde Aug. 18, 2020, 5:39 p.m. UTC | #1
On Tue, Aug 18, 2020 at 12:22 AM <kirankumark@marvell.com> wrote:

> From: Kiran Kumar K <kirankumark@marvell.com>
>
> This patch reserves 2 bits as input selection to select Inner and
> outer layers for RSS computation. It is combined with existing
> ETH_RSS_* to choose Inner or outer layers for L2, L3 and L4.
> This functionality already exists in rte_flow through level parameter in
> RSS action configuration rte_flow_action_rss.
>
> Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
> ---
> V3 Changes:
> * Added testpmd support.
>
>  app/test-pmd/parameters.c      |  6 ++++++
>  lib/librte_ethdev/rte_ethdev.h | 27 +++++++++++++++++++++++++++
>  2 files changed, 33 insertions(+)
>
> diff --git a/app/test-pmd/parameters.c b/app/test-pmd/parameters.c
> index 7cb0e3d6e..5f669ff24 100644
> --- a/app/test-pmd/parameters.c
> +++ b/app/test-pmd/parameters.c
> @@ -632,6 +632,8 @@ launch_args_parse(int argc, char** argv)
>                 { "forward-mode",               1, 0, 0 },
>                 { "rss-ip",                     0, 0, 0 },
>                 { "rss-udp",                    0, 0, 0 },
> +               { "rss-outer",                  0, 0, 0 },
> +               { "rss-inner-outer",            0, 0, 0 },
>
If we don't specify any of these two, it is inner RSS?
If I configure rss-outer, how do I switch to inner RSS?

Thanks

>                 { "rxq",                        1, 0, 0 },
>                 { "txq",                        1, 0, 0 },
>                 { "rxd",                        1, 0, 0 },
> @@ -1051,6 +1053,10 @@ launch_args_parse(int argc, char** argv)
>                                 rss_hf = ETH_RSS_IP;
>                         if (!strcmp(lgopts[opt_idx].name, "rss-udp"))
>                                 rss_hf = ETH_RSS_UDP;
> +                       if (!strcmp(lgopts[opt_idx].name, "rss-outer"))
> +                               rss_hf |= ETH_RSS_LEVEL_OUTER;
> +                       if (!strcmp(lgopts[opt_idx].name,
> "rss-inner-outer"))
> +                               rss_hf |= ETH_RSS_LEVEL_INNER_OUTER;
>                         if (!strcmp(lgopts[opt_idx].name, "rxq")) {
>                                 n = atoi(optarg);
>                                 if (n >= 0 && check_nb_rxq((queueid_t)n)
> == 0)
> diff --git a/lib/librte_ethdev/rte_ethdev.h
> b/lib/librte_ethdev/rte_ethdev.h
> index d29930fd8..28184cc85 100644
> --- a/lib/librte_ethdev/rte_ethdev.h
> +++ b/lib/librte_ethdev/rte_ethdev.h
> @@ -552,6 +552,33 @@ struct rte_eth_rss_conf {
>  #define RTE_ETH_RSS_L3_PRE64      (1ULL << 53)
>  #define RTE_ETH_RSS_L3_PRE96      (1ULL << 52)
>
> +/*
> + * We use the following macros to combine with the above layers to choose
> + * inner and outer layers or both for RSS computation.
> + * Note: Default is 0: inner layers, 1: outer layers, 2: both
> + * bit 50 and 51 are reserved for this.
> + */
> +
> +/**
> + * Level 0, It basically stands for the innermost encapsulation level RSS
> + * can be performed on according to PMD and device capabilities.
> + */
> +#define ETH_RSS_LEVEL_INNER        (0ULL << 50)
> +/**
> + * Level 1, It basically stands for the outermost encapsulation level RSS
> + * can be performed on according to PMD and device capabilities.
> + */
> +#define ETH_RSS_LEVEL_OUTER        (1ULL << 50)
> +/**
> + * Level 2, It basically stands for the both inner and outermost
> + * encapsulation level RSS can be performed on according to PMD and
> + * device capabilities.
> + */
> +#define ETH_RSS_LEVEL_INNER_OUTER  (2ULL << 50)
> +#define ETH_RSS_LEVEL_MASK        (3ULL << 50)
> +
> +#define ETH_RSS_LEVEL(rss_hf) ((rss_hf & ETH_RSS_LEVEL_MASK) >> 50)
> +
>  /**
>   * For input set change of hash filter, if SRC_ONLY and DST_ONLY of
>   * the same level are used simultaneously, it is the same case as
> --
> 2.25.1
>
>
Kiran Kumar Kokkilagadda Aug. 19, 2020, 3:58 a.m. UTC | #2
From: Ajit Khaparde <ajit.khaparde@broadcom.com>
Sent: Tuesday, August 18, 2020 11:09 PM
To: Kiran Kumar Kokkilagadda <kirankumark@marvell.com>
Cc: Wenzhuo Lu <wenzhuo.lu@intel.com>; Beilei Xing <beilei.xing@intel.com>; Bernard Iremonger <bernard.iremonger@intel.com>; Thomas Monjalon <thomas@monjalon.net>; Ferruh Yigit <ferruh.yigit@intel.com>; Andrew Rybchenko <arybchenko@solarflare.com>; dpdk-dev <dev@dpdk.org>; Jerin Jacob Kollanukkaran <jerinj@marvell.com>; Ori Kam <orika@mellanox.com>; Ziyang Xuan <xuanziyang2@huawei.com>; Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>; Guoyang Zhou <zhouguoyang@huawei.com>; Rosen Xu <rosen.xu@intel.com>; jia.guo@intel.com; Rasesh Mody <rmody@marvell.com>; Shahed Shaikh <shshaikh@marvell.com>; Nithin Kumar Dabilpuram <ndabilpuram@marvell.com>; Qiming Yang <qiming.yang@intel.com>; Qi Zhang <qi.z.zhang@intel.com>; Wiles, Keith <keith.wiles@intel.com>; Hemant Agrawal <hemant.agrawal@nxp.com>; Sachin Saxena <sachin.saxena@nxp.com>; Zhao1, Wei <wei.zhao1@intel.com>; John Daley <johndale@cisco.com>; Hyong Youb Kim <hyonkim@cisco.com>; Chas Williams <chas3@att.com>; Matan Azrad <matan@mellanox.com>; Shahaf Shuler <shahafs@mellanox.com>; Viacheslav Ovsiienko <viacheslavo@mellanox.com>; Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>; Gaetan Rivet <grive@u256.net>; Liron Himi <lironh@marvell.com>; Jingjing Wu <jingjing.wu@intel.com>; Wei Hu (Xavier <xavier.huwei@huawei.com>; humin29@huawei.com; yisen.zhuang@huawei.com; Somnath Kotur <somnath.kotur@broadcom.com>; Singh, Jasvinder <jasvinder.singh@intel.com>; Dumitrescu, Cristian <cristian.dumitrescu@intel.com>
Subject: [EXT] Re: [dpdk-dev][PATCH v3 1/2] ethdev: add level support for RSS offload types

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Patch

diff --git a/app/test-pmd/parameters.c b/app/test-pmd/parameters.c
index 7cb0e3d6e..5f669ff24 100644
--- a/app/test-pmd/parameters.c
+++ b/app/test-pmd/parameters.c
@@ -632,6 +632,8 @@  launch_args_parse(int argc, char** argv)
 		{ "forward-mode",               1, 0, 0 },
 		{ "rss-ip",			0, 0, 0 },
 		{ "rss-udp",			0, 0, 0 },
+		{ "rss-outer",			0, 0, 0 },
+		{ "rss-inner-outer",		0, 0, 0 },
 		{ "rxq",			1, 0, 0 },
 		{ "txq",			1, 0, 0 },
 		{ "rxd",			1, 0, 0 },
@@ -1051,6 +1053,10 @@  launch_args_parse(int argc, char** argv)
 				rss_hf = ETH_RSS_IP;
 			if (!strcmp(lgopts[opt_idx].name, "rss-udp"))
 				rss_hf = ETH_RSS_UDP;
+			if (!strcmp(lgopts[opt_idx].name, "rss-outer"))
+				rss_hf |= ETH_RSS_LEVEL_OUTER;
+			if (!strcmp(lgopts[opt_idx].name, "rss-inner-outer"))
+				rss_hf |= ETH_RSS_LEVEL_INNER_OUTER;
 			if (!strcmp(lgopts[opt_idx].name, "rxq")) {
 				n = atoi(optarg);
 				if (n >= 0 && check_nb_rxq((queueid_t)n) == 0)
diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
index d29930fd8..28184cc85 100644
--- a/lib/librte_ethdev/rte_ethdev.h
+++ b/lib/librte_ethdev/rte_ethdev.h
@@ -552,6 +552,33 @@  struct rte_eth_rss_conf {
 #define RTE_ETH_RSS_L3_PRE64	   (1ULL << 53)
 #define RTE_ETH_RSS_L3_PRE96	   (1ULL << 52)

+/*
+ * We use the following macros to combine with the above layers to choose
+ * inner and outer layers or both for RSS computation.
+ * Note: Default is 0: inner layers, 1: outer layers, 2: both
+ * bit 50 and 51 are reserved for this.
+ */
+
+/**
+ * Level 0, It basically stands for the innermost encapsulation level RSS
+ * can be performed on according to PMD and device capabilities.
+ */
+#define ETH_RSS_LEVEL_INNER        (0ULL << 50)
+/**
+ * Level 1, It basically stands for the outermost encapsulation level RSS
+ * can be performed on according to PMD and device capabilities.
+ */
+#define ETH_RSS_LEVEL_OUTER        (1ULL << 50)
+/**
+ * Level 2, It basically stands for the both inner and outermost
+ * encapsulation level RSS can be performed on according to PMD and
+ * device capabilities.
+ */
+#define ETH_RSS_LEVEL_INNER_OUTER  (2ULL << 50)
+#define ETH_RSS_LEVEL_MASK	   (3ULL << 50)
+
+#define ETH_RSS_LEVEL(rss_hf) ((rss_hf & ETH_RSS_LEVEL_MASK) >> 50)
+
 /**
  * For input set change of hash filter, if SRC_ONLY and DST_ONLY of
  * the same level are used simultaneously, it is the same case as