From patchwork Fri Jul 24 05:32:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 74718 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 92267A0518; Fri, 24 Jul 2020 07:34:16 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 484711C0D0; Fri, 24 Jul 2020 07:33:31 +0200 (CEST) Received: from mail-ua1-f97.google.com (mail-ua1-f97.google.com [209.85.222.97]) by dpdk.org (Postfix) with ESMTP id 190401C0B3 for ; Fri, 24 Jul 2020 07:33:16 +0200 (CEST) Received: by mail-ua1-f97.google.com with SMTP id j21so2570889ual.11 for ; Thu, 23 Jul 2020 22:33:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bWkP+pjfsRG/8XJj3nVNZBFhYajSYkvhUKx5ouiBN50=; b=J+gxU8OloORIia8I3dGQrnXWpuf+z7LKUHcl1lcA72d0iHhT5WGm8bHDhMU/2Xp3ha 1kMcuGbCjALuGvEPwgAKiny5yUtpKhHWPUJSR/sqehi9B8VcJcqVdVirWmXb4rfsaN8L eapIEZcSgepT8aoy31E5NeYsIwcIW0mgycz6s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bWkP+pjfsRG/8XJj3nVNZBFhYajSYkvhUKx5ouiBN50=; b=FxneMth0G5lE4OW71K6O57uYqlR4IOxvtJ1gHEXGotFWpjT+P97P+RK41kLYfsrbwd IwI0oL4YLUytPqMZlWQI1myg75JRO7XUixZupBDVoWmPditH4RED1wpF5l6+iZBjLMbX b3dqJKqtWSN35BxS4rIJm8hhUvR7rMG9lDVj9n3cMrKkNBl4zrrzs0t9JlvZnrCRvZAY Q50rbRluM9n4AgsvP8MfYwe7u0e2+QczrNNq8vooJSynv8RP9YIXVAwIBtScRBb6ty6i T3FToP4tNfX9UE4WX9w8SD9pudL9EAvm6NZpdGeirsNEictwgHW8nup4gNO5IfyojPoj 2cMQ== X-Gm-Message-State: AOAM530KAsDro+spf5ORSFPfVipusHEcNWHKiC7tNXfJP8GZRp18IiCJ cnCCaQtOgiTLTGfz5JZmWGHjgHv0/6ul7yOfc4UJBis5F7W3PhOuzXHPTsWIjRkrs6/FFSVfv+n QfG1NmFXZATuV8qulGPgVSGw2lRKwufdL2jNWPerSfR5aiEYdXFOqV4tCw2uTD0HZaoOrHezjcx QqYQ== X-Google-Smtp-Source: ABdhPJyTwyZ5pxJyam+En8uVyimZ/kidOBo/quIiXl53bnMmDr5+EV617TXjGloTbB3QgfXuNhLKrgwMmv0f X-Received: by 2002:ab0:498e:: with SMTP id e14mr6912754uad.38.1595568795348; Thu, 23 Jul 2020 22:33:15 -0700 (PDT) Received: from localhost.localdomain ([192.19.223.252]) by smtp-relay.gmail.com with ESMTPS id h17sm592840vsk.0.2020.07.23.22.33.12 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 23 Jul 2020 22:33:15 -0700 (PDT) X-Relaying-Domain: broadcom.com From: Ajit Khaparde To: dev@dpdk.org Cc: ferruh.yigit@intel.com, Kishore Padmanabha , Michael Baucom Date: Thu, 23 Jul 2020 22:32:21 -0700 Message-Id: <20200724053235.71069-9-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.21.1 (Apple Git-122.3) In-Reply-To: <20200724053235.71069-1-ajit.khaparde@broadcom.com> References: <20200723115639.22357-1-somnath.kotur@broadcom.com> <20200724053235.71069-1-ajit.khaparde@broadcom.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v3 08/22] net/bnxt: configure parif for the egress rules X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kishore Padmanabha The parif for the egress rules need to be dynamically configured based on the port type. PARIF is handler to a partition of the physical port. Signed-off-by: Kishore Padmanabha Reviewed-by: Michael Baucom --- drivers/net/bnxt/tf_ulp/ulp_def_rules.c | 11 ++-- drivers/net/bnxt/tf_ulp/ulp_mapper.c | 35 ++++++++++++ drivers/net/bnxt/tf_ulp/ulp_port_db.c | 2 + drivers/net/bnxt/tf_ulp/ulp_rte_parser.c | 54 +++++++++++++++---- drivers/net/bnxt/tf_ulp/ulp_template_db_act.c | 16 ++++-- .../net/bnxt/tf_ulp/ulp_template_db_class.c | 25 +++++++-- .../net/bnxt/tf_ulp/ulp_template_db_enum.h | 14 ++--- 7 files changed, 123 insertions(+), 34 deletions(-) diff --git a/drivers/net/bnxt/tf_ulp/ulp_def_rules.c b/drivers/net/bnxt/tf_ulp/ulp_def_rules.c index d86e4c9ae..ddc6da8a8 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_def_rules.c +++ b/drivers/net/bnxt/tf_ulp/ulp_def_rules.c @@ -81,17 +81,12 @@ ulp_set_parif_in_comp_fld(struct bnxt_ulp_context *ulp_ctx, if (rc) return rc; - if (parif_type == BNXT_ULP_PHY_PORT_PARIF) { + if (parif_type == BNXT_ULP_PHY_PORT_PARIF) idx = BNXT_ULP_CF_IDX_PHY_PORT_PARIF; - /* Parif needs to be reset to a free partition */ - parif += BNXT_ULP_FREE_PARIF_BASE; - } else if (parif_type == BNXT_ULP_DRV_FUNC_PARIF) { + else if (parif_type == BNXT_ULP_DRV_FUNC_PARIF) idx = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF; - /* Parif needs to be reset to a free partition */ - parif += BNXT_ULP_FREE_PARIF_BASE; - } else { + else idx = BNXT_ULP_CF_IDX_VF_FUNC_PARIF; - } ULP_COMP_FLD_IDX_WR(mapper_params, idx, parif); diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.c b/drivers/net/bnxt/tf_ulp/ulp_mapper.c index 2d3373df2..a071c0750 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_mapper.c +++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.c @@ -998,6 +998,41 @@ ulp_mapper_result_field_process(struct bnxt_ulp_mapper_parms *parms, return -EINVAL; } break; + case BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF: + if (!ulp_operand_read(fld->result_operand, + (uint8_t *)&idx, + sizeof(uint16_t))) { + BNXT_TF_DBG(ERR, "%s key operand read failed.\n", name); + return -EINVAL; + } + idx = tfp_be_to_cpu_16(idx); + if (idx >= BNXT_ULP_CF_IDX_LAST) { + BNXT_TF_DBG(ERR, "%s invalid index %u\n", name, idx); + return -EINVAL; + } + /* check if the computed field is set */ + if (ULP_COMP_FLD_IDX_RD(parms, idx)) + val = fld->result_operand_true; + else + val = fld->result_operand_false; + + /* read the appropriate computed field */ + if (!ulp_operand_read(val, (uint8_t *)&idx, sizeof(uint16_t))) { + BNXT_TF_DBG(ERR, "%s val operand read failed\n", name); + return -EINVAL; + } + idx = tfp_be_to_cpu_16(idx); + if (idx >= BNXT_ULP_CF_IDX_LAST) { + BNXT_TF_DBG(ERR, "%s invalid index %u\n", name, idx); + return -EINVAL; + } + val = ulp_blob_push_32(blob, &parms->comp_fld[idx], + fld->field_bit_size); + if (!val) { + BNXT_TF_DBG(ERR, "%s push to key blob failed\n", name); + return -EINVAL; + } + break; default: BNXT_TF_DBG(ERR, "invalid result mapper opcode 0x%x\n", fld->result_opcode); diff --git a/drivers/net/bnxt/tf_ulp/ulp_port_db.c b/drivers/net/bnxt/tf_ulp/ulp_port_db.c index 0fc7c0ab2..30876478d 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_port_db.c +++ b/drivers/net/bnxt/tf_ulp/ulp_port_db.c @@ -372,6 +372,8 @@ ulp_port_db_parif_get(struct bnxt_ulp_context *ulp_ctxt, phy_port_id = port_db->ulp_func_id_tbl[func_id].phy_port_id; *parif = port_db->phy_port_list[phy_port_id].port_parif; } + /* Parif needs to be reset to a free partition */ + *parif += BNXT_ULP_FREE_PARIF_BASE; return 0; } diff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c index 39f801b2f..67f9319d6 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c +++ b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c @@ -167,31 +167,63 @@ bnxt_ulp_comp_fld_intf_update(struct ulp_rte_parser_params *params) { uint32_t ifindex; uint16_t port_id, parif; + uint32_t mtype; enum bnxt_ulp_direction_type dir; /* get the direction details */ dir = ULP_COMP_FLD_IDX_RD(params, BNXT_ULP_CF_IDX_DIRECTION); + /* read the port id details */ + port_id = ULP_COMP_FLD_IDX_RD(params, + BNXT_ULP_CF_IDX_INCOMING_IF); + if (ulp_port_db_dev_port_to_ulp_index(params->ulp_ctx, + port_id, + &ifindex)) { + BNXT_TF_DBG(ERR, "ParseErr:Portid is not valid\n"); + return; + } + if (dir == BNXT_ULP_DIR_INGRESS) { - /* read the port id details */ - port_id = ULP_COMP_FLD_IDX_RD(params, - BNXT_ULP_CF_IDX_INCOMING_IF); - if (ulp_port_db_dev_port_to_ulp_index(params->ulp_ctx, - port_id, - &ifindex)) { - BNXT_TF_DBG(ERR, "ParseErr:Portid is not valid\n"); - return; - } /* Set port PARIF */ if (ulp_port_db_parif_get(params->ulp_ctx, ifindex, BNXT_ULP_PHY_PORT_PARIF, &parif)) { BNXT_TF_DBG(ERR, "ParseErr:ifindex is not valid\n"); return; } - /* Parif needs to be reset to a free partition */ - parif += BNXT_ULP_FREE_PARIF_BASE; ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_PHY_PORT_PARIF, parif); + } else { + /* Get the match port type */ + mtype = ULP_COMP_FLD_IDX_RD(params, + BNXT_ULP_CF_IDX_MATCH_PORT_TYPE); + if (mtype == BNXT_ULP_INTF_TYPE_VF_REP) { + ULP_COMP_FLD_IDX_WR(params, + BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP, + 1); + /* Set VF func PARIF */ + if (ulp_port_db_parif_get(params->ulp_ctx, ifindex, + BNXT_ULP_VF_FUNC_PARIF, + &parif)) { + BNXT_TF_DBG(ERR, + "ParseErr:ifindex is not valid\n"); + return; + } + ULP_COMP_FLD_IDX_WR(params, + BNXT_ULP_CF_IDX_VF_FUNC_PARIF, + parif); + } else { + /* Set DRV func PARIF */ + if (ulp_port_db_parif_get(params->ulp_ctx, ifindex, + BNXT_ULP_DRV_FUNC_PARIF, + &parif)) { + BNXT_TF_DBG(ERR, + "ParseErr:ifindex is not valid\n"); + return; + } + ULP_COMP_FLD_IDX_WR(params, + BNXT_ULP_CF_IDX_DRV_FUNC_PARIF, + parif); + } } } diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c index 31fe90577..58b581cf6 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c @@ -1808,11 +1808,19 @@ struct bnxt_ulp_mapper_result_field_info ulp_act_result_field_list[] = { }, { .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_opcode = BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST, .result_operand = { - BNXT_ULP_SYM_DECAP_FUNC_THRU_TUN, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP >> 8) & 0xff, + (uint64_t)BNXT_ULP_ACTION_BIT_VXLAN_DECAP & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .result_operand_true = {0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 12, diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c index 9de45cdc4..330c5ecdd 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c @@ -5058,7 +5058,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .spec_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} @@ -5149,7 +5151,9 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = { }, { .field_bit_size = 2, - .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO, + .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}, .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} @@ -17054,11 +17058,22 @@ struct bnxt_ulp_mapper_result_field_info ulp_class_result_field_list[] = { }, { .field_bit_size = 4, - .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT, + .result_opcode = BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF, .result_operand = { - BNXT_ULP_SYM_VF_FUNC_PARIF, + (BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP >> 8) & 0xff, + BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP & 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .result_operand_true = { + (BNXT_ULP_CF_IDX_VF_FUNC_PARIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_VF_FUNC_PARIF & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, + .result_operand_false = { + (BNXT_ULP_CF_IDX_DRV_FUNC_PARIF >> 8) & 0xff, + BNXT_ULP_CF_IDX_DRV_FUNC_PARIF & 0xff, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} }, { .field_bit_size = 8, diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h index c9fe1bc47..f08065b28 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h @@ -127,11 +127,12 @@ enum bnxt_ulp_cf_idx { BNXT_ULP_CF_IDX_ACT_PORT_IS_SET = 35, BNXT_ULP_CF_IDX_ACT_PORT_TYPE = 36, BNXT_ULP_CF_IDX_MATCH_PORT_TYPE = 37, - BNXT_ULP_CF_IDX_VF_TO_VF = 38, - BNXT_ULP_CF_IDX_L3_HDR_CNT = 39, - BNXT_ULP_CF_IDX_L4_HDR_CNT = 40, - BNXT_ULP_CF_IDX_VFR_MODE = 41, - BNXT_ULP_CF_IDX_LAST = 42 + BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP = 38, + BNXT_ULP_CF_IDX_VF_TO_VF = 39, + BNXT_ULP_CF_IDX_L3_HDR_CNT = 40, + BNXT_ULP_CF_IDX_L4_HDR_CNT = 41, + BNXT_ULP_CF_IDX_VFR_MODE = 42, + BNXT_ULP_CF_IDX_LAST = 43 }; enum bnxt_ulp_cond_opcode { @@ -215,7 +216,8 @@ enum bnxt_ulp_mapper_opc { BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ = 8, BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST = 9, BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST = 10, - BNXT_ULP_MAPPER_OPC_LAST = 11 + BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF = 11, + BNXT_ULP_MAPPER_OPC_LAST = 12 }; enum bnxt_ulp_mark_db_opcode {