@@ -115,6 +115,7 @@ ulp_ctx_session_open(struct bnxt *bp,
/* ENCAP */
resources->tbl_cnt[TF_DIR_TX].cnt[TF_TBL_TYPE_ACT_ENCAP_64B] = 16;
+ resources->tbl_cnt[TF_DIR_TX].cnt[TF_TBL_TYPE_ACT_ENCAP_16B] = 16;
/* TCAMs */
resources->tcam_cnt[TF_DIR_TX].cnt[TF_TCAM_TBL_TYPE_L2_CTXT_TCAM] = 8;
@@ -933,7 +933,7 @@ ulp_default_flow_db_cfa_action_get(struct bnxt_ulp_context *ulp_ctx,
uint32_t flow_id,
uint32_t *cfa_action)
{
- uint8_t sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_ACT_IDX;
+ uint8_t sub_type = BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION;
uint64_t hndl;
int32_t rc;
@@ -184,7 +184,8 @@ ulp_mapper_action_tbl_list_get(uint32_t dev_id,
return &ulp_act_tbl_list[idx];
}
-/** Get a list of classifier tables that implement the flow
+/*
+ * Get a list of classifier tables that implement the flow
* Gets a device dependent list of tables that implement the class template id
*
* dev_id [in] The device id of the forwarding element
@@ -193,13 +194,16 @@ ulp_mapper_action_tbl_list_get(uint32_t dev_id,
*
* num_tbls [out] The number of classifier tables in the returned array
*
+ * fdb_tbl_idx [out] The flow database index Regular or default
+ *
* returns An array of classifier tables to implement the flow, or NULL on
* error
*/
static struct bnxt_ulp_mapper_tbl_info *
ulp_mapper_class_tbl_list_get(uint32_t dev_id,
uint32_t tid,
- uint32_t *num_tbls)
+ uint32_t *num_tbls,
+ uint32_t *fdb_tbl_idx)
{
uint32_t idx;
uint32_t tidx = ULP_DEVICE_PARAMS_INDEX(tid, dev_id);
@@ -212,7 +216,7 @@ ulp_mapper_class_tbl_list_get(uint32_t dev_id,
*/
idx = ulp_class_tmpl_list[tidx].start_tbl_idx;
*num_tbls = ulp_class_tmpl_list[tidx].num_tbls;
-
+ *fdb_tbl_idx = ulp_class_tmpl_list[tidx].flow_db_table_type;
return &ulp_class_tbl_list[idx];
}
@@ -256,7 +260,8 @@ ulp_mapper_key_fields_get(struct bnxt_ulp_mapper_tbl_info *tbl,
*/
static struct bnxt_ulp_mapper_result_field_info *
ulp_mapper_result_fields_get(struct bnxt_ulp_mapper_tbl_info *tbl,
- uint32_t *num_flds)
+ uint32_t *num_flds,
+ uint32_t *num_encap_flds)
{
uint32_t idx;
@@ -265,6 +270,7 @@ ulp_mapper_result_fields_get(struct bnxt_ulp_mapper_tbl_info *tbl,
idx = tbl->result_start_idx;
*num_flds = tbl->result_num_fields;
+ *num_encap_flds = tbl->encap_num_fields;
/* NOTE: Need template to provide range checking define */
return &ulp_class_result_field_list[idx];
@@ -1146,6 +1152,7 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms,
struct bnxt_ulp_mapper_result_field_info *dflds;
struct bnxt_ulp_mapper_ident_info *idents;
uint32_t num_dflds, num_idents;
+ uint32_t encap_flds = 0;
/*
* Since the cache entry is responsible for allocating
@@ -1166,8 +1173,9 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms,
}
/* Create the result data blob */
- dflds = ulp_mapper_result_fields_get(tbl, &num_dflds);
- if (!dflds || !num_dflds) {
+ dflds = ulp_mapper_result_fields_get(tbl, &num_dflds,
+ &encap_flds);
+ if (!dflds || !num_dflds || encap_flds) {
BNXT_TF_DBG(ERR, "Failed to get data fields.\n");
rc = -EINVAL;
goto error;
@@ -1293,6 +1301,7 @@ ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms,
int32_t trc;
enum bnxt_ulp_flow_mem_type mtype = parms->device_params->flow_mem_type;
int32_t rc = 0;
+ uint32_t encap_flds = 0;
kflds = ulp_mapper_key_fields_get(tbl, &num_kflds);
if (!kflds || !num_kflds) {
@@ -1327,8 +1336,8 @@ ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms,
*/
/* Create the result data blob */
- dflds = ulp_mapper_result_fields_get(tbl, &num_dflds);
- if (!dflds || !num_dflds) {
+ dflds = ulp_mapper_result_fields_get(tbl, &num_dflds, &encap_flds);
+ if (!dflds || !num_dflds || encap_flds) {
BNXT_TF_DBG(ERR, "Failed to get data fields.\n");
return -EINVAL;
}
@@ -1468,7 +1477,8 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms,
/* Get the result fields list */
if (is_class_tbl)
- flds = ulp_mapper_result_fields_get(tbl, &num_flds);
+ flds = ulp_mapper_result_fields_get(tbl, &num_flds,
+ &encap_flds);
else
flds = ulp_mapper_act_result_fields_get(tbl, &num_flds,
&encap_flds);
@@ -1761,6 +1771,76 @@ ulp_mapper_cache_tbl_process(struct bnxt_ulp_mapper_parms *parms,
return rc;
}
+static int32_t
+ulp_mapper_if_tbl_process(struct bnxt_ulp_mapper_parms *parms,
+ struct bnxt_ulp_mapper_tbl_info *tbl)
+{
+ struct bnxt_ulp_mapper_result_field_info *flds;
+ struct ulp_blob data;
+ uint64_t idx;
+ uint16_t tmplen;
+ uint32_t i, num_flds;
+ int32_t rc = 0;
+ struct tf_set_if_tbl_entry_parms iftbl_params = { 0 };
+ struct tf *tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx);
+ uint32_t encap_flds;
+
+ /* Initialize the blob data */
+ if (!ulp_blob_init(&data, tbl->result_bit_size,
+ parms->device_params->byte_order)) {
+ BNXT_TF_DBG(ERR, "Failed initial index table blob\n");
+ return -EINVAL;
+ }
+
+ /* Get the result fields list */
+ flds = ulp_mapper_result_fields_get(tbl, &num_flds, &encap_flds);
+
+ if (!flds || !num_flds || encap_flds) {
+ BNXT_TF_DBG(ERR, "template undefined for the IF table\n");
+ return -EINVAL;
+ }
+
+ /* process the result fields, loop through them */
+ for (i = 0; i < num_flds; i++) {
+ /* Process the result fields */
+ rc = ulp_mapper_result_field_process(parms,
+ tbl->direction,
+ &flds[i],
+ &data,
+ "IFtable Result");
+ if (rc) {
+ BNXT_TF_DBG(ERR, "data field failed\n");
+ return rc;
+ }
+ }
+
+ /* Get the index details from computed field */
+ idx = ULP_COMP_FLD_IDX_RD(parms, tbl->comp_field_idx);
+
+ /* Perform the tf table set by filling the set params */
+ iftbl_params.dir = tbl->direction;
+ iftbl_params.type = tbl->resource_type;
+ iftbl_params.data = ulp_blob_data_get(&data, &tmplen);
+ iftbl_params.data_sz_in_bytes = ULP_BITS_2_BYTE(tmplen);
+ iftbl_params.idx = idx;
+
+ rc = tf_set_if_tbl_entry(tfp, &iftbl_params);
+ if (rc) {
+ BNXT_TF_DBG(ERR, "Set table[%d][%s][%d] failed rc=%d\n",
+ iftbl_params.type,
+ (iftbl_params.dir == TF_DIR_RX) ? "RX" : "TX",
+ iftbl_params.idx,
+ rc);
+ return rc;
+ }
+
+ /*
+ * TBD: Need to look at the need to store idx in flow db for restore
+ * the table to its orginial state on deletion of this entry.
+ */
+ return rc;
+}
+
static int32_t
ulp_mapper_glb_resource_info_init(struct tf *tfp,
struct bnxt_ulp_mapper_data *mapper_data)
@@ -1862,6 +1942,9 @@ ulp_mapper_class_tbls_process(struct bnxt_ulp_mapper_parms *parms)
case BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE:
rc = ulp_mapper_cache_tbl_process(parms, tbl);
break;
+ case BNXT_ULP_RESOURCE_FUNC_IF_TABLE:
+ rc = ulp_mapper_if_tbl_process(parms, tbl);
+ break;
default:
BNXT_TF_DBG(ERR, "Unexpected class resource %d\n",
tbl->resource_func);
@@ -2064,20 +2147,29 @@ ulp_mapper_flow_create(struct bnxt_ulp_context *ulp_ctx,
/* Get the action table entry from device id and act context id */
parms.act_tid = cparms->act_tid;
- parms.atbls = ulp_mapper_action_tbl_list_get(parms.dev_id,
- parms.act_tid,
- &parms.num_atbls);
- if (!parms.atbls || !parms.num_atbls) {
- BNXT_TF_DBG(ERR, "No action tables for %d:%d\n",
- parms.dev_id, parms.act_tid);
- return -EINVAL;
+
+ /*
+ * Perform the action table get only if act template is not zero
+ * for act template zero like for default rules ignore the action
+ * table processing.
+ */
+ if (parms.act_tid) {
+ parms.atbls = ulp_mapper_action_tbl_list_get(parms.dev_id,
+ parms.act_tid,
+ &parms.num_atbls);
+ if (!parms.atbls || !parms.num_atbls) {
+ BNXT_TF_DBG(ERR, "No action tables for %d:%d\n",
+ parms.dev_id, parms.act_tid);
+ return -EINVAL;
+ }
}
/* Get the class table entry from device id and act context id */
parms.class_tid = cparms->class_tid;
parms.ctbls = ulp_mapper_class_tbl_list_get(parms.dev_id,
parms.class_tid,
- &parms.num_ctbls);
+ &parms.num_ctbls,
+ &parms.tbl_idx);
if (!parms.ctbls || !parms.num_ctbls) {
BNXT_TF_DBG(ERR, "No class tables for %d:%d\n",
parms.dev_id, parms.class_tid);
@@ -2111,7 +2203,7 @@ ulp_mapper_flow_create(struct bnxt_ulp_context *ulp_ctx,
* free each of them.
*/
rc = ulp_flow_db_fid_alloc(ulp_ctx,
- BNXT_ULP_REGULAR_FLOW_TABLE,
+ parms.tbl_idx,
cparms->func_id,
&parms.fid);
if (rc) {
@@ -2120,11 +2212,14 @@ ulp_mapper_flow_create(struct bnxt_ulp_context *ulp_ctx,
}
/* Process the action template list from the selected action table*/
- rc = ulp_mapper_action_tbls_process(&parms);
- if (rc) {
- BNXT_TF_DBG(ERR, "action tables failed creation for %d:%d\n",
- parms.dev_id, parms.act_tid);
- goto flow_error;
+ if (parms.act_tid) {
+ rc = ulp_mapper_action_tbls_process(&parms);
+ if (rc) {
+ BNXT_TF_DBG(ERR,
+ "action tables failed creation for %d:%d\n",
+ parms.dev_id, parms.act_tid);
+ goto flow_error;
+ }
}
/* All good. Now process the class template */
@@ -256,6 +256,7 @@ ulp_mark_db_mark_add(struct bnxt_ulp_context *ctxt,
BNXT_TF_DBG(ERR, "Mark index greater than allocated\n");
return -EINVAL;
}
+ BNXT_TF_DBG(DEBUG, "Set LFID[0x%0x] = 0x%0x\n", fid, mark);
mtbl->lfid_tbl[fid].mark_id = mark;
ULP_MARK_DB_ENTRY_SET_VALID(&mtbl->lfid_tbl[fid]);
}
@@ -88,35 +88,36 @@ enum bnxt_ulp_byte_order {
};
enum bnxt_ulp_cf_idx {
- BNXT_ULP_CF_IDX_MPLS_TAG_NUM = 0,
- BNXT_ULP_CF_IDX_O_VTAG_NUM = 1,
- BNXT_ULP_CF_IDX_O_VTAG_PRESENT = 2,
- BNXT_ULP_CF_IDX_O_TWO_VTAGS = 3,
- BNXT_ULP_CF_IDX_I_VTAG_NUM = 4,
- BNXT_ULP_CF_IDX_I_VTAG_PRESENT = 5,
- BNXT_ULP_CF_IDX_I_TWO_VTAGS = 6,
- BNXT_ULP_CF_IDX_INCOMING_IF = 7,
- BNXT_ULP_CF_IDX_DIRECTION = 8,
- BNXT_ULP_CF_IDX_SVIF_FLAG = 9,
- BNXT_ULP_CF_IDX_O_L3 = 10,
- BNXT_ULP_CF_IDX_I_L3 = 11,
- BNXT_ULP_CF_IDX_O_L4 = 12,
- BNXT_ULP_CF_IDX_I_L4 = 13,
- BNXT_ULP_CF_IDX_DEV_PORT_ID = 14,
- BNXT_ULP_CF_IDX_DRV_FUNC_SVIF = 15,
- BNXT_ULP_CF_IDX_DRV_FUNC_SPIF = 16,
- BNXT_ULP_CF_IDX_DRV_FUNC_PARIF = 17,
- BNXT_ULP_CF_IDX_DRV_FUNC_VNIC = 18,
- BNXT_ULP_CF_IDX_DRV_FUNC_PHY_PORT = 19,
- BNXT_ULP_CF_IDX_VF_FUNC_SVIF = 20,
- BNXT_ULP_CF_IDX_VF_FUNC_SPIF = 21,
- BNXT_ULP_CF_IDX_VF_FUNC_PARIF = 22,
- BNXT_ULP_CF_IDX_VF_FUNC_VNIC = 23,
- BNXT_ULP_CF_IDX_PHY_PORT_SVIF = 24,
- BNXT_ULP_CF_IDX_PHY_PORT_SPIF = 25,
- BNXT_ULP_CF_IDX_PHY_PORT_PARIF = 26,
- BNXT_ULP_CF_IDX_PHY_PORT_VPORT = 27,
- BNXT_ULP_CF_IDX_LAST = 28
+ BNXT_ULP_CF_IDX_NOT_USED = 0,
+ BNXT_ULP_CF_IDX_MPLS_TAG_NUM = 1,
+ BNXT_ULP_CF_IDX_O_VTAG_NUM = 2,
+ BNXT_ULP_CF_IDX_O_VTAG_PRESENT = 3,
+ BNXT_ULP_CF_IDX_O_TWO_VTAGS = 4,
+ BNXT_ULP_CF_IDX_I_VTAG_NUM = 5,
+ BNXT_ULP_CF_IDX_I_VTAG_PRESENT = 6,
+ BNXT_ULP_CF_IDX_I_TWO_VTAGS = 7,
+ BNXT_ULP_CF_IDX_INCOMING_IF = 8,
+ BNXT_ULP_CF_IDX_DIRECTION = 9,
+ BNXT_ULP_CF_IDX_SVIF_FLAG = 10,
+ BNXT_ULP_CF_IDX_O_L3 = 11,
+ BNXT_ULP_CF_IDX_I_L3 = 12,
+ BNXT_ULP_CF_IDX_O_L4 = 13,
+ BNXT_ULP_CF_IDX_I_L4 = 14,
+ BNXT_ULP_CF_IDX_DEV_PORT_ID = 15,
+ BNXT_ULP_CF_IDX_DRV_FUNC_SVIF = 16,
+ BNXT_ULP_CF_IDX_DRV_FUNC_SPIF = 17,
+ BNXT_ULP_CF_IDX_DRV_FUNC_PARIF = 18,
+ BNXT_ULP_CF_IDX_DRV_FUNC_VNIC = 19,
+ BNXT_ULP_CF_IDX_DRV_FUNC_PHY_PORT = 20,
+ BNXT_ULP_CF_IDX_VF_FUNC_SVIF = 21,
+ BNXT_ULP_CF_IDX_VF_FUNC_SPIF = 22,
+ BNXT_ULP_CF_IDX_VF_FUNC_PARIF = 23,
+ BNXT_ULP_CF_IDX_VF_FUNC_VNIC = 24,
+ BNXT_ULP_CF_IDX_PHY_PORT_SVIF = 25,
+ BNXT_ULP_CF_IDX_PHY_PORT_SPIF = 26,
+ BNXT_ULP_CF_IDX_PHY_PORT_PARIF = 27,
+ BNXT_ULP_CF_IDX_PHY_PORT_VPORT = 28,
+ BNXT_ULP_CF_IDX_LAST = 29
};
enum bnxt_ulp_critical_resource {
@@ -133,11 +134,6 @@ enum bnxt_ulp_device_id {
BNXT_ULP_DEVICE_ID_LAST = 4
};
-enum bnxt_ulp_df_param_type {
- BNXT_ULP_DF_PARAM_TYPE_DEV_PORT_ID = 0,
- BNXT_ULP_DF_PARAM_TYPE_LAST = 1
-};
-
enum bnxt_ulp_direction {
BNXT_ULP_DIRECTION_INGRESS = 0,
BNXT_ULP_DIRECTION_EGRESS = 1,
@@ -154,7 +150,8 @@ enum bnxt_ulp_flow_mem_type {
enum bnxt_ulp_glb_regfile_index {
BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID = 0,
BNXT_ULP_GLB_REGFILE_INDEX_GLB_L2_CNTXT_ID = 1,
- BNXT_ULP_GLB_REGFILE_INDEX_LAST = 2
+ BNXT_ULP_GLB_REGFILE_INDEX_GLB_LOOPBACK_AREC_INDEX = 2,
+ BNXT_ULP_GLB_REGFILE_INDEX_LAST = 3
};
enum bnxt_ulp_hdr_type {
@@ -204,22 +201,22 @@ enum bnxt_ulp_priority {
};
enum bnxt_ulp_regfile_index {
- BNXT_ULP_REGFILE_INDEX_CLASS_TID = 0,
- BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 = 1,
- BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_1 = 2,
- BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_0 = 3,
- BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_1 = 4,
- BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 = 5,
- BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_1 = 6,
- BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 = 7,
- BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_1 = 8,
- BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR = 9,
- BNXT_ULP_REGFILE_INDEX_ACTION_PTR_0 = 10,
- BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 = 11,
- BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_1 = 12,
- BNXT_ULP_REGFILE_INDEX_CRITICAL_RESOURCE = 13,
- BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 = 14,
- BNXT_ULP_REGFILE_INDEX_NOT_USED = 15,
+ BNXT_ULP_REGFILE_INDEX_NOT_USED = 0,
+ BNXT_ULP_REGFILE_INDEX_CLASS_TID = 1,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 = 2,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_1 = 3,
+ BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_0 = 4,
+ BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_1 = 5,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 = 6,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_1 = 7,
+ BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 = 8,
+ BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_1 = 9,
+ BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR = 10,
+ BNXT_ULP_REGFILE_INDEX_ACTION_PTR_0 = 11,
+ BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 = 12,
+ BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_1 = 13,
+ BNXT_ULP_REGFILE_INDEX_CRITICAL_RESOURCE = 14,
+ BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 = 15,
BNXT_ULP_REGFILE_INDEX_LAST = 16
};
@@ -265,10 +262,10 @@ enum bnxt_ulp_resource_func {
enum bnxt_ulp_resource_sub_type {
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM = 0,
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM = 1,
- BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_EXT_COUNT_INDEX = 3,
- BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT_INDEX = 2,
+ BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_EXT_COUNT = 3,
+ BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT = 2,
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL = 0,
- BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_ACT_IDX = 1,
+ BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION = 1,
BNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED = 0
};
@@ -282,7 +279,6 @@ enum bnxt_ulp_sym {
BNXT_ULP_SYM_AGG_ERROR_IGNORE = 0,
BNXT_ULP_SYM_AGG_ERROR_NO = 0,
BNXT_ULP_SYM_AGG_ERROR_YES = 1,
- BNXT_ULP_SYM_BIG_ENDIAN = 0,
BNXT_ULP_SYM_DECAP_FUNC_NONE = 0,
BNXT_ULP_SYM_DECAP_FUNC_THRU_L2 = 11,
BNXT_ULP_SYM_DECAP_FUNC_THRU_L3 = 12,
@@ -398,7 +394,6 @@ enum bnxt_ulp_sym {
BNXT_ULP_SYM_L4_HDR_VALID_IGNORE = 0,
BNXT_ULP_SYM_L4_HDR_VALID_NO = 0,
BNXT_ULP_SYM_L4_HDR_VALID_YES = 1,
- BNXT_ULP_SYM_LITTLE_ENDIAN = 1,
BNXT_ULP_SYM_MATCH_TYPE_EM = 0,
BNXT_ULP_SYM_MATCH_TYPE_WM = 1,
BNXT_ULP_SYM_NO = 0,
@@ -489,6 +484,11 @@ enum bnxt_ulp_sym {
BNXT_ULP_SYM_YES = 1
};
+enum bnxt_ulp_wh_plus {
+ BNXT_ULP_WH_PLUS_EXT_EM_MAX_KEY_SIZE = 448,
+ BNXT_ULP_WH_PLUS_LOOPBACK_PORT = 4
+};
+
enum bnxt_ulp_act_prop_sz {
BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN_SZ = 4,
BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SZ = 4,
@@ -588,4 +588,9 @@ enum bnxt_ulp_act_hid {
BNXT_ULP_ACT_HID_0029 = 0x0029,
BNXT_ULP_ACT_HID_0040 = 0x0040
};
+
+enum bnxt_ulp_df_tpl {
+ BNXT_ULP_DF_TPL_PORT_TO_VS = 1,
+ BNXT_ULP_DF_TPL_VS_TO_PORT = 2
+};
#endif
@@ -150,9 +150,10 @@ struct bnxt_ulp_device_params {
/* Flow Mapper */
struct bnxt_ulp_mapper_tbl_list_info {
- uint32_t device_name;
- uint32_t start_tbl_idx;
- uint32_t num_tbls;
+ uint32_t device_name;
+ uint32_t start_tbl_idx;
+ uint32_t num_tbls;
+ enum bnxt_ulp_fdb_type flow_db_table_type;
};
struct bnxt_ulp_mapper_tbl_info {
@@ -183,6 +184,7 @@ struct bnxt_ulp_mapper_tbl_info {
enum bnxt_ulp_regfile_index regfile_idx;
enum bnxt_ulp_mark_db_opcode mark_db_opcode;
+ uint32_t comp_field_idx;
};
struct bnxt_ulp_mapper_class_key_field_info {