Message ID | 20200624075337.6768-29-guinanx.sun@intel.com (mailing list archive) |
---|---|
State | Superseded, archived |
Delegated to: | Qi Zhang |
Headers |
Return-Path: <dev-bounces@dpdk.org> X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7CE02A0350; Wed, 24 Jun 2020 10:07:48 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 67E1E1D996; Wed, 24 Jun 2020 10:02:28 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 36C3D1D985 for <dev@dpdk.org>; Wed, 24 Jun 2020 10:02:25 +0200 (CEST) IronPort-SDR: dcqH7aHogdvnj3czs6S5mLBLZobxAZyGwrITlpLXqzcptyzH7yBV7uDIY7rIjRx1PnavHkYPAL qTt/nDbBCi/Q== X-IronPort-AV: E=McAfee;i="6000,8403,9661"; a="143472962" X-IronPort-AV: E=Sophos;i="5.75,274,1589266800"; d="scan'208";a="143472962" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jun 2020 01:02:24 -0700 IronPort-SDR: Mwu+yG+SWft71dbm+herxBVf0WCO8lvjaB7C2rtL/TfOZBa+s0SJKrO0Ixm2QIzze2uhvCxFXd WRJhqmT0iI8A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,274,1589266800"; d="scan'208";a="385102956" Received: from intel.sh.intel.com ([10.239.255.48]) by fmsmga001.fm.intel.com with ESMTP; 24 Jun 2020 01:02:22 -0700 From: Guinan Sun <guinanx.sun@intel.com> To: dev@dpdk.org Cc: Jeff Guo <jia.guo@intel.com>, Wenzhuo Lu <wenzhuo.lu@intel.com>, Guinan Sun <guinanx.sun@intel.com>, Lotem Leder <lotem.leder@intel.com> Date: Wed, 24 Jun 2020 07:53:23 +0000 Message-Id: <20200624075337.6768-29-guinanx.sun@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200624075337.6768-1-guinanx.sun@intel.com> References: <20200622064634.70941-1-guinanx.sun@intel.com> <20200624075337.6768-1-guinanx.sun@intel.com> Subject: [dpdk-dev] [PATCH v2 28/42] net/e1000/base: add definition of EEE 2.5G setup register X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> Errors-To: dev-bounces@dpdk.org Sender: "dev" <dev-bounces@dpdk.org> |
Series |
update e1000 base code
|
|
Checks
Context | Check | Description |
---|---|---|
ci/checkpatch | success | coding style OK |
ci/Intel-compilation | success | Compilation OK |
Commit Message
Guinan Sun
June 24, 2020, 7:53 a.m. UTC
This is a new register which holds the minimum time in microseconds for 2500BASE-T operation. Signed-off-by: Lotem Leder <lotem.leder@intel.com> Signed-off-by: Guinan Sun <guinanx.sun@intel.com> --- drivers/net/e1000/base/e1000_regs.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h index 71c8d28b0..e551fca25 100644 --- a/drivers/net/e1000/base/e1000_regs.h +++ b/drivers/net/e1000/base/e1000_regs.h @@ -673,6 +673,7 @@ #define E1000_LTRC 0x01A0 /* Latency Tolerance Reporting Control */ #define E1000_EEER 0x0E30 /* Energy Efficient Ethernet "EEE"*/ #define E1000_EEE_SU 0x0E34 /* EEE Setup */ +#define E1000_EEE_SU_2P5 0x0E3C /* EEE 2.5G Setup */ #define E1000_TLPIC 0x4148 /* EEE Tx LPI Count - TLPIC */ #define E1000_RLPIC 0x414C /* EEE Rx LPI Count - RLPIC */