From patchwork Mon Jun 22 06:46:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guinan Sun X-Patchwork-Id: 71926 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2CE37A0350; Mon, 22 Jun 2020 09:16:22 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 82DC91D5FD; Mon, 22 Jun 2020 09:07:15 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id 2CC1F1D5E4 for ; Mon, 22 Jun 2020 09:07:11 +0200 (CEST) IronPort-SDR: ksAj/8VTKXHylARi1R6PAgqlNlcPtXvQFsfsu3TZCGstehAc6TKcWqt/dm+4I2O+xj2EVZC9N+ KCIk9MxaeZjg== X-IronPort-AV: E=McAfee;i="6000,8403,9659"; a="131070874" X-IronPort-AV: E=Sophos;i="5.75,266,1589266800"; d="scan'208";a="131070874" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2020 00:07:10 -0700 IronPort-SDR: vQSVgDQKz1hE8gxkd+HfkI2bOcVbkwoVzqZb01uV/cuUv1fF5Pf173U0tZnpHj3yx4rxkvVGmq +irFOF8Gg6dg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,266,1589266800"; d="scan'208";a="384409260" Received: from dpdk.sh.intel.com ([10.239.255.83]) by fmsmga001.fm.intel.com with ESMTP; 22 Jun 2020 00:07:08 -0700 From: Guinan Sun To: dev@dpdk.org Cc: Jeff Guo , Zhao1 Wei , Guinan Sun , Vitaly Lifshits Date: Mon, 22 Jun 2020 06:46:23 +0000 Message-Id: <20200622064634.70941-60-guinanx.sun@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200622064634.70941-1-guinanx.sun@intel.com> References: <20200622064634.70941-1-guinanx.sun@intel.com> Subject: [dpdk-dev] [PATCH 59/70] net/e1000/base: introduce DPGFR register X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Defined DPGFR, Dynamic Power Gate Force Control Register. Signed-off-by: Vitaly Lifshits Signed-off-by: Guinan Sun --- drivers/net/e1000/base/e1000_regs.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h index 2a258543e..9262d7fac 100644 --- a/drivers/net/e1000/base/e1000_regs.h +++ b/drivers/net/e1000/base/e1000_regs.h @@ -47,6 +47,7 @@ #define E1000_FEXTNVM11 0x5BBC /* Future Extended NVM 11 - RW */ #define E1000_FEXTNVM12 0x5BC0 /* Future Extended NVM 12 - RW */ #define E1000_PCIEANACFG 0x00F18 /* PCIE Analog Config */ +#define E1000_DPGFR 0x00FAC /* Dynamic Power Gate Force Control Register */ #define E1000_FCT 0x00030 /* Flow Control Type - RW */ #define E1000_CONNSW 0x00034 /* Copper/Fiber switch control - RW */ #define E1000_VET 0x00038 /* VLAN Ether Type - RW */