From patchwork Mon Jun 22 06:45:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guinan Sun X-Patchwork-Id: 71883 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3FD9DA0350; Mon, 22 Jun 2020 09:08:18 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B27841D15F; Mon, 22 Jun 2020 09:05:47 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id ADC131C43A for ; Mon, 22 Jun 2020 09:05:44 +0200 (CEST) IronPort-SDR: tFFdBZkaxReFJp/kWPrwb/Mx9F48mJpSKiOY28RkoPRw/S3eRai9Q1fmN/cSQweWVpxH5Uef+b IdieS7ZEvtTg== X-IronPort-AV: E=McAfee;i="6000,8403,9659"; a="141944751" X-IronPort-AV: E=Sophos;i="5.75,266,1589266800"; d="scan'208";a="141944751" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2020 00:05:44 -0700 IronPort-SDR: DFnxKuw5HwuUVA/xHQDybcCYStbUTR6Tlfw/aCo3gRYNWZrGxcGUBoKeBwuytrwE60KBFQgCNU KqV9Ym2ZCaYw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,266,1589266800"; d="scan'208";a="384408860" Received: from dpdk.sh.intel.com ([10.239.255.83]) by fmsmga001.fm.intel.com with ESMTP; 22 Jun 2020 00:05:41 -0700 From: Guinan Sun To: dev@dpdk.org Cc: Jeff Guo , Zhao1 Wei , Guinan Sun , Dima Ruinskiy Date: Mon, 22 Jun 2020 06:45:40 +0000 Message-Id: <20200622064634.70941-17-guinanx.sun@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200622064634.70941-1-guinanx.sun@intel.com> References: <20200622064634.70941-1-guinanx.sun@intel.com> Subject: [dpdk-dev] [PATCH 16/70] net/e1000/base: implement Low-Power-Link-Up (LPLU) for i225 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" I225 introduces a new mechanism for Low-Power-Link-Up (LPLU) control. This patch implements the new functions and sets the PHY OPS pointers. Signed-off-by: Dima Ruinskiy Signed-off-by: Guinan Sun --- drivers/net/e1000/base/e1000_i225.c | 58 +++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/drivers/net/e1000/base/e1000_i225.c b/drivers/net/e1000/base/e1000_i225.c index 621dc6863..dbebb6fa3 100644 --- a/drivers/net/e1000/base/e1000_i225.c +++ b/drivers/net/e1000/base/e1000_i225.c @@ -1147,3 +1147,61 @@ s32 e1000_init_hw_i225(struct e1000_hw *hw) ret_val = e1000_init_hw_82575(hw); return ret_val; } + +/* + * e1000_set_d0_lplu_state_i225 - Set Low-Power-Link-Up (LPLU) D0 state + * @hw: pointer to the HW structure + * @active: true to enable LPLU, false to disable + * + * Note: since I225 does not actually support LPLU, this function + * simply enables/disables 1G and 2.5G speeds in D0. + */ +s32 e1000_set_d0_lplu_state_i225(struct e1000_hw *hw, bool active) +{ + u32 data; + + DEBUGFUNC("e1000_set_d0_lplu_state_i225"); + + data = E1000_READ_REG(hw, E1000_I225_PHPM); + + if (active) { + data |= E1000_I225_PHPM_DIS_1000; + data |= E1000_I225_PHPM_DIS_2500; + } else { + data &= ~E1000_I225_PHPM_DIS_1000; + data &= ~E1000_I225_PHPM_DIS_2500; + } + + E1000_WRITE_REG(hw, E1000_I225_PHPM, data); + return E1000_SUCCESS; +} + +/* + * e1000_set_d3_lplu_state_i225 - Set Low-Power-Link-Up (LPLU) D3 state + * @hw: pointer to the HW structure + * @active: true to enable LPLU, false to disable + * + * Note: since I225 does not actually support LPLU, this function + * simply enables/disables 100M, 1G and 2.5G speeds in D3. + */ +s32 e1000_set_d3_lplu_state_i225(struct e1000_hw *hw, bool active) +{ + u32 data; + + DEBUGFUNC("e1000_set_d3_lplu_state_i225"); + + data = E1000_READ_REG(hw, E1000_I225_PHPM); + + if (active) { + data |= E1000_I225_PHPM_DIS_100_D3; + data |= E1000_I225_PHPM_DIS_1000_D3; + data |= E1000_I225_PHPM_DIS_2500_D3; + } else { + data &= ~E1000_I225_PHPM_DIS_100_D3; + data &= ~E1000_I225_PHPM_DIS_1000_D3; + data &= ~E1000_I225_PHPM_DIS_2500_D3; + } + + E1000_WRITE_REG(hw, E1000_I225_PHPM, data); + return E1000_SUCCESS; +}