[1/2] net/bnxt: fix to alloc FW specified TQM ring context memory

Message ID 20200506062710.22093-2-kalesh-anakkur.purayil@broadcom.com (mailing list archive)
State Accepted, archived
Delegated to: Ajit Khaparde
Headers
Series bnxt bug fixes |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/iol-nxp-Performance success Performance Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/Intel-compilation fail Compilation issues
ci/iol-testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS

Commit Message

Kalesh A P May 6, 2020, 6:27 a.m. UTC
From: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>

Newer firmware advertises the number of TQM rings to allocate
context memory for.  Use the firmware specified value and fall back
to the old value derived from "bp->max_q" if it is not available.

Fixes: f8168ca0e690 ("net/bnxt: support thor controller")
Cc: stable@dpdk.org

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Kumar Khaparde <ajit.khaparde@broadcom.com>
---
 drivers/net/bnxt/bnxt.h        |  2 +-
 drivers/net/bnxt/bnxt_ethdev.c |  5 ++---
 drivers/net/bnxt/bnxt_hwrm.c   | 31 +++++++++++++++++++------------
 3 files changed, 22 insertions(+), 16 deletions(-)
  

Patch

diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h
index 12fed1e..bf5b39c 100644
--- a/drivers/net/bnxt/bnxt.h
+++ b/drivers/net/bnxt/bnxt.h
@@ -362,7 +362,6 @@  struct bnxt_coal {
 #define BNXT_MAX_TC    8
 #define BNXT_MAX_QUEUE 8
 #define BNXT_MAX_TC_Q  (BNXT_MAX_TC + 1)
-#define BNXT_MAX_Q     (bp->max_q + 1)
 #define BNXT_PAGE_SHFT 12
 #define BNXT_PAGE_SIZE (1 << BNXT_PAGE_SHFT)
 #define MAX_CTX_PAGES  (BNXT_PAGE_SIZE / 8)
@@ -421,6 +420,7 @@  struct bnxt_ctx_mem_info {
 	uint16_t        tim_entry_size;
 	uint32_t        tim_max_entries;
 	uint8_t         tqm_entries_multiple;
+	uint8_t         tqm_fp_rings_count;
 
 	uint32_t        flags;
 #define BNXT_CTX_FLAG_INITED    0x01
diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c
index c2bee54..d877ff6 100644
--- a/drivers/net/bnxt/bnxt_ethdev.c
+++ b/drivers/net/bnxt/bnxt_ethdev.c
@@ -4644,7 +4644,7 @@  static void bnxt_free_ctx_mem(struct bnxt *bp)
 	rte_memzone_free(bp->ctx->vnic_mem.ring_mem.pg_tbl_mz);
 	rte_memzone_free(bp->ctx->stat_mem.ring_mem.pg_tbl_mz);
 
-	for (i = 0; i < BNXT_MAX_Q; i++) {
+	for (i = 0; i < bp->ctx->tqm_fp_rings_count + 1; i++) {
 		if (bp->ctx->tqm_mem[i])
 			rte_memzone_free(bp->ctx->tqm_mem[i]->ring_mem.mz);
 	}
@@ -4725,9 +4725,8 @@  int bnxt_alloc_ctx_mem(struct bnxt *bp)
 	entries = bnxt_roundup(entries, ctx->tqm_entries_multiple);
 	entries = clamp_t(uint32_t, entries, ctx->tqm_min_entries_per_ring,
 			  ctx->tqm_max_entries_per_ring);
-	for (i = 0, ena = 0; i < BNXT_MAX_Q; i++) {
+	for (i = 0, ena = 0; i < ctx->tqm_fp_rings_count + 1; i++) {
 		ctx_pg = ctx->tqm_mem[i];
-		/* use min tqm entries for now. */
 		ctx_pg->entries = entries;
 		mem_size = ctx->tqm_entry_size * ctx_pg->entries;
 		rc = bnxt_alloc_ctx_mem_blk(bp, ctx_pg, mem_size, "tqm_mem", i);
diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index b0a7835..ef65107 100644
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -4694,7 +4694,7 @@  int bnxt_hwrm_func_backing_store_qcaps(struct bnxt *bp)
 	struct bnxt_ctx_pg_info *ctx_pg;
 	struct bnxt_ctx_mem_info *ctx;
 	int total_alloc_len;
-	int rc, i;
+	int rc, i, tqm_rings;
 
 	if (!BNXT_CHIP_THOR(bp) ||
 	    bp->hwrm_spec_code < HWRM_VERSION_1_9_2 ||
@@ -4714,17 +4714,6 @@  int bnxt_hwrm_func_backing_store_qcaps(struct bnxt *bp)
 		goto ctx_err;
 	}
 
-	ctx_pg = rte_malloc("bnxt_ctx_pg_mem",
-			    sizeof(*ctx_pg) * BNXT_MAX_Q,
-			    RTE_CACHE_LINE_SIZE);
-	if (!ctx_pg) {
-		rc = -ENOMEM;
-		goto ctx_err;
-	}
-	for (i = 0; i < BNXT_MAX_Q; i++, ctx_pg++)
-		ctx->tqm_mem[i] = ctx_pg;
-
-	bp->ctx = ctx;
 	ctx->qp_max_entries = rte_le_to_cpu_32(resp->qp_max_entries);
 	ctx->qp_min_qp1_entries =
 		rte_le_to_cpu_16(resp->qp_min_qp1_entries);
@@ -4760,6 +4749,24 @@  int bnxt_hwrm_func_backing_store_qcaps(struct bnxt *bp)
 	ctx->mrav_entry_size = rte_le_to_cpu_16(resp->mrav_entry_size);
 	ctx->tim_entry_size = rte_le_to_cpu_16(resp->tim_entry_size);
 	ctx->tim_max_entries = rte_le_to_cpu_32(resp->tim_max_entries);
+	ctx->tqm_fp_rings_count = resp->tqm_fp_rings_count;
+
+	if (!ctx->tqm_fp_rings_count)
+		ctx->tqm_fp_rings_count = bp->max_q;
+
+	tqm_rings = ctx->tqm_fp_rings_count + 1;
+
+	ctx_pg = rte_malloc("bnxt_ctx_pg_mem",
+			    sizeof(*ctx_pg) * tqm_rings,
+			    RTE_CACHE_LINE_SIZE);
+	if (!ctx_pg) {
+		rc = -ENOMEM;
+		goto ctx_err;
+	}
+	for (i = 0; i < tqm_rings; i++, ctx_pg++)
+		ctx->tqm_mem[i] = ctx_pg;
+
+	bp->ctx = ctx;
 ctx_err:
 	HWRM_UNLOCK();
 	return rc;