From patchwork Sat Apr 4 15:19:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 67819 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id EE086A0562; Sat, 4 Apr 2020 17:20:03 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A6CFD1BE99; Sat, 4 Apr 2020 17:20:02 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 8CB43F04; Sat, 4 Apr 2020 17:19:59 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 034FDI9x016913; Sat, 4 Apr 2020 08:19:58 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=Y8esqzJgJChga2Ps+Xrv30dBdS6d/zCdup05ZpW2V1A=; b=HD7tJMTjXvNIcfiNc8w4ypkzcPpOB3u59SvLFrQNFo576gwVWmldvFjBmgTtbdmY87dY ty1uifWfgRQUIT+tkrgOkSKUVLRkYQhiy1+N6OV5pyZsc6B27gGbh3sghH2ljFf3YuFN Hu0xfemK2M97ZHfyBzbfDrdLLQo9Pq/slJGXorxMqTayevAjpnofxQx3DsWgq1BvA4mL xkk6fFofh82U94bY+SNJVtWhBWBGfhksyAB8PK9DXBNQolzhipoEiY0lKZnf46gpJpnT N/oOTy8IY6dLuZoKeaohKJUJMMTmOn8wa7DYtb/UVyqGev1yjsMTQCr9Ao4CLH0y387i tw== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0a-0016f401.pphosted.com with ESMTP id 306qkqrtja-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Sat, 04 Apr 2020 08:19:58 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 4 Apr 2020 08:19:57 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 4 Apr 2020 08:19:56 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 4 Apr 2020 08:19:56 -0700 Received: from BG-LT7430.marvell.com (BG-LT7430.marvell.com [10.28.163.117]) by maili.marvell.com (Postfix) with ESMTP id 4C12B3F703F; Sat, 4 Apr 2020 08:19:54 -0700 (PDT) From: To: , Nithin Dabilpuram , "Kiran Kumar K" CC: , Pavan Nikhilesh , Date: Sat, 4 Apr 2020 20:49:50 +0530 Message-ID: <20200404151951.1013-1-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.676 definitions=2020-04-04_11:2020-04-03, 2020-04-04 signatures=0 Subject: [dpdk-dev] [PATCH] net/octeontx2: fix device configuration sequence X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh When an application invokes rte_eth_dev_configure consecutively without setting up Rx/Tx queues, it will incorrectly return error while trying to restore Rx/Tx queue configuration. Fix configuration sequence by checking if any Rx/Tx queues are previously configured before trying to restore them. Fixes: 548b5839a32b ("net/octeontx2: add device configure operation") Cc: stable@dpdk.org Signed-off-by: Pavan Nikhilesh Acked-by: Jerin Jacob --- drivers/net/octeontx2/otx2_ethdev.c | 16 ++++++++++++---- drivers/net/octeontx2/otx2_ethdev.h | 1 + 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c index e60f4901c..9fbca2b05 100644 --- a/drivers/net/octeontx2/otx2_ethdev.c +++ b/drivers/net/octeontx2/otx2_ethdev.c @@ -1132,10 +1132,12 @@ nix_store_queue_cfg_and_then_release(struct rte_eth_dev *eth_dev) txq = (struct otx2_eth_txq **)eth_dev->data->tx_queues; for (i = 0; i < nb_txq; i++) { if (txq[i] == NULL) { - otx2_err("txq[%d] is already released", i); - goto fail; + tx_qconf[i].valid = false; + otx2_info("txq[%d] is already released", i); + continue; } memcpy(&tx_qconf[i], &txq[i]->qconf, sizeof(*tx_qconf)); + tx_qconf[i].valid = true; otx2_nix_tx_queue_release(txq[i]); eth_dev->data->tx_queues[i] = NULL; } @@ -1143,10 +1145,12 @@ nix_store_queue_cfg_and_then_release(struct rte_eth_dev *eth_dev) rxq = (struct otx2_eth_rxq **)eth_dev->data->rx_queues; for (i = 0; i < nb_rxq; i++) { if (rxq[i] == NULL) { - otx2_err("rxq[%d] is already released", i); - goto fail; + rx_qconf[i].valid = false; + otx2_info("rxq[%d] is already released", i); + continue; } memcpy(&rx_qconf[i], &rxq[i]->qconf, sizeof(*rx_qconf)); + rx_qconf[i].valid = true; otx2_nix_rx_queue_release(rxq[i]); eth_dev->data->rx_queues[i] = NULL; } @@ -1201,6 +1205,8 @@ nix_restore_queue_cfg(struct rte_eth_dev *eth_dev) * queues are already setup in port_configure(). */ for (i = 0; i < nb_txq; i++) { + if (!tx_qconf[i].valid) + continue; rc = otx2_nix_tx_queue_setup(eth_dev, i, tx_qconf[i].nb_desc, tx_qconf[i].socket_id, &tx_qconf[i].conf.tx); @@ -1216,6 +1222,8 @@ nix_restore_queue_cfg(struct rte_eth_dev *eth_dev) free(tx_qconf); tx_qconf = NULL; for (i = 0; i < nb_rxq; i++) { + if (!rx_qconf[i].valid) + continue; rc = otx2_nix_rx_queue_setup(eth_dev, i, rx_qconf[i].nb_desc, rx_qconf[i].socket_id, &rx_qconf[i].conf.rx, diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h index e5684f9f0..238afb3a8 100644 --- a/drivers/net/octeontx2/otx2_ethdev.h +++ b/drivers/net/octeontx2/otx2_ethdev.h @@ -196,6 +196,7 @@ struct otx2_eth_qconf { void *mempool; uint32_t socket_id; uint16_t nb_desc; + uint8_t valid; }; struct otx2_fc_info {