diff mbox series

[RFC,v1,4/7] net/ena: relax barrier for completion queue update

Message ID 20200313091835.58039-5-gavin.hu@arm.com (mailing list archive)
State RFC, archived
Delegated to: Ferruh Yigit
Headers show
Series relax barriers for ENA PMD and small fixes | expand

Checks

Context Check Description
ci/Intel-compilation fail Compilation issues
ci/checkpatch success coding style OK

Commit Message

Gavin Hu March 13, 2020, 9:18 a.m. UTC
To gaurantee the update observed by NIC HW, a cio barrier is sufficient,
an io barrier, which translates to dsb on aarch64, is overkill.

Suggested-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Signed-off-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
---
 drivers/net/ena/base/ena_eth_com.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/net/ena/base/ena_eth_com.h b/drivers/net/ena/base/ena_eth_com.h
index e56c33a64..edfa98b72 100644
--- a/drivers/net/ena/base/ena_eth_com.h
+++ b/drivers/net/ena/base/ena_eth_com.h
@@ -180,7 +180,9 @@  static inline int ena_com_update_dev_comp_head(struct ena_com_io_cq *io_cq)
 		if (unlikely(need_update)) {
 			ena_trc_dbg("Write completion queue doorbell for queue %d: head: %d\n",
 				    io_cq->qid, head);
-			ENA_REG_WRITE32(io_cq->bus, head, io_cq->cq_head_db_reg);
+			rte_cio_wmb();
+			ENA_REG_WRITE32_RELAXED(io_cq->bus, head,
+				       io_cq->cq_head_db_reg);
 			io_cq->last_head_update = head;
 		}
 	}