From patchwork Mon Mar 9 11:43:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 66425 X-Patchwork-Delegate: xiaolong.ye@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id D0DC1A052E; Mon, 9 Mar 2020 12:41:54 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BA9301C0CC; Mon, 9 Mar 2020 12:40:49 +0100 (CET) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id DCC131C0CC for ; Mon, 9 Mar 2020 12:40:47 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Mar 2020 04:40:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,533,1574150400"; d="scan'208";a="276483544" Received: from dpdk51.sh.intel.com ([10.67.110.245]) by fmsmga002.fm.intel.com with ESMTP; 09 Mar 2020 04:40:45 -0700 From: Qi Zhang To: qiming.yang@intel.com, beilei.xing@intel.com Cc: xiaolong.ye@intel.com, dev@dpdk.org, Qi Zhang , Bruce Allan , Paul M Stillwell Jr Date: Mon, 9 Mar 2020 19:43:37 +0800 Message-Id: <20200309114357.31800-9-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200309114357.31800-1-qi.z.zhang@intel.com> References: <20200309114357.31800-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH 08/28] net/ice/base: use descriptive vairiable name than type X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The variable name 'type' is not very descriptive. Replace instances of those with a variable name that is more descriptive or replace it if not needed. Signed-off-by: Bruce Allan Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_flex_pipe.c | 8 ++++---- drivers/net/ice/base/ice_flow.c | 8 ++++---- drivers/net/ice/base/ice_switch.c | 38 ++++++++++++++++++------------------ 3 files changed, 27 insertions(+), 27 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 82b27de0e..c18ccea48 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -1506,11 +1506,11 @@ ice_get_sw_prof_type(struct ice_hw *hw, struct ice_fv *fv) /** * ice_get_sw_fv_bitmap - Get switch field vector bitmap based on profile type * @hw: pointer to hardware structure - * @type: type of profiles requested + * @req_profs: type of profiles requested * @bm: pointer to memory for returning the bitmap of field vectors */ void -ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type type, +ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type req_profs, ice_bitmap_t *bm) { struct ice_pkg_enum state; @@ -1519,7 +1519,7 @@ ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type type, ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM); - if (type == ICE_PROF_ALL) { + if (req_profs == ICE_PROF_ALL) { u16 i; for (i = 0; i < ICE_MAX_NUM_PROFILES; i++) @@ -1543,7 +1543,7 @@ ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type type, /* Determine field vector type */ prof_type = ice_get_sw_prof_type(hw, fv); - if (type & prof_type) + if (req_profs & prof_type) ice_set_bit((u16)offset, bm); } } while (fv); diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 6c413e307..d52bce1ce 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -1615,7 +1615,7 @@ enum ice_status ice_flow_rem_entry(struct ice_hw *hw, u64 entry_h) * ice_flow_set_fld_ext - specifies locations of field from entry's input buffer * @seg: packet segment the field being set belongs to * @fld: field to be set - * @type: type of the field + * @field_type: type of the field * @val_loc: if not ICE_FLOW_FLD_OFF_INVAL, location of the value to match from * entry's input buffer * @mask_loc: if not ICE_FLOW_FLD_OFF_INVAL, location of mask value from entry's @@ -1636,16 +1636,16 @@ enum ice_status ice_flow_rem_entry(struct ice_hw *hw, u64 entry_h) */ static void ice_flow_set_fld_ext(struct ice_flow_seg_info *seg, enum ice_flow_field fld, - enum ice_flow_fld_match_type type, u16 val_loc, + enum ice_flow_fld_match_type field_type, u16 val_loc, u16 mask_loc, u16 last_loc) { u64 bit = BIT_ULL(fld); seg->match |= bit; - if (type == ICE_FLOW_FLD_TYPE_RANGE) + if (field_type == ICE_FLOW_FLD_TYPE_RANGE) seg->range |= bit; - seg->fields[fld].type = type; + seg->fields[fld].type = field_type; seg->fields[fld].src.val = val_loc; seg->fields[fld].src.mask = mask_loc; seg->fields[fld].src.last = last_loc; diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 0f2a5b3e9..adcda9645 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -1872,7 +1872,7 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw) struct ice_aqc_get_sw_cfg_resp_elem *ele; u16 pf_vf_num, swid, vsi_port_num; bool is_vf = false; - u8 type; + u8 res_type; ele = rbuf[i].elements; vsi_port_num = LE16_TO_CPU(ele->vsi_port_num) & @@ -1887,10 +1887,10 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw) ICE_AQC_GET_SW_CONF_RESP_IS_VF) is_vf = true; - type = LE16_TO_CPU(ele->vsi_port_num) >> - ICE_AQC_GET_SW_CONF_RESP_TYPE_S; + res_type = (u8)(LE16_TO_CPU(ele->vsi_port_num) >> + ICE_AQC_GET_SW_CONF_RESP_TYPE_S); - switch (type) { + switch (res_type) { case ICE_AQC_GET_SW_CONF_RESP_PHYS_PORT: case ICE_AQC_GET_SW_CONF_RESP_VIRT_PORT: if (j == num_total_ports) { @@ -1900,7 +1900,7 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw) goto out; } ice_init_port_info(hw->port_info, - vsi_port_num, type, swid, + vsi_port_num, res_type, swid, pf_vf_num, is_vf); j++; break; @@ -2355,7 +2355,7 @@ ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi, struct ice_aqc_sw_rules_elem *s_rule; enum ice_status status; u16 s_rule_size; - u16 type; + u16 rule_type; int i; if (!num_vsi) @@ -2368,11 +2368,11 @@ ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi, lkup_type == ICE_SW_LKUP_PROMISC || lkup_type == ICE_SW_LKUP_PROMISC_VLAN || lkup_type == ICE_SW_LKUP_LAST) - type = remove ? ICE_AQC_SW_RULES_T_VSI_LIST_CLEAR : - ICE_AQC_SW_RULES_T_VSI_LIST_SET; + rule_type = remove ? ICE_AQC_SW_RULES_T_VSI_LIST_CLEAR : + ICE_AQC_SW_RULES_T_VSI_LIST_SET; else if (lkup_type == ICE_SW_LKUP_VLAN) - type = remove ? ICE_AQC_SW_RULES_T_PRUNE_LIST_CLEAR : - ICE_AQC_SW_RULES_T_PRUNE_LIST_SET; + rule_type = remove ? ICE_AQC_SW_RULES_T_PRUNE_LIST_CLEAR : + ICE_AQC_SW_RULES_T_PRUNE_LIST_SET; else return ICE_ERR_PARAM; @@ -2390,7 +2390,7 @@ ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi, CPU_TO_LE16(ice_get_hw_vsi_num(hw, vsi_handle_arr[i])); } - s_rule->type = CPU_TO_LE16(type); + s_rule->type = CPU_TO_LE16(rule_type); s_rule->pdata.vsi_list.number_vsi = CPU_TO_LE16(num_vsi); s_rule->pdata.vsi_list.index = CPU_TO_LE16(vsi_list_id); @@ -5671,35 +5671,35 @@ static void ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo, ice_bitmap_t *bm) { - enum ice_prof_type type; + enum ice_prof_type prof_type; switch (rinfo->tun_type) { case ICE_NON_TUN: - type = ICE_PROF_NON_TUN; + prof_type = ICE_PROF_NON_TUN; break; case ICE_ALL_TUNNELS: - type = ICE_PROF_TUN_ALL; + prof_type = ICE_PROF_TUN_ALL; break; case ICE_SW_TUN_VXLAN_GPE: case ICE_SW_TUN_GENEVE: case ICE_SW_TUN_VXLAN: case ICE_SW_TUN_UDP: case ICE_SW_TUN_GTP: - type = ICE_PROF_TUN_UDP; + prof_type = ICE_PROF_TUN_UDP; break; case ICE_SW_TUN_NVGRE: - type = ICE_PROF_TUN_GRE; + prof_type = ICE_PROF_TUN_GRE; break; case ICE_SW_TUN_PPPOE: - type = ICE_PROF_TUN_PPPOE; + prof_type = ICE_PROF_TUN_PPPOE; break; case ICE_SW_TUN_AND_NON_TUN: default: - type = ICE_PROF_ALL; + prof_type = ICE_PROF_ALL; break; } - ice_get_sw_fv_bitmap(hw, type, bm); + ice_get_sw_fv_bitmap(hw, prof_type, bm); } /**