From patchwork Mon Mar 9 09:54:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Joyce Kong X-Patchwork-Id: 66407 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id BD514A052E; Mon, 9 Mar 2020 10:54:40 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 08E141C0AA; Mon, 9 Mar 2020 10:54:37 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id D64173B5 for ; Mon, 9 Mar 2020 10:54:35 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 56E747FA; Mon, 9 Mar 2020 02:54:35 -0700 (PDT) Received: from net-arm-thunderx2-03.shanghai.arm.com (net-arm-thunderx2-03.shanghai.arm.com [10.169.41.185]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 1968D3F67D; Mon, 9 Mar 2020 02:54:29 -0700 (PDT) From: Joyce Kong To: thomas@monjalon.net, stephen@networkplumber.org, david.marchand@redhat.com, mb@smartsharesystems.com, jerinj@marvell.com, bruce.richardson@intel.com, ravi1.kumar@amd.com, rmody@marvell.com, shshaikh@marvell.com, xuanziyang2@huawei.com, cloud.wangxiaoyun@huawei.com, zhouguoyang@huawei.com, honnappa.nagarahalli@arm.com, phil.yang@arm.com, gavin.hu@arm.com Cc: nd@arm.com, dev@dpdk.org Date: Mon, 9 Mar 2020 17:54:05 +0800 Message-Id: <20200309095410.28983-2-joyce.kong@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200309095410.28983-1-joyce.kong@arm.com> References: <20200309095410.28983-1-joyce.kong@arm.com> In-Reply-To: <1571125801-45773-1-git-send-email-joyce.kong@arm.com> References: <1571125801-45773-1-git-send-email-joyce.kong@arm.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v7 1/6] lib/eal: implement the family of PMD bit operation APIs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Bitwise operation APIs are defined and used in a lot of PMDs, which caused a huge code duplication. To reduce duplication, this patch consolidates them into a common API family. Signed-off-by: Joyce Kong Reviewed-by: Gavin Hu Reviewed-by: Phil Yang Acked-by: Morten Brørup --- MAINTAINERS | 4 + doc/api/doxy-api-index.md | 5 +- drivers/net/Makefile | 1 + lib/librte_eal/common/Makefile | 1 + .../common/include/rte_pmd_bitops.h | 257 ++++++++++++++++++ lib/librte_eal/common/meson.build | 3 +- 6 files changed, 268 insertions(+), 3 deletions(-) create mode 100644 lib/librte_eal/common/include/rte_pmd_bitops.h diff --git a/MAINTAINERS b/MAINTAINERS index f4e0ed8e0..071daf887 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -244,6 +244,10 @@ M: Cristian Dumitrescu F: lib/librte_eal/common/include/rte_bitmap.h F: app/test/test_bitmap.c +PMD Bitops +M: Joyce Kong +F: lib/librte_eal/common/include/rte_pmd_bitops.h + MCSlock - EXPERIMENTAL M: Phil Yang F: lib/librte_eal/common/include/generic/rte_mcslock.h diff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md index dff496be0..64ab142f3 100644 --- a/doc/api/doxy-api-index.md +++ b/doc/api/doxy-api-index.md @@ -35,6 +35,7 @@ The public API headers are grouped by topics: [vfio] (@ref rte_vfio.h) - **device specific**: + [pmd_bitops] (@ref rte_pmd_bitops.h), [softnic] (@ref rte_eth_softnic.h), [bond] (@ref rte_eth_bond.h), [vhost] (@ref rte_vhost.h), @@ -133,12 +134,12 @@ The public API headers are grouped by topics: [BPF] (@ref rte_bpf.h) - **containers**: + [bitmap] (@ref rte_bitmap.h), [mbuf] (@ref rte_mbuf.h), [mbuf pool ops] (@ref rte_mbuf_pool_ops.h), [ring] (@ref rte_ring.h), [stack] (@ref rte_stack.h), - [tailq] (@ref rte_tailq.h), - [bitmap] (@ref rte_bitmap.h) + [tailq] (@ref rte_tailq.h) - **packet framework**: * [port] (@ref rte_port.h): diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 4a7f155fc..1a3202d1c 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -3,6 +3,7 @@ include $(RTE_SDK)/mk/rte.vars.mk +INC := rte_pmd_bitops.h # set in mk/toolchain/xxx/rte.toolchain-compat.mk ifeq ($(CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD),d) $(warning thunderx pmd is not supported by old compilers) diff --git a/lib/librte_eal/common/Makefile b/lib/librte_eal/common/Makefile index c2c6d92cd..24a5ae94f 100644 --- a/lib/librte_eal/common/Makefile +++ b/lib/librte_eal/common/Makefile @@ -19,6 +19,7 @@ INC += rte_malloc.h rte_keepalive.h rte_time.h INC += rte_service.h rte_service_component.h INC += rte_bitmap.h rte_vfio.h rte_hypervisor.h rte_test.h INC += rte_reciprocal.h rte_fbarray.h rte_uuid.h +INC += rte_pmd_bitops.h GENERIC_INC := rte_atomic.h rte_byteorder.h rte_cycles.h rte_prefetch.h GENERIC_INC += rte_memcpy.h rte_cpuflags.h diff --git a/lib/librte_eal/common/include/rte_pmd_bitops.h b/lib/librte_eal/common/include/rte_pmd_bitops.h new file mode 100644 index 000000000..b7801e01e --- /dev/null +++ b/lib/librte_eal/common/include/rte_pmd_bitops.h @@ -0,0 +1,257 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2020 Arm Limited + */ + +#ifndef _RTE_PMD_BITOPS_H_ +#define _RTE_PMD_BITOPS_H_ + +/** + * @file + * Bit Operations + * + * This file defines a API for bit operations without/with memory ordering. + */ + +#include +#include +#include + +/*---------------------------- 32 bit operations ----------------------------*/ + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * Get the target bit from a 32-bit value without memory ordering. + * + * @param nr + * The target bit to get. + * @param addr + * The address holding the bit. + * @return + * The target bit. + */ +__rte_experimental +static inline uint32_t +rte_get_bit32_relaxed(unsigned int nr, volatile uint32_t *addr) +{ + RTE_ASSERT(nr < 32); + + uint32_t mask = UINT32_C(1) << nr; + return (*addr) & mask; +} + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * Set the target bit in a 32-bit value to 1 without memory ordering. + * + * @param nr + * The target bit to set. + * @param addr + * The address holding the bit. + */ +__rte_experimental +static inline void +rte_set_bit32_relaxed(unsigned int nr, volatile uint32_t *addr) +{ + RTE_ASSERT(nr < 32); + + uint32_t mask = UINT32_C(1) << nr; + *addr = (*addr) | mask; +} + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * Clear the target bit in a 32-bit value to 0 without memory ordering. + * + * @param nr + * The target bit to clear. + * @param addr + * The address holding the bit. + */ +__rte_experimental +static inline void +rte_clear_bit32_relaxed(unsigned int nr, volatile uint32_t *addr) +{ + RTE_ASSERT(nr < 32); + + uint32_t mask = UINT32_C(1) << nr; + *addr = (*addr) & (~mask); +} + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * Return the original bit from a 32-bit value, then set it to 1 without + * memory ordering. + * + * @param nr + * The target bit to get and set. + * @param addr + * The address holding the bit. + * @return + * The original bit. + */ +__rte_experimental +static inline uint32_t +rte_test_and_set_bit32_relaxed(unsigned int nr, volatile uint32_t *addr) +{ + RTE_ASSERT(nr < 32); + + uint32_t mask = UINT32_C(1) << nr; + uint32_t val = *addr; + *addr = (*addr) | mask; + return val & mask; +} + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * Return the original bit from a 32-bit value, then clear it to 0 without + * memory ordering. + * + * @param nr + * The target bit to get and clear. + * @param addr + * The address holding the bit. + * @return + * The original bit. + */ +__rte_experimental +static inline uint32_t +rte_test_and_clear_bit32_relaxed(unsigned int nr, volatile uint32_t *addr) +{ + RTE_ASSERT(nr < 32); + + uint32_t mask = UINT32_C(1) << nr; + uint32_t val = *addr; + *addr = (*addr) & (~mask); + return val & mask; +} + +/*---------------------------- 64 bit operations ----------------------------*/ + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * Get the target bit from a 64-bit value without memory ordering. + * + * @param nr + * The target bit to get. + * @param addr + * The address holding the bit. + * @return + * The target bit. + */ +__rte_experimental +static inline uint64_t +rte_get_bit64_relaxed(unsigned int nr, volatile uint64_t *addr) +{ + RTE_ASSERT(nr < 64); + + uint64_t mask = UINT64_C(1) << nr; + return (*addr) & mask; +} + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * Set the target bit in a 64-bit value to 1 without memory ordering. + * + * @param nr + * The target bit to set. + * @param addr + * The address holding the bit. + */ +__rte_experimental +static inline void +rte_set_bit64_relaxed(unsigned int nr, volatile uint64_t *addr) +{ + RTE_ASSERT(nr < 64); + + uint64_t mask = UINT64_C(1) << nr; + (*addr) = (*addr) | mask; +} + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * Clear the target bit in a 64-bit value to 0 without memory ordering. + * + * @param nr + * The target bit to clear. + * @param addr + * The address holding the bit. + */ +__rte_experimental +static inline void +rte_clear_bit64_relaxed(unsigned int nr, volatile uint64_t *addr) +{ + RTE_ASSERT(nr < 64); + + uint64_t mask = UINT64_C(1) << nr; + *addr = (*addr) & (~mask); +} + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * Return the original bit from a 64-bit value, then set it to 1 without + * memory ordering. + * + * @param nr + * The target bit to get and set. + * @param addr + * The address holding the bit. + * @return + * The original bit. + */ +__rte_experimental +static inline uint64_t +rte_test_and_set_bit64_relaxed(unsigned int nr, volatile uint64_t *addr) +{ + RTE_ASSERT(nr < 64); + + uint64_t mask = UINT64_C(1) << nr; + uint64_t val = *addr; + *addr = (*addr) | mask; + return val; +} + +/** + * @warning + * @b EXPERIMENTAL: this API may change, or be removed, without prior notice + * + * Return the original bit from a 64-bit value, then clear it to 0 without + * memory ordering. + * + * @param nr + * The target bit to get and clear. + * @param addr + * The address holding the bit. + * @return + * The original bit. + */ +__rte_experimental +static inline uint64_t +rte_test_and_clear_bit64_relaxed(unsigned int nr, volatile uint64_t *addr) +{ + RTE_ASSERT(nr < 64); + + uint64_t mask = UINT64_C(1) << nr; + uint64_t val = *addr; + *addr = (*addr) & (~mask); + return val & mask; +} + +#endif /* _RTE_PMD_BITOPS_H_ */ diff --git a/lib/librte_eal/common/meson.build b/lib/librte_eal/common/meson.build index 2b97715a2..0862ae64c 100644 --- a/lib/librte_eal/common/meson.build +++ b/lib/librte_eal/common/meson.build @@ -50,9 +50,9 @@ common_objs += eal_common_arch_objs common_headers = files( 'include/rte_alarm.h', + 'include/rte_bitmap.h', 'include/rte_branch_prediction.h', 'include/rte_bus.h', - 'include/rte_bitmap.h', 'include/rte_class.h', 'include/rte_common.h', 'include/rte_compat.h', @@ -78,6 +78,7 @@ common_headers = files( 'include/rte_pci_dev_feature_defs.h', 'include/rte_pci_dev_features.h', 'include/rte_per_lcore.h', + 'include/rte_pmd_bitops.h', 'include/rte_random.h', 'include/rte_reciprocal.h', 'include/rte_service.h',