diff mbox series

[02/10] net/enetc: use relaxed read for Tx CI in clean Tx

Message ID 20200302143209.11854-3-hemant.agrawal@nxp.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers show
Series net/enetc: optimization and cleanup | expand

Checks

Context Check Description
ci/Intel-compilation success Compilation OK
ci/checkpatch success coding style OK

Commit Message

Hemant Agrawal March 2, 2020, 2:32 p.m. UTC
From: Alex Marginean <alexandru.marginean@nxp.com>

We don't need barriers here since this read doesn't have to be strictly
serialized in relation to other surrounding memory/register accesses.
We only want a reasonably recent value out of hardware so we know how much
we can clean.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
---
 drivers/net/enetc/enetc_rxtx.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/enetc/enetc_rxtx.c b/drivers/net/enetc/enetc_rxtx.c
index b7ecb75ec..395f5ecf4 100644
--- a/drivers/net/enetc/enetc_rxtx.c
+++ b/drivers/net/enetc/enetc_rxtx.c
@@ -23,12 +23,15 @@  enetc_clean_tx_ring(struct enetc_bdr *tx_ring)
 	struct enetc_swbd *tx_swbd;
 	int i, hwci;
 
+	/* we don't need barriers here, we just want a relatively current value
+	 * from HW.
+	 */
+	hwci = (int)(rte_read32_relaxed(tx_ring->tcisr) &
+		     ENETC_TBCISR_IDX_MASK);
+
 	i = tx_ring->next_to_clean;
 	tx_swbd = &tx_ring->q_swbd[i];
 
-	hwci = (int)(enetc_rd_reg(tx_ring->tcisr) &
-		     ENETC_TBCISR_IDX_MASK);
-
 	/* we're only reading the CI index once here, which means HW may update
 	 * it while we're doing clean-up.  We could read the register in a loop
 	 * but for now I assume it's OK to leave a few Tx frames for next call.