From patchwork Sun Jan 19 15:53:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alfredo Cardigliano X-Patchwork-Id: 64888 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 981B0A0520; Sun, 19 Jan 2020 16:55:11 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 69586378B; Sun, 19 Jan 2020 16:54:24 +0100 (CET) Received: from mail.ntop.org (mail-digitalocean.ntop.org [167.99.215.164]) by dpdk.org (Postfix) with ESMTP id 905F129AC for ; Sun, 19 Jan 2020 16:54:14 +0100 (CET) Received: from devele.ntop.org (net-93-145-196-230.cust.vodafonedsl.it [93.145.196.230]) by mail.ntop.org (Postfix) with ESMTPSA id 3C5B340776; Sun, 19 Jan 2020 16:54:14 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ntop.org; s=mail; t=1579449254; bh=B/dq5kQy9nYFg8bWXZ9sKWw0mhV6PMX5wLVtKDnIwek=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=W+f2Wg4efnyZ1FTsqxId/PaPVawzlTFuddK4EOUs2ep6BRfMtF7RntLS2KPiSn5zc /VvJfRI3RQzjUsYKkxYMRMms7JBrBD3QVnrzDFRr8f+W1o+hHCLwJm4fpIeJJLE/0D zjSG8cgSLrcO3axPHP4lVg9StdYEtSoy9QvM17v4= From: Alfredo Cardigliano To: Alfredo Cardigliano Cc: dev@dpdk.org Date: Sun, 19 Jan 2020 16:53:43 +0100 Message-Id: <20200119155356.20403-6-cardigliano@ntop.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200119155356.20403-1-cardigliano@ntop.org> References: <20200119155356.20403-1-cardigliano@ntop.org> Subject: [dpdk-dev] [PATCH v5 05/17] net/ionic: add port management commands X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add port management commands that apply to the physical ports associated with the PCI device, which might be shared among several logical interfaces. Signed-off-by: Alfredo Cardigliano Reviewed-by: Shannon Nelson --- drivers/net/ionic/ionic.h | 6 ++ drivers/net/ionic/ionic_dev.c | 127 +++++++++++++++++++++++++++++++ drivers/net/ionic/ionic_dev.h | 18 +++++ drivers/net/ionic/ionic_ethdev.c | 14 ++++ drivers/net/ionic/ionic_main.c | 127 +++++++++++++++++++++++++++++++ 5 files changed, 292 insertions(+) diff --git a/drivers/net/ionic/ionic.h b/drivers/net/ionic/ionic.h index a415dd80a..1adea8f7d 100644 --- a/drivers/net/ionic/ionic.h +++ b/drivers/net/ionic/ionic.h @@ -8,6 +8,8 @@ #include #include +#include + #include "ionic_dev.h" #include "ionic_if.h" #include "ionic_osdep.h" @@ -61,4 +63,8 @@ int ionic_identify(struct ionic_adapter *adapter); int ionic_init(struct ionic_adapter *adapter); int ionic_reset(struct ionic_adapter *adapter); +int ionic_port_identify(struct ionic_adapter *adapter); +int ionic_port_init(struct ionic_adapter *adapter); +int ionic_port_reset(struct ionic_adapter *adapter); + #endif /* _IONIC_H_ */ diff --git a/drivers/net/ionic/ionic_dev.c b/drivers/net/ionic/ionic_dev.c index a8ad5358f..d74834122 100644 --- a/drivers/net/ionic/ionic_dev.c +++ b/drivers/net/ionic/ionic_dev.c @@ -132,3 +132,130 @@ ionic_dev_cmd_reset(struct ionic_dev *idev) ionic_dev_cmd_go(idev, &cmd); } + +/* Port commands */ + +void +ionic_dev_cmd_port_identify(struct ionic_dev *idev) +{ + union ionic_dev_cmd cmd = { + .port_init.opcode = IONIC_CMD_PORT_IDENTIFY, + .port_init.index = 0, + }; + + ionic_dev_cmd_go(idev, &cmd); +} + +void +ionic_dev_cmd_port_init(struct ionic_dev *idev) +{ + union ionic_dev_cmd cmd = { + .port_init.opcode = IONIC_CMD_PORT_INIT, + .port_init.index = 0, + .port_init.info_pa = idev->port_info_pa, + }; + + ionic_dev_cmd_go(idev, &cmd); +} + +void +ionic_dev_cmd_port_reset(struct ionic_dev *idev) +{ + union ionic_dev_cmd cmd = { + .port_reset.opcode = IONIC_CMD_PORT_RESET, + .port_reset.index = 0, + }; + + ionic_dev_cmd_go(idev, &cmd); +} + +void +ionic_dev_cmd_port_state(struct ionic_dev *idev, uint8_t state) +{ + union ionic_dev_cmd cmd = { + .port_setattr.opcode = IONIC_CMD_PORT_SETATTR, + .port_setattr.index = 0, + .port_setattr.attr = IONIC_PORT_ATTR_STATE, + .port_setattr.state = state, + }; + + ionic_dev_cmd_go(idev, &cmd); +} + +void +ionic_dev_cmd_port_speed(struct ionic_dev *idev, uint32_t speed) +{ + union ionic_dev_cmd cmd = { + .port_setattr.opcode = IONIC_CMD_PORT_SETATTR, + .port_setattr.index = 0, + .port_setattr.attr = IONIC_PORT_ATTR_SPEED, + .port_setattr.speed = speed, + }; + + ionic_dev_cmd_go(idev, &cmd); +} + +void +ionic_dev_cmd_port_mtu(struct ionic_dev *idev, uint32_t mtu) +{ + union ionic_dev_cmd cmd = { + .port_setattr.opcode = IONIC_CMD_PORT_SETATTR, + .port_setattr.index = 0, + .port_setattr.attr = IONIC_PORT_ATTR_MTU, + .port_setattr.mtu = mtu, + }; + + ionic_dev_cmd_go(idev, &cmd); +} + +void +ionic_dev_cmd_port_autoneg(struct ionic_dev *idev, uint8_t an_enable) +{ + union ionic_dev_cmd cmd = { + .port_setattr.opcode = IONIC_CMD_PORT_SETATTR, + .port_setattr.index = 0, + .port_setattr.attr = IONIC_PORT_ATTR_AUTONEG, + .port_setattr.an_enable = an_enable, + }; + + ionic_dev_cmd_go(idev, &cmd); +} + +void +ionic_dev_cmd_port_fec(struct ionic_dev *idev, uint8_t fec_type) +{ + union ionic_dev_cmd cmd = { + .port_setattr.opcode = IONIC_CMD_PORT_SETATTR, + .port_setattr.index = 0, + .port_setattr.attr = IONIC_PORT_ATTR_FEC, + .port_setattr.fec_type = fec_type, + }; + + ionic_dev_cmd_go(idev, &cmd); +} + +void +ionic_dev_cmd_port_pause(struct ionic_dev *idev, uint8_t pause_type) +{ + union ionic_dev_cmd cmd = { + .port_setattr.opcode = IONIC_CMD_PORT_SETATTR, + .port_setattr.index = 0, + .port_setattr.attr = IONIC_PORT_ATTR_PAUSE, + .port_setattr.pause_type = pause_type, + }; + + ionic_dev_cmd_go(idev, &cmd); +} + +void +ionic_dev_cmd_port_loopback(struct ionic_dev *idev, uint8_t loopback_mode) +{ + union ionic_dev_cmd cmd = { + .port_setattr.opcode = IONIC_CMD_PORT_SETATTR, + .port_setattr.index = 0, + .port_setattr.attr = IONIC_PORT_ATTR_LOOPBACK, + .port_setattr.loopback_mode = loopback_mode, + }; + + ionic_dev_cmd_go(idev, &cmd); +} diff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h index 82a3cdb70..75c50d4cb 100644 --- a/drivers/net/ionic/ionic_dev.h +++ b/drivers/net/ionic/ionic_dev.h @@ -10,6 +10,7 @@ #include "ionic_regs.h" #define IONIC_DEVCMD_TIMEOUT 30 /* devcmd_timeout */ +#define IONIC_ALIGN 4096 struct ionic_adapter; @@ -111,6 +112,11 @@ struct ionic_dev { struct ionic_intr __iomem *intr_ctrl; struct ionic_intr_status __iomem *intr_status; + + struct ionic_port_info *port_info; + const struct rte_memzone *port_info_z; + rte_iova_t port_info_pa; + uint32_t port_info_sz; }; int ionic_dev_setup(struct ionic_adapter *adapter); @@ -124,4 +130,16 @@ void ionic_dev_cmd_identify(struct ionic_dev *idev, uint8_t ver); void ionic_dev_cmd_init(struct ionic_dev *idev); void ionic_dev_cmd_reset(struct ionic_dev *idev); +void ionic_dev_cmd_port_identify(struct ionic_dev *idev); +void ionic_dev_cmd_port_init(struct ionic_dev *idev); +void ionic_dev_cmd_port_reset(struct ionic_dev *idev); +void ionic_dev_cmd_port_state(struct ionic_dev *idev, uint8_t state); +void ionic_dev_cmd_port_speed(struct ionic_dev *idev, uint32_t speed); +void ionic_dev_cmd_port_mtu(struct ionic_dev *idev, uint32_t mtu); +void ionic_dev_cmd_port_autoneg(struct ionic_dev *idev, uint8_t an_enable); +void ionic_dev_cmd_port_fec(struct ionic_dev *idev, uint8_t fec_type); +void ionic_dev_cmd_port_pause(struct ionic_dev *idev, uint8_t pause_type); +void ionic_dev_cmd_port_loopback(struct ionic_dev *idev, + uint8_t loopback_mode); + #endif /* _IONIC_DEV_H_ */ diff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c index e23d0622c..b0ae7b076 100644 --- a/drivers/net/ionic/ionic_ethdev.c +++ b/drivers/net/ionic/ionic_ethdev.c @@ -98,6 +98,20 @@ eth_ionic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, goto err_free_adapter; } + /* Configure the ports */ + err = ionic_port_identify(adapter); + if (err) { + IONIC_PRINT(ERR, "Cannot identify port: %d, aborting", + err); + goto err_free_adapter; + } + + err = ionic_port_init(adapter); + if (err) { + IONIC_PRINT(ERR, "Cannot init port: %d, aborting", err); + goto err_free_adapter; + } + return 0; err_free_adapter: diff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c index 63b4ffc46..0b420ee0b 100644 --- a/drivers/net/ionic/ionic_main.c +++ b/drivers/net/ionic/ionic_main.c @@ -2,6 +2,8 @@ * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved. */ +#include + #include "ionic.h" static int @@ -128,3 +130,128 @@ ionic_reset(struct ionic_adapter *adapter) err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); return err; } + +int +ionic_port_identify(struct ionic_adapter *adapter) +{ + struct ionic_dev *idev = &adapter->idev; + struct ionic_identity *ident = &adapter->ident; + unsigned int port_words = sizeof(ident->port.words) / + sizeof(ident->port.words[0]); + unsigned int cmd_words = sizeof(idev->dev_cmd->data) / + sizeof(idev->dev_cmd->data[0]); + unsigned int i; + unsigned int nwords; + int err; + + ionic_dev_cmd_port_identify(idev); + err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); + if (!err) { + nwords = RTE_MIN(port_words, cmd_words); + for (i = 0; i < nwords; i++) + ident->port.words[i] = + ioread32(&idev->dev_cmd->data[i]); + } + + IONIC_PRINT(INFO, "speed %d ", ident->port.config.speed); + IONIC_PRINT(INFO, "mtu %d ", ident->port.config.mtu); + IONIC_PRINT(INFO, "state %d ", ident->port.config.state); + IONIC_PRINT(INFO, "an_enable %d ", ident->port.config.an_enable); + IONIC_PRINT(INFO, "fec_type %d ", ident->port.config.fec_type); + IONIC_PRINT(INFO, "pause_type %d ", ident->port.config.pause_type); + IONIC_PRINT(INFO, "loopback_mode %d", + ident->port.config.loopback_mode); + + return err; +} + +static const struct rte_memzone * +ionic_memzone_reserve(const char *name, uint32_t len, int socket_id) +{ + const struct rte_memzone *mz; + + mz = rte_memzone_lookup(name); + if (mz) + return mz; + + mz = rte_memzone_reserve_aligned(name, len, socket_id, + RTE_MEMZONE_IOVA_CONTIG, IONIC_ALIGN); + return mz; +} + +int +ionic_port_init(struct ionic_adapter *adapter) +{ + struct ionic_dev *idev = &adapter->idev; + struct ionic_identity *ident = &adapter->ident; + char z_name[RTE_MEMZONE_NAMESIZE]; + unsigned int config_words = sizeof(ident->port.config.words) / + sizeof(ident->port.config.words[0]); + unsigned int cmd_words = sizeof(idev->dev_cmd->data) / + sizeof(idev->dev_cmd->data[0]); + unsigned int nwords; + unsigned int i; + int err; + + if (idev->port_info) + return 0; + + idev->port_info_sz = RTE_ALIGN(sizeof(*idev->port_info), PAGE_SIZE); + + snprintf(z_name, sizeof(z_name), "%s_port_%s_info", + IONIC_DRV_NAME, + adapter->pci_dev->device.name); + + idev->port_info_z = ionic_memzone_reserve(z_name, idev->port_info_sz, + SOCKET_ID_ANY); + if (!idev->port_info_z) { + IONIC_PRINT(ERR, "Cannot reserve port info DMA memory"); + return -ENOMEM; + } + + idev->port_info = idev->port_info_z->addr; + idev->port_info_pa = idev->port_info_z->iova; + + nwords = RTE_MIN(config_words, cmd_words); + + for (i = 0; i < nwords; i++) + iowrite32(ident->port.config.words[i], &idev->dev_cmd->data[i]); + + ionic_dev_cmd_port_init(idev); + err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); + if (err) { + IONIC_PRINT(ERR, "Failed to init port"); + return err; + } + + ionic_dev_cmd_port_state(idev, IONIC_PORT_ADMIN_STATE_UP); + err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); + if (err) { + IONIC_PRINT(WARNING, "Failed to bring port UP"); + return err; + } + + return 0; +} + +int +ionic_port_reset(struct ionic_adapter *adapter) +{ + struct ionic_dev *idev = &adapter->idev; + int err; + + if (!idev->port_info) + return 0; + + ionic_dev_cmd_port_reset(idev); + err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); + if (err) { + IONIC_PRINT(ERR, "Failed to reset port"); + return err; + } + + idev->port_info = NULL; + idev->port_info_pa = 0; + + return 0; +}