[v4,33/36] net/i40e/base: introduce firmware EMP reset register offsets

Message ID 20200113023949.26718-34-xiaolong.ye@intel.com (mailing list archive)
State Accepted, archived
Delegated to: xiaolong ye
Headers
Series update for i40e base code |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Xiaolong Ye Jan. 13, 2020, 2:39 a.m. UTC
  Introduce offsets of firmware registers holding a number of EMP resets.
Implement offsets as a preprocessor's constants.
Required by drivers to read a number of EMP resets reported by FW.

Signed-off-by: Piotr Kwapulinski <piotr.kwapulinski@intel.com>
Signed-off-by: Xiaolong Ye <xiaolong.ye@intel.com>
---
 drivers/net/i40e/base/i40e_register.h | 2 ++
 1 file changed, 2 insertions(+)
  

Comments

Kwapulinski, Piotr Jan. 13, 2020, 8:19 a.m. UTC | #1
ACK

-----Original Message-----
From: Ye, Xiaolong <xiaolong.ye@intel.com> 
Sent: Monday, January 13, 2020 3:40 AM
To: Xing, Beilei <beilei.xing@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>
Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Kwapulinski, Piotr <piotr.kwapulinski@intel.com>
Subject: [PATCH v4 33/36] net/i40e/base: introduce firmware EMP reset register offsets

Introduce offsets of firmware registers holding a number of EMP resets.
Implement offsets as a preprocessor's constants.
Required by drivers to read a number of EMP resets reported by FW.

Signed-off-by: Piotr Kwapulinski <piotr.kwapulinski@intel.com>
Signed-off-by: Xiaolong Ye <xiaolong.ye@intel.com>
---
 drivers/net/i40e/base/i40e_register.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/i40e/base/i40e_register.h b/drivers/net/i40e/base/i40e_register.h
index 3a8c0ccd1..436f48efa 100644
--- a/drivers/net/i40e/base/i40e_register.h
+++ b/drivers/net/i40e/base/i40e_register.h
@@ -366,6 +366,8 @@
 #define I40E_GL_FWSTS_FWRI_MASK   I40E_MASK(0x1, I40E_GL_FWSTS_FWRI_SHIFT)
 #define I40E_GL_FWSTS_FWS1B_SHIFT 16
 #define I40E_GL_FWSTS_FWS1B_MASK  I40E_MASK(0xFF, I40E_GL_FWSTS_FWS1B_SHIFT)
+#define I40E_GL_FWSTS_FWS1B_EMPR_0 I40E_MASK(0x20, 
+I40E_GL_FWSTS_FWS1B_SHIFT) #define I40E_GL_FWSTS_FWS1B_EMPR_10 
+I40E_MASK(0x2A, I40E_GL_FWSTS_FWS1B_SHIFT)
 #define I40E_XL710_GL_FWSTS_FWS1B_REC_MOD_CORER_MASK \
 				I40E_MASK(0x30, I40E_GL_FWSTS_FWS1B_SHIFT)  #define I40E_XL710_GL_FWSTS_FWS1B_REC_MOD_GLOBR_MASK \
--
2.17.1

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Patch

diff --git a/drivers/net/i40e/base/i40e_register.h b/drivers/net/i40e/base/i40e_register.h
index 3a8c0ccd1..436f48efa 100644
--- a/drivers/net/i40e/base/i40e_register.h
+++ b/drivers/net/i40e/base/i40e_register.h
@@ -366,6 +366,8 @@ 
 #define I40E_GL_FWSTS_FWRI_MASK   I40E_MASK(0x1, I40E_GL_FWSTS_FWRI_SHIFT)
 #define I40E_GL_FWSTS_FWS1B_SHIFT 16
 #define I40E_GL_FWSTS_FWS1B_MASK  I40E_MASK(0xFF, I40E_GL_FWSTS_FWS1B_SHIFT)
+#define I40E_GL_FWSTS_FWS1B_EMPR_0 I40E_MASK(0x20, I40E_GL_FWSTS_FWS1B_SHIFT)
+#define I40E_GL_FWSTS_FWS1B_EMPR_10 I40E_MASK(0x2A, I40E_GL_FWSTS_FWS1B_SHIFT)
 #define I40E_XL710_GL_FWSTS_FWS1B_REC_MOD_CORER_MASK \
 				I40E_MASK(0x30, I40E_GL_FWSTS_FWS1B_SHIFT)
 #define I40E_XL710_GL_FWSTS_FWS1B_REC_MOD_GLOBR_MASK \