From patchwork Mon Jan 13 02:39:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaolong Ye X-Patchwork-Id: 64473 X-Patchwork-Delegate: xiaolong.ye@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 47972A04F0; Mon, 13 Jan 2020 03:48:31 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7AF0F1D5B7; Mon, 13 Jan 2020 03:47:27 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 7715D1D57A for ; Mon, 13 Jan 2020 03:47:13 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Jan 2020 18:47:13 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,427,1571727600"; d="scan'208";a="272916331" Received: from dpdk_yexl_af_xdp.sh.intel.com ([10.67.119.206]) by FMSMGA003.fm.intel.com with ESMTP; 12 Jan 2020 18:47:12 -0800 From: Xiaolong Ye To: Beilei Xing , Qi Zhang Cc: dev@dpdk.org, Xiaolong Ye , Doug Dziggel , Michal Litwicki Date: Mon, 13 Jan 2020 10:39:21 +0800 Message-Id: <20200113023949.26718-10-xiaolong.ye@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200113023949.26718-1-xiaolong.ye@intel.com> References: <20191202074935.97629-1-xiaolong.ye@intel.com> <20200113023949.26718-1-xiaolong.ye@intel.com> Subject: [dpdk-dev] [PATCH v4 09/36] net/i40e/base: adding flags for PHY types X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Adding bit flags to enable/disable EEE capability for 2.5GBase-T and 5GBase-T PHY types as well as 'Set autonomous EEE for relevant enabled PHY types' flag. Signed-off-by: Doug Dziggel Signed-off-by: Michal Litwicki Signed-off-by: Xiaolong Ye --- drivers/net/i40e/base/i40e_adminq_cmd.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h b/drivers/net/i40e/base/i40e_adminq_cmd.h index a89b88fa5..2bd8f81f9 100644 --- a/drivers/net/i40e/base/i40e_adminq_cmd.h +++ b/drivers/net/i40e/base/i40e_adminq_cmd.h @@ -2027,12 +2027,15 @@ struct i40e_aq_get_phy_abilities_resp { #define I40E_AQ_PHY_FEC_ABILITY_KR 0x40 #define I40E_AQ_PHY_FEC_ABILITY_RS 0x80 __le16 eee_capability; +#define I40E_AQ_EEE_AUTO 0x0001 #define I40E_AQ_EEE_100BASE_TX 0x0002 #define I40E_AQ_EEE_1000BASE_T 0x0004 #define I40E_AQ_EEE_10GBASE_T 0x0008 #define I40E_AQ_EEE_1000BASE_KX 0x0010 #define I40E_AQ_EEE_10GBASE_KX4 0x0020 #define I40E_AQ_EEE_10GBASE_KR 0x0040 +#define I40E_AQ_EEE_2_5GBASE_T 0x0100 +#define I40E_AQ_EEE_5GBASE_T 0x0200 __le32 eeer_val; u8 d3_lpan; #define I40E_AQ_SET_PHY_D3_LPAN_ENA 0x01