[1/4] net/ice: add devargs to control pipeline mode
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Commit Message
From: Qiming Yang <qiming.yang@intel.com>
Added a devarg to control the mode in generic flow API.
We use none-pipeline mode by default.
Signed-off-by: Qiming Yang <qiming.yang@intel.com>
---
doc/guides/nics/ice.rst | 11 +++++++++++
drivers/net/ice/ice_ethdev.c | 16 +++++++++++++++-
drivers/net/ice/ice_ethdev.h | 1 +
3 files changed, 27 insertions(+), 1 deletion(-)
Comments
On 09/04, Ying Wang wrote:
>From: Qiming Yang <qiming.yang@intel.com>
>
>Added a devarg to control the mode in generic flow API.
>We use none-pipeline mode by default.
>
>Signed-off-by: Qiming Yang <qiming.yang@intel.com>
>---
> doc/guides/nics/ice.rst | 11 +++++++++++
> drivers/net/ice/ice_ethdev.c | 16 +++++++++++++++-
> drivers/net/ice/ice_ethdev.h | 1 +
> 3 files changed, 27 insertions(+), 1 deletion(-)
>
>diff --git a/doc/guides/nics/ice.rst b/doc/guides/nics/ice.rst
>index 03819d29f..a8429a535 100644
>--- a/doc/guides/nics/ice.rst
>+++ b/doc/guides/nics/ice.rst
>@@ -61,6 +61,17 @@ Runtime Config Options
> NOTE: In Safe mode, only very limited features are available, features like RSS,
> checksum, fdir, tunneling ... are all disabled.
>
>+- ``Generic Flow Pipeline Mode Support`` (default ``0``)
>+
>+ In pipeline mode, a flow can be setted at one specific stage by setting parameter
s/setted/set
>+ ``priority``. Currently, we support two stages, priority 0 for permission and 1 for
>+ distributor. For none-pipeline mode, all flows are assumed to be at the same pipeline
Can we have more description of the 'permission' and 'distributor' in the doc?
And we also need update in 19.11 release note, maybe in Ying's patch.
>+ stage, priority is ignored. Default, generic flow API is enabled in none pipeline mode,
s/Default/By default
>+ user can choose to use pipeline mode by set ``devargs`` parameter ``pipeline-mode-support``,
s/set/setting
>+ for example::
>+
>+ -w 80:00.0, pipleline-mode-support=1
>+
> Driver compilation and testing
> ------------------------------
>
>diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
>index 9aa7506ba..4e0645db1 100644
>--- a/drivers/net/ice/ice_ethdev.c
>+++ b/drivers/net/ice/ice_ethdev.c
>@@ -19,9 +19,11 @@
>
> /* devargs */
> #define ICE_SAFE_MODE_SUPPORT_ARG "safe-mode-support"
>+#define ICE_PIPELINE_MODE_SUPPORT_ARG "pipeline-mode-support"
>
> static const char * const ice_valid_args[] = {
> ICE_SAFE_MODE_SUPPORT_ARG,
>+ ICE_PIPELINE_MODE_SUPPORT_ARG,
> NULL
> };
>
>@@ -1510,7 +1512,18 @@ static int ice_parse_devargs(struct rte_eth_dev *dev)
>
> ret = rte_kvargs_process(kvlist, ICE_SAFE_MODE_SUPPORT_ARG,
> &parse_bool, &ad->devargs.safe_mode_support);
>+ if (ret)
>+ goto err_devargs;
>+
>+ ret = rte_kvargs_process(kvlist, ICE_PIPELINE_MODE_SUPPORT_ARG,
>+ &parse_bool, &ad->devargs.pipeline_mode_support);
>+ if (ret)
>+ goto err_devargs;
>+
>+ rte_kvargs_free(kvlist);
>+ return ret;
>
These 2 lines are duplicated with below code.
>+err_devargs:
> rte_kvargs_free(kvlist);
> return ret;
> }
>@@ -3925,7 +3938,8 @@ RTE_PMD_REGISTER_PCI(net_ice, rte_ice_pmd);
> RTE_PMD_REGISTER_PCI_TABLE(net_ice, pci_id_ice_map);
> RTE_PMD_REGISTER_KMOD_DEP(net_ice, "* igb_uio | uio_pci_generic | vfio-pci");
> RTE_PMD_REGISTER_PARAM_STRING(net_ice,
>- ICE_SAFE_MODE_SUPPORT_ARG "=<0|1>");
>+ ICE_SAFE_MODE_SUPPORT_ARG "=<0|1>"
>+ ICE_PIPELINE_MODE_SUPPORT_ARG "=<0|1>");
>
> RTE_INIT(ice_init_log)
> {
>diff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h
>index 926db23d2..9bf5de08d 100644
>--- a/drivers/net/ice/ice_ethdev.h
>+++ b/drivers/net/ice/ice_ethdev.h
>@@ -285,6 +285,7 @@ struct ice_pf {
> */
> struct ice_devargs {
> int safe_mode_support;
>+ int pipeline_mode_support;
> };
>
> /**
>--
>2.15.1
>
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Ying Wang
> Sent: Tuesday, September 3, 2019 3:15 PM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>
> Cc: Ye, Xiaolong <xiaolong.ye@intel.com>; Yang, Qiming
> <qiming.yang@intel.com>; dev@dpdk.org; Wang, Ying A
> <ying.a.wang@intel.com>; Zhao1, Wei <wei.zhao1@intel.com>
> Subject: [dpdk-dev] [PATCH 1/4] net/ice: add devargs to control pipeline
> mode
>
> From: Qiming Yang <qiming.yang@intel.com>
>
> Added a devarg to control the mode in generic flow API.
> We use none-pipeline mode by default.
>
> Signed-off-by: Qiming Yang <qiming.yang@intel.com>
> ---
> doc/guides/nics/ice.rst | 11 +++++++++++
> drivers/net/ice/ice_ethdev.c | 16 +++++++++++++++-
> drivers/net/ice/ice_ethdev.h | 1 +
> 3 files changed, 27 insertions(+), 1 deletion(-)
>
> diff --git a/doc/guides/nics/ice.rst b/doc/guides/nics/ice.rst index
> 03819d29f..a8429a535 100644
> --- a/doc/guides/nics/ice.rst
> +++ b/doc/guides/nics/ice.rst
> @@ -61,6 +61,17 @@ Runtime Config Options
> NOTE: In Safe mode, only very limited features are available, features like
> RSS,
> checksum, fdir, tunneling ... are all disabled.
>
> +- ``Generic Flow Pipeline Mode Support`` (default ``0``)
> +
> + In pipeline mode, a flow can be setted at one specific stage by
setted => set
> + setting parameter ``priority``. Currently, we support two stages,
> + priority 0 for permission and 1 for distributor. For none-pipeline
none-pipeline => non-pipeline
> + mode, all flows are assumed to be at the same pipeline stage,
> + priority is ignored. Default, generic flow API is enabled in none
none => non
> + pipeline mode, user can choose to use pipeline mode by set ``devargs``
> parameter ``pipeline-mode-support``, for example::
> +
> + -w 80:00.0, pipleline-mode-support=1
> +
> Driver compilation and testing
> ------------------------------
>
> diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
> index 9aa7506ba..4e0645db1 100644
> --- a/drivers/net/ice/ice_ethdev.c
> +++ b/drivers/net/ice/ice_ethdev.c
> @@ -19,9 +19,11 @@
>
> /* devargs */
> #define ICE_SAFE_MODE_SUPPORT_ARG "safe-mode-support"
> +#define ICE_PIPELINE_MODE_SUPPORT_ARG "pipeline-mode-support"
>
> static const char * const ice_valid_args[] = {
> ICE_SAFE_MODE_SUPPORT_ARG,
> + ICE_PIPELINE_MODE_SUPPORT_ARG,
> NULL
> };
>
> @@ -1510,7 +1512,18 @@ static int ice_parse_devargs(struct rte_eth_dev
> *dev)
>
> ret = rte_kvargs_process(kvlist, ICE_SAFE_MODE_SUPPORT_ARG,
> &parse_bool, &ad-
> >devargs.safe_mode_support);
> + if (ret)
> + goto err_devargs;
> +
> + ret = rte_kvargs_process(kvlist,
> ICE_PIPELINE_MODE_SUPPORT_ARG,
> + &parse_bool, &ad-
> >devargs.pipeline_mode_support);
> + if (ret)
> + goto err_devargs;
> +
> + rte_kvargs_free(kvlist);
> + return ret;
>
> +err_devargs:
> rte_kvargs_free(kvlist);
> return ret;
> }
> @@ -3925,7 +3938,8 @@ RTE_PMD_REGISTER_PCI(net_ice, rte_ice_pmd);
> RTE_PMD_REGISTER_PCI_TABLE(net_ice, pci_id_ice_map);
> RTE_PMD_REGISTER_KMOD_DEP(net_ice, "* igb_uio | uio_pci_generic |
> vfio-pci"); RTE_PMD_REGISTER_PARAM_STRING(net_ice,
> - ICE_SAFE_MODE_SUPPORT_ARG "=<0|1>");
> + ICE_SAFE_MODE_SUPPORT_ARG "=<0|1>"
> + ICE_PIPELINE_MODE_SUPPORT_ARG "=<0|1>");
>
> RTE_INIT(ice_init_log)
> {
> diff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h
> index 926db23d2..9bf5de08d 100644
> --- a/drivers/net/ice/ice_ethdev.h
> +++ b/drivers/net/ice/ice_ethdev.h
> @@ -285,6 +285,7 @@ struct ice_pf {
> */
> struct ice_devargs {
> int safe_mode_support;
> + int pipeline_mode_support;
> };
>
> /**
> --
> 2.15.1
> -----Original Message-----
> From: Ye, Xiaolong
> Sent: Wednesday, September 4, 2019 8:34 PM
> To: Wang, Ying A <ying.a.wang@intel.com>
> Cc: Zhang, Qi Z <qi.z.zhang@intel.com>; Yang, Qiming
> <qiming.yang@intel.com>; dev@dpdk.org; Zhao1, Wei
> <wei.zhao1@intel.com>
> Subject: Re: [PATCH 1/4] net/ice: add devargs to control pipeline mode
>
> On 09/04, Ying Wang wrote:
> >From: Qiming Yang <qiming.yang@intel.com>
> >
> >Added a devarg to control the mode in generic flow API.
> >We use none-pipeline mode by default.
> >
> >Signed-off-by: Qiming Yang <qiming.yang@intel.com>
> >---
> > doc/guides/nics/ice.rst | 11 +++++++++++
> > drivers/net/ice/ice_ethdev.c | 16 +++++++++++++++-
> >drivers/net/ice/ice_ethdev.h | 1 +
> > 3 files changed, 27 insertions(+), 1 deletion(-)
> >
> >diff --git a/doc/guides/nics/ice.rst b/doc/guides/nics/ice.rst index
> >03819d29f..a8429a535 100644
> >--- a/doc/guides/nics/ice.rst
> >+++ b/doc/guides/nics/ice.rst
> >@@ -61,6 +61,17 @@ Runtime Config Options
> > NOTE: In Safe mode, only very limited features are available, features like
> RSS,
> > checksum, fdir, tunneling ... are all disabled.
> >
> >+- ``Generic Flow Pipeline Mode Support`` (default ``0``)
> >+
> >+ In pipeline mode, a flow can be setted at one specific stage by
> >+ setting parameter
>
> s/setted/set
Got
>
> >+ ``priority``. Currently, we support two stages, priority 0 for
> >+ permission and 1 for distributor. For none-pipeline mode, all flows
> >+ are assumed to be at the same pipeline
>
> Can we have more description of the 'permission' and 'distributor' in the doc?
> And we also need update in 19.11 release note, maybe in Ying's patch.
>
I think you can ignore these concepts, just our design used, user will only know we have two stages. I'll delete this sentence.
> >+ stage, priority is ignored. Default, generic flow API is enabled in
> >+ none pipeline mode,
>
> s/Default/By default
>
Got
> >+ user can choose to use pipeline mode by set ``devargs`` parameter
> >+ ``pipeline-mode-support``,
>
> s/set/setting
>
Got
> >+ for example::
> >+
> >+ -w 80:00.0, pipleline-mode-support=1
> >+
> > Driver compilation and testing
> > ------------------------------
> >
> >diff --git a/drivers/net/ice/ice_ethdev.c
> >b/drivers/net/ice/ice_ethdev.c index 9aa7506ba..4e0645db1 100644
> >--- a/drivers/net/ice/ice_ethdev.c
> >+++ b/drivers/net/ice/ice_ethdev.c
> >@@ -19,9 +19,11 @@
> >
> > /* devargs */
> > #define ICE_SAFE_MODE_SUPPORT_ARG "safe-mode-support"
> >+#define ICE_PIPELINE_MODE_SUPPORT_ARG "pipeline-mode-support"
> >
> > static const char * const ice_valid_args[] = {
> > ICE_SAFE_MODE_SUPPORT_ARG,
> >+ ICE_PIPELINE_MODE_SUPPORT_ARG,
> > NULL
> > };
> >
> >@@ -1510,7 +1512,18 @@ static int ice_parse_devargs(struct rte_eth_dev
> >*dev)
> >
> > ret = rte_kvargs_process(kvlist, ICE_SAFE_MODE_SUPPORT_ARG,
> > &parse_bool, &ad-
> >devargs.safe_mode_support);
> >+ if (ret)
> >+ goto err_devargs;
> >+
> >+ ret = rte_kvargs_process(kvlist, ICE_PIPELINE_MODE_SUPPORT_ARG,
> >+ &parse_bool, &ad-
> >devargs.pipeline_mode_support);
> >+ if (ret)
> >+ goto err_devargs;
> >+
> >+ rte_kvargs_free(kvlist);
> >+ return ret;
> >
>
> These 2 lines are duplicated with below code.
Not duplicated, one for normal case, one for error case. If no this two lines, the first argument's return value will be covered by the second one.
>
> >+err_devargs:
> > rte_kvargs_free(kvlist);
> > return ret;
> > }
> >@@ -3925,7 +3938,8 @@ RTE_PMD_REGISTER_PCI(net_ice, rte_ice_pmd);
> >RTE_PMD_REGISTER_PCI_TABLE(net_ice, pci_id_ice_map);
> >RTE_PMD_REGISTER_KMOD_DEP(net_ice, "* igb_uio | uio_pci_generic |
> >vfio-pci"); RTE_PMD_REGISTER_PARAM_STRING(net_ice,
> >- ICE_SAFE_MODE_SUPPORT_ARG "=<0|1>");
> >+ ICE_SAFE_MODE_SUPPORT_ARG "=<0|1>"
> >+ ICE_PIPELINE_MODE_SUPPORT_ARG "=<0|1>");
> >
> > RTE_INIT(ice_init_log)
> > {
> >diff --git a/drivers/net/ice/ice_ethdev.h
> >b/drivers/net/ice/ice_ethdev.h index 926db23d2..9bf5de08d 100644
> >--- a/drivers/net/ice/ice_ethdev.h
> >+++ b/drivers/net/ice/ice_ethdev.h
> >@@ -285,6 +285,7 @@ struct ice_pf {
> > */
> > struct ice_devargs {
> > int safe_mode_support;
> >+ int pipeline_mode_support;
> > };
> >
> > /**
> >--
> >2.15.1
> >
On 09/09, Yang, Qiming wrote:
>> Can we have more description of the 'permission' and 'distributor' in the doc?
>> And we also need update in 19.11 release note, maybe in Ying's patch.
>>
>
>I think you can ignore these concepts, just our design used, user will only know we have two stages. I'll delete this sentence.
At least we'll still need to tell user how to use these two stages in practice.
>
>> >+ stage, priority is ignored. Default, generic flow API is enabled in
>> >+ none pipeline mode,
>>
>> s/Default/By default
>>
>
>Got
>
>> >+ user can choose to use pipeline mode by set ``devargs`` parameter
>> >+ ``pipeline-mode-support``,
>>
>> s/set/setting
>>
>Got
>
>> >+ for example::
>> >+
>> >+ -w 80:00.0, pipleline-mode-support=1
>> >+
>> > Driver compilation and testing
>> > ------------------------------
>> >
>> >diff --git a/drivers/net/ice/ice_ethdev.c
>> >b/drivers/net/ice/ice_ethdev.c index 9aa7506ba..4e0645db1 100644
>> >--- a/drivers/net/ice/ice_ethdev.c
>> >+++ b/drivers/net/ice/ice_ethdev.c
>> >@@ -19,9 +19,11 @@
>> >
>> > /* devargs */
>> > #define ICE_SAFE_MODE_SUPPORT_ARG "safe-mode-support"
>> >+#define ICE_PIPELINE_MODE_SUPPORT_ARG "pipeline-mode-support"
>> >
>> > static const char * const ice_valid_args[] = {
>> > ICE_SAFE_MODE_SUPPORT_ARG,
>> >+ ICE_PIPELINE_MODE_SUPPORT_ARG,
>> > NULL
>> > };
>> >
>> >@@ -1510,7 +1512,18 @@ static int ice_parse_devargs(struct rte_eth_dev
>> >*dev)
>> >
>> > ret = rte_kvargs_process(kvlist, ICE_SAFE_MODE_SUPPORT_ARG,
>> > &parse_bool, &ad-
>> >devargs.safe_mode_support);
>> >+ if (ret)
>> >+ goto err_devargs;
>> >+
>> >+ ret = rte_kvargs_process(kvlist, ICE_PIPELINE_MODE_SUPPORT_ARG,
>> >+ &parse_bool, &ad-
>> >devargs.pipeline_mode_support);
>> >+ if (ret)
>> >+ goto err_devargs;
>> >+
>> >+ rte_kvargs_free(kvlist);
>> >+ return ret;
>> >
>>
>> These 2 lines are duplicated with below code.
>
>Not duplicated, one for normal case, one for error case. If no this two lines, the first argument's return value will be covered by the second one.
I don't get it, they are literally the same thing, it's a normal case or a error
case depends on the ret value obtained. What do you mean by "will be covered
by the second one"? If the first argument process succeeds, the ret is 0, it
will continue to parse the second one, if ret is non-zero, it just goes out
by the `goto` statement.
Thanks,
Xiaolong
>
>>
>> >+err_devargs:
>> > rte_kvargs_free(kvlist);
>> > return ret;
>> > }
>> >@@ -3925,7 +3938,8 @@ RTE_PMD_REGISTER_PCI(net_ice, rte_ice_pmd);
>> >RTE_PMD_REGISTER_PCI_TABLE(net_ice, pci_id_ice_map);
>> >RTE_PMD_REGISTER_KMOD_DEP(net_ice, "* igb_uio | uio_pci_generic |
>> >vfio-pci"); RTE_PMD_REGISTER_PARAM_STRING(net_ice,
>> >- ICE_SAFE_MODE_SUPPORT_ARG "=<0|1>");
>> >+ ICE_SAFE_MODE_SUPPORT_ARG "=<0|1>"
>> >+ ICE_PIPELINE_MODE_SUPPORT_ARG "=<0|1>");
>> >
>> > RTE_INIT(ice_init_log)
>> > {
>> >diff --git a/drivers/net/ice/ice_ethdev.h
>> >b/drivers/net/ice/ice_ethdev.h index 926db23d2..9bf5de08d 100644
>> >--- a/drivers/net/ice/ice_ethdev.h
>> >+++ b/drivers/net/ice/ice_ethdev.h
>> >@@ -285,6 +285,7 @@ struct ice_pf {
>> > */
>> > struct ice_devargs {
>> > int safe_mode_support;
>> >+ int pipeline_mode_support;
>> > };
>> >
>> > /**
>> >--
>> >2.15.1
>> >
I got you, will fix it in v2
Qiming
-----Original Message-----
From: Ye, Xiaolong
Sent: Monday, September 9, 2019 17:17
To: Yang, Qiming <qiming.yang@intel.com>
Cc: Wang, Ying A <ying.a.wang@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>; dev@dpdk.org; Zhao1, Wei <wei.zhao1@intel.com>
Subject: Re: [PATCH 1/4] net/ice: add devargs to control pipeline mode
On 09/09, Yang, Qiming wrote:
>> Can we have more description of the 'permission' and 'distributor' in the doc?
>> And we also need update in 19.11 release note, maybe in Ying's patch.
>>
>
>I think you can ignore these concepts, just our design used, user will only know we have two stages. I'll delete this sentence.
At least we'll still need to tell user how to use these two stages in practice.
>
>> >+ stage, priority is ignored. Default, generic flow API is enabled
>> >+ in none pipeline mode,
>>
>> s/Default/By default
>>
>
>Got
>
>> >+ user can choose to use pipeline mode by set ``devargs`` parameter
>> >+ ``pipeline-mode-support``,
>>
>> s/set/setting
>>
>Got
>
>> >+ for example::
>> >+
>> >+ -w 80:00.0, pipleline-mode-support=1
>> >+
>> > Driver compilation and testing
>> > ------------------------------
>> >
>> >diff --git a/drivers/net/ice/ice_ethdev.c
>> >b/drivers/net/ice/ice_ethdev.c index 9aa7506ba..4e0645db1 100644
>> >--- a/drivers/net/ice/ice_ethdev.c
>> >+++ b/drivers/net/ice/ice_ethdev.c
>> >@@ -19,9 +19,11 @@
>> >
>> > /* devargs */
>> > #define ICE_SAFE_MODE_SUPPORT_ARG "safe-mode-support"
>> >+#define ICE_PIPELINE_MODE_SUPPORT_ARG "pipeline-mode-support"
>> >
>> > static const char * const ice_valid_args[] = {
>> > ICE_SAFE_MODE_SUPPORT_ARG,
>> >+ ICE_PIPELINE_MODE_SUPPORT_ARG,
>> > NULL
>> > };
>> >
>> >@@ -1510,7 +1512,18 @@ static int ice_parse_devargs(struct
>> >rte_eth_dev
>> >*dev)
>> >
>> > ret = rte_kvargs_process(kvlist, ICE_SAFE_MODE_SUPPORT_ARG,
>> > &parse_bool, &ad-
>> >devargs.safe_mode_support);
>> >+ if (ret)
>> >+ goto err_devargs;
>> >+
>> >+ ret = rte_kvargs_process(kvlist, ICE_PIPELINE_MODE_SUPPORT_ARG,
>> >+ &parse_bool, &ad-
>> >devargs.pipeline_mode_support);
>> >+ if (ret)
>> >+ goto err_devargs;
>> >+
>> >+ rte_kvargs_free(kvlist);
>> >+ return ret;
>> >
>>
>> These 2 lines are duplicated with below code.
>
>Not duplicated, one for normal case, one for error case. If no this two lines, the first argument's return value will be covered by the second one.
I don't get it, they are literally the same thing, it's a normal case or a error case depends on the ret value obtained. What do you mean by "will be covered by the second one"? If the first argument process succeeds, the ret is 0, it will continue to parse the second one, if ret is non-zero, it just goes out by the `goto` statement.
Thanks,
Xiaolong
>
>>
>> >+err_devargs:
>> > rte_kvargs_free(kvlist);
>> > return ret;
>> > }
>> >@@ -3925,7 +3938,8 @@ RTE_PMD_REGISTER_PCI(net_ice, rte_ice_pmd);
>> >RTE_PMD_REGISTER_PCI_TABLE(net_ice, pci_id_ice_map);
>> >RTE_PMD_REGISTER_KMOD_DEP(net_ice, "* igb_uio | uio_pci_generic |
>> >vfio-pci"); RTE_PMD_REGISTER_PARAM_STRING(net_ice,
>> >- ICE_SAFE_MODE_SUPPORT_ARG "=<0|1>");
>> >+ ICE_SAFE_MODE_SUPPORT_ARG "=<0|1>"
>> >+ ICE_PIPELINE_MODE_SUPPORT_ARG "=<0|1>");
>> >
>> > RTE_INIT(ice_init_log)
>> > {
>> >diff --git a/drivers/net/ice/ice_ethdev.h
>> >b/drivers/net/ice/ice_ethdev.h index 926db23d2..9bf5de08d 100644
>> >--- a/drivers/net/ice/ice_ethdev.h
>> >+++ b/drivers/net/ice/ice_ethdev.h
>> >@@ -285,6 +285,7 @@ struct ice_pf {
>> > */
>> > struct ice_devargs {
>> > int safe_mode_support;
>> >+ int pipeline_mode_support;
>> > };
>> >
>> > /**
>> >--
>> >2.15.1
>> >
@@ -61,6 +61,17 @@ Runtime Config Options
NOTE: In Safe mode, only very limited features are available, features like RSS,
checksum, fdir, tunneling ... are all disabled.
+- ``Generic Flow Pipeline Mode Support`` (default ``0``)
+
+ In pipeline mode, a flow can be setted at one specific stage by setting parameter
+ ``priority``. Currently, we support two stages, priority 0 for permission and 1 for
+ distributor. For none-pipeline mode, all flows are assumed to be at the same pipeline
+ stage, priority is ignored. Default, generic flow API is enabled in none pipeline mode,
+ user can choose to use pipeline mode by set ``devargs`` parameter ``pipeline-mode-support``,
+ for example::
+
+ -w 80:00.0, pipleline-mode-support=1
+
Driver compilation and testing
------------------------------
@@ -19,9 +19,11 @@
/* devargs */
#define ICE_SAFE_MODE_SUPPORT_ARG "safe-mode-support"
+#define ICE_PIPELINE_MODE_SUPPORT_ARG "pipeline-mode-support"
static const char * const ice_valid_args[] = {
ICE_SAFE_MODE_SUPPORT_ARG,
+ ICE_PIPELINE_MODE_SUPPORT_ARG,
NULL
};
@@ -1510,7 +1512,18 @@ static int ice_parse_devargs(struct rte_eth_dev *dev)
ret = rte_kvargs_process(kvlist, ICE_SAFE_MODE_SUPPORT_ARG,
&parse_bool, &ad->devargs.safe_mode_support);
+ if (ret)
+ goto err_devargs;
+
+ ret = rte_kvargs_process(kvlist, ICE_PIPELINE_MODE_SUPPORT_ARG,
+ &parse_bool, &ad->devargs.pipeline_mode_support);
+ if (ret)
+ goto err_devargs;
+
+ rte_kvargs_free(kvlist);
+ return ret;
+err_devargs:
rte_kvargs_free(kvlist);
return ret;
}
@@ -3925,7 +3938,8 @@ RTE_PMD_REGISTER_PCI(net_ice, rte_ice_pmd);
RTE_PMD_REGISTER_PCI_TABLE(net_ice, pci_id_ice_map);
RTE_PMD_REGISTER_KMOD_DEP(net_ice, "* igb_uio | uio_pci_generic | vfio-pci");
RTE_PMD_REGISTER_PARAM_STRING(net_ice,
- ICE_SAFE_MODE_SUPPORT_ARG "=<0|1>");
+ ICE_SAFE_MODE_SUPPORT_ARG "=<0|1>"
+ ICE_PIPELINE_MODE_SUPPORT_ARG "=<0|1>");
RTE_INIT(ice_init_log)
{
@@ -285,6 +285,7 @@ struct ice_pf {
*/
struct ice_devargs {
int safe_mode_support;
+ int pipeline_mode_support;
};
/**