diff mbox series

[19/44] event/octeontx2: add worker dual GWS enqueue functions

Message ID 20190601185355.370-20-pbhagavatula@marvell.com (mailing list archive)
State Superseded, archived
Delegated to: Jerin Jacob
Headers show
Series OCTEON TX2 event device driver | expand

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation fail Compilation issues

Commit Message

Pavan Nikhilesh Bhagavatula June 1, 2019, 6:53 p.m. UTC
From: Pavan Nikhilesh <pbhagavatula@marvell.com>

Add dual workslot mode event enqueue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
---
 drivers/event/octeontx2/otx2_evdev.h       |   9 ++
 drivers/event/octeontx2/otx2_worker_dual.c | 135 +++++++++++++++++++++
 2 files changed, 144 insertions(+)
diff mbox series

Patch

diff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h
index ef46a0482..fdcac527f 100644
--- a/drivers/event/octeontx2/otx2_evdev.h
+++ b/drivers/event/octeontx2/otx2_evdev.h
@@ -172,6 +172,7 @@  parse_kvargs_value(const char *key, const char *value, void *opaque)
 	return 0;
 }
 
+/* Single WS API's */
 uint16_t otx2_ssogws_enq(void *port, const struct rte_event *ev);
 uint16_t otx2_ssogws_enq_burst(void *port, const struct rte_event ev[],
 			       uint16_t nb_events);
@@ -189,6 +190,14 @@  uint16_t otx2_ssogws_deq_timeout(void *port, struct rte_event *ev,
 uint16_t otx2_ssogws_deq_timeout_burst(void *port, struct rte_event ev[],
 				       uint16_t nb_events,
 				       uint64_t timeout_ticks);
+/* Dual WS API's */
+uint16_t otx2_ssogws_dual_enq(void *port, const struct rte_event *ev);
+uint16_t otx2_ssogws_dual_enq_burst(void *port, const struct rte_event ev[],
+				    uint16_t nb_events);
+uint16_t otx2_ssogws_dual_enq_new_burst(void *port, const struct rte_event ev[],
+					uint16_t nb_events);
+uint16_t otx2_ssogws_dual_enq_fwd_burst(void *port, const struct rte_event ev[],
+					uint16_t nb_events);
 
 /* Init and Fini API's */
 int otx2_sso_init(struct rte_eventdev *event_dev);
diff --git a/drivers/event/octeontx2/otx2_worker_dual.c b/drivers/event/octeontx2/otx2_worker_dual.c
index f762436aa..661c78c23 100644
--- a/drivers/event/octeontx2/otx2_worker_dual.c
+++ b/drivers/event/octeontx2/otx2_worker_dual.c
@@ -4,3 +4,138 @@ 
 
 #include "otx2_worker_dual.h"
 #include "otx2_worker.h"
+
+static __rte_noinline uint8_t
+otx2_ssogws_dual_new_event(struct otx2_ssogws_dual *ws,
+			   const struct rte_event *ev)
+{
+	const uint32_t tag = (uint32_t)ev->event;
+	const uint8_t new_tt = ev->sched_type;
+	const uint64_t event_ptr = ev->u64;
+	const uint16_t grp = ev->queue_id;
+
+	if (ws->xaq_lmt <= *ws->fc_mem)
+		return 0;
+
+	otx2_ssogws_dual_add_work(ws, event_ptr, tag, new_tt, grp);
+
+	return 1;
+}
+
+static __rte_always_inline void
+otx2_ssogws_dual_fwd_swtag(struct otx2_ssogws_state *ws,
+			   const struct rte_event *ev)
+{
+	const uint32_t tag = (uint32_t)ev->event;
+	const uint8_t new_tt = ev->sched_type;
+	const uint8_t cur_tt = ws->cur_tt;
+
+	/* 96XX model
+	 * cur_tt/new_tt     SSO_SYNC_ORDERED SSO_SYNC_ATOMIC SSO_SYNC_UNTAGGED
+	 *
+	 * SSO_SYNC_ORDERED        norm           norm             untag
+	 * SSO_SYNC_ATOMIC         norm           norm		   untag
+	 * SSO_SYNC_UNTAGGED       norm           norm             NOOP
+	 */
+	if (new_tt == SSO_SYNC_UNTAGGED) {
+		if (cur_tt != SSO_SYNC_UNTAGGED)
+			otx2_ssogws_swtag_untag((struct otx2_ssogws *)ws);
+	} else {
+		otx2_ssogws_swtag_norm((struct otx2_ssogws *)ws, tag, new_tt);
+	}
+}
+
+static __rte_always_inline void
+otx2_ssogws_dual_fwd_group(struct otx2_ssogws_state *ws,
+			   const struct rte_event *ev, const uint16_t grp)
+{
+	const uint32_t tag = (uint32_t)ev->event;
+	const uint8_t new_tt = ev->sched_type;
+
+	otx2_write64(ev->u64, OTX2_SSOW_GET_BASE_ADDR(ws->getwrk_op) +
+		     SSOW_LF_GWS_OP_UPD_WQP_GRP1);
+	rte_smp_wmb();
+	otx2_ssogws_swtag_desched((struct otx2_ssogws *)ws, tag, new_tt, grp);
+}
+
+static __rte_always_inline void
+otx2_ssogws_dual_forward_event(struct otx2_ssogws_dual *ws,
+			       struct otx2_ssogws_state *vws,
+			       const struct rte_event *ev)
+{
+	const uint8_t grp = ev->queue_id;
+
+	/* Group hasn't changed, Use SWTAG to forward the event */
+	if (vws->cur_grp == grp) {
+		otx2_ssogws_dual_fwd_swtag(vws, ev);
+		ws->swtag_req = 1;
+	} else {
+	/*
+	 * Group has been changed for group based work pipelining,
+	 * Use deschedule/add_work operation to transfer the event to
+	 * new group/core
+	 */
+		otx2_ssogws_dual_fwd_group(vws, ev, grp);
+	}
+}
+
+uint16_t __hot
+otx2_ssogws_dual_enq(void *port, const struct rte_event *ev)
+{
+	struct otx2_ssogws_dual *ws = port;
+	struct otx2_ssogws_state *vws = &ws->ws_state[!ws->vws];
+
+	switch (ev->op) {
+	case RTE_EVENT_OP_NEW:
+		rte_smp_mb();
+		return otx2_ssogws_dual_new_event(ws, ev);
+	case RTE_EVENT_OP_FORWARD:
+		otx2_ssogws_dual_forward_event(ws, vws, ev);
+		break;
+	case RTE_EVENT_OP_RELEASE:
+		otx2_ssogws_swtag_flush((struct otx2_ssogws *)vws);
+		break;
+	default:
+		return 0;
+	}
+
+	return 1;
+}
+
+uint16_t __hot
+otx2_ssogws_dual_enq_burst(void *port, const struct rte_event ev[],
+			   uint16_t nb_events)
+{
+	RTE_SET_USED(nb_events);
+	return otx2_ssogws_dual_enq(port, ev);
+}
+
+uint16_t __hot
+otx2_ssogws_dual_enq_new_burst(void *port, const struct rte_event ev[],
+			       uint16_t nb_events)
+{
+	struct otx2_ssogws_dual *ws = port;
+	uint16_t i, rc = 1;
+
+	rte_smp_mb();
+	if (ws->xaq_lmt <= *ws->fc_mem)
+		return 0;
+
+	for (i = 0; i < nb_events && rc; i++)
+		rc = otx2_ssogws_dual_new_event(ws, &ev[i]);
+
+	return nb_events;
+}
+
+uint16_t __hot
+otx2_ssogws_dual_enq_fwd_burst(void *port, const struct rte_event ev[],
+			       uint16_t nb_events)
+{
+	struct otx2_ssogws_dual *ws = port;
+	struct otx2_ssogws_state *vws = &ws->ws_state[!ws->vws];
+
+	RTE_SET_USED(nb_events);
+	otx2_ssogws_dual_forward_event(ws, vws, ev);
+
+	return 1;
+}