From patchwork Wed Mar 27 09:00:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaolong Ye X-Patchwork-Id: 51766 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C4A6B568A; Wed, 27 Mar 2019 10:05:14 +0100 (CET) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id CF0E1326D for ; Wed, 27 Mar 2019 10:05:06 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Mar 2019 02:05:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,276,1549958400"; d="scan'208";a="130554268" Received: from yexl-server.sh.intel.com ([10.67.110.206]) by orsmga006.jf.intel.com with ESMTP; 27 Mar 2019 02:05:04 -0700 From: Xiaolong Ye To: dev@dpdk.org, David Marchand , Andrew Rybchenko Cc: Qi Zhang , Karlsson Magnus , Topel Bjorn , Maxime Coquelin , Stephen Hemminger , Ferruh Yigit , Luca Boccassi , Bruce Richardson , Ananyev Konstantin , Xiaolong Ye Date: Wed, 27 Mar 2019 17:00:25 +0800 Message-Id: <20190327090027.72170-4-xiaolong.ye@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190327090027.72170-1-xiaolong.ye@intel.com> References: <20190301080947.91086-1-xiaolong.ye@intel.com> <20190327090027.72170-1-xiaolong.ye@intel.com> Subject: [dpdk-dev] [PATCH v7 3/5] lib/mempool: allow page size aligned mempool X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Allow create a mempool with page size aligned base address. Signed-off-by: Qi Zhang Signed-off-by: Xiaolong Ye --- lib/librte_mempool/rte_mempool.c | 3 +++ lib/librte_mempool/rte_mempool.h | 1 + 2 files changed, 4 insertions(+) diff --git a/lib/librte_mempool/rte_mempool.c b/lib/librte_mempool/rte_mempool.c index 683b216f9..cfbb49ea5 100644 --- a/lib/librte_mempool/rte_mempool.c +++ b/lib/librte_mempool/rte_mempool.c @@ -543,6 +543,9 @@ rte_mempool_populate_default(struct rte_mempool *mp) if (try_contig) flags |= RTE_MEMZONE_IOVA_CONTIG; + if (mp->flags & MEMPOOL_CHUNK_F_PAGE_ALIGN) + align = RTE_MAX(align, (size_t)getpagesize()); + mz = rte_memzone_reserve_aligned(mz_name, mem_size, mp->socket_id, flags, align); diff --git a/lib/librte_mempool/rte_mempool.h b/lib/librte_mempool/rte_mempool.h index 7c9cd9a2f..47729f7c9 100644 --- a/lib/librte_mempool/rte_mempool.h +++ b/lib/librte_mempool/rte_mempool.h @@ -264,6 +264,7 @@ struct rte_mempool { #define MEMPOOL_F_POOL_CREATED 0x0010 /**< Internal: pool is created. */ #define MEMPOOL_F_NO_IOVA_CONTIG 0x0020 /**< Don't need IOVA contiguous objs. */ #define MEMPOOL_F_NO_PHYS_CONTIG MEMPOOL_F_NO_IOVA_CONTIG /* deprecated */ +#define MEMPOOL_CHUNK_F_PAGE_ALIGN 0x0040 /**< Chunk's base address is page aligned */ /** * @internal When debug is enabled, store some statistics.