From patchwork Tue Jan 15 12:56:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 49834 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8EC226CC1; Tue, 15 Jan 2019 13:55:40 +0100 (CET) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id 7BCA15F24 for ; Tue, 15 Jan 2019 13:55:37 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 15 Jan 2019 04:55:37 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,481,1539673200"; d="scan'208";a="127889477" Received: from dpdk51.sh.intel.com ([10.67.110.190]) by orsmga001.jf.intel.com with ESMTP; 15 Jan 2019 04:55:35 -0800 From: Qi Zhang To: wenzhuo.lu@intel.com, qiming.yang@intel.com Cc: paul.m.stillwell.jr@intel.com, dev@dpdk.org, bruce.richardson@intel.com, ferruh.yigit@intel.com, Qi Zhang Date: Tue, 15 Jan 2019 20:56:55 +0800 Message-Id: <20190115125658.15421-5-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20190115125658.15421-1-qi.z.zhang@intel.com> References: <20190115125658.15421-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH 4/7] net/ice/base: add some help macros X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Signed-off-by: Qi Zhang Signed-off-by: Paul M Stillwell Jr --- drivers/net/ice/base/ice_common.h | 10 ++++++++++ drivers/net/ice/base/ice_osdep.h | 2 ++ 2 files changed, 12 insertions(+) diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h index 45d93eb64..67539ccb7 100644 --- a/drivers/net/ice/base/ice_common.h +++ b/drivers/net/ice/base/ice_common.h @@ -51,6 +51,16 @@ void ice_clear_pxe_mode(struct ice_hw *hw); enum ice_status ice_get_caps(struct ice_hw *hw); +/* Define a macro that will align a pointer to point to the next memory address + * that falls on the given power of 2 (i.e., 2, 4, 8, 16, 32, 64...). For + * example, given the variable pointer = 0x1006, then after the following call: + * + * pointer = ICE_ALIGN(pointer, 4) + * + * ... the value of pointer would equal 0x1008, since 0x1008 is the next + * address after 0x1006 which is divisible by 4. + */ +#define ICE_ALIGN(ptr, align) (((ptr) + ((align) - 1)) & ~((align) - 1)) enum ice_status diff --git a/drivers/net/ice/base/ice_osdep.h b/drivers/net/ice/base/ice_osdep.h index a3351c034..252c8f4e7 100644 --- a/drivers/net/ice/base/ice_osdep.h +++ b/drivers/net/ice/base/ice_osdep.h @@ -457,6 +457,8 @@ LIST_HEAD(ice_list_head, ice_list_entry); /*Note parameters are swapped*/ #define LIST_FIRST_ENTRY(head, type, field) (type *)((head)->lh_first) +#define LIST_NEXT_ENTRY(entry, type, field) \ + ((type *)(entry)->field.next.le_next) #define LIST_ADD(entry, list_head) LIST_INSERT_HEAD(list_head, entry, next) #define LIST_ADD_AFTER(entry, list_entry) \ LIST_INSERT_AFTER(list_entry, entry, next)