net/mlx5: fix artificial L4 limitation on switch flow rules

Message ID 20180806142454.31907-1-adrien.mazarguil@6wind.com (mailing list archive)
State Accepted, archived
Delegated to: Shahaf Shuler
Headers
Series net/mlx5: fix artificial L4 limitation on switch flow rules |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Adrien Mazarguil Aug. 6, 2018, 2:25 p.m. UTC
  Partial bit-masks are in fact supported on TCP/UDP source/destination
ports. Remove unnecessary check.

Fixes: 2bfc777e07 ("net/mlx5: add L2-L4 pattern items to switch flow rules")

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
---
 drivers/net/mlx5/mlx5_nl_flow.c | 20 --------------------
 1 file changed, 20 deletions(-)
  

Comments

Shahaf Shuler Aug. 15, 2018, 7:30 a.m. UTC | #1
Monday, August 6, 2018 5:26 PM, Adrien Mazarguil:
> Subject: [PATCH] net/mlx5: fix artificial L4 limitation on switch flow rules
> 
> Partial bit-masks are in fact supported on TCP/UDP source/destination ports.
> Remove unnecessary check.
> 
> Fixes: 2bfc777e07 ("net/mlx5: add L2-L4 pattern items to switch flow rules")
> 
> Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>

Applied to next-net-mlx, thanks.
  

Patch

diff --git a/drivers/net/mlx5/mlx5_nl_flow.c b/drivers/net/mlx5/mlx5_nl_flow.c
index a1c8c340b..beb03c911 100644
--- a/drivers/net/mlx5/mlx5_nl_flow.c
+++ b/drivers/net/mlx5/mlx5_nl_flow.c
@@ -800,16 +800,6 @@  mlx5_nl_flow_transpose(void *buf,
 		}
 		spec.tcp = item->spec;
 		if ((mask.tcp->hdr.src_port &&
-		     mask.tcp->hdr.src_port != RTE_BE16(0xffff)) ||
-		    (mask.tcp->hdr.dst_port &&
-		     mask.tcp->hdr.dst_port != RTE_BE16(0xffff)))
-			return rte_flow_error_set
-				(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM_MASK,
-				 mask.tcp,
-				 "no support for partial masks on"
-				 " \"hdr.src_port\" and \"hdr.dst_port\""
-				 " fields");
-		if ((mask.tcp->hdr.src_port &&
 		     (!mnl_attr_put_u16_check(buf, size,
 					      TCA_FLOWER_KEY_TCP_SRC,
 					      spec.tcp->hdr.src_port) ||
@@ -847,16 +837,6 @@  mlx5_nl_flow_transpose(void *buf,
 		}
 		spec.udp = item->spec;
 		if ((mask.udp->hdr.src_port &&
-		     mask.udp->hdr.src_port != RTE_BE16(0xffff)) ||
-		    (mask.udp->hdr.dst_port &&
-		     mask.udp->hdr.dst_port != RTE_BE16(0xffff)))
-			return rte_flow_error_set
-				(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM_MASK,
-				 mask.udp,
-				 "no support for partial masks on"
-				 " \"hdr.src_port\" and \"hdr.dst_port\""
-				 " fields");
-		if ((mask.udp->hdr.src_port &&
 		     (!mnl_attr_put_u16_check(buf, size,
 					      TCA_FLOWER_KEY_UDP_SRC,
 					      spec.udp->hdr.src_port) ||