From patchwork Thu Jun 28 03:19:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "John Daley (johndale)" X-Patchwork-Id: 41775 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5303F1B14D; Thu, 28 Jun 2018 05:21:33 +0200 (CEST) Received: from rcdn-iport-8.cisco.com (rcdn-iport-8.cisco.com [173.37.86.79]) by dpdk.org (Postfix) with ESMTP id B53D51B063 for ; Thu, 28 Jun 2018 05:21:31 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=cisco.com; i=@cisco.com; l=4937; q=dns/txt; s=iport; t=1530156091; x=1531365691; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=B6TSHFee0yWICotquYuuFUS08GgLeqFaXpWQe91stao=; b=WwRUVD5W/ZghCzO99iZdFFJ0XFB1Olg5IWt847hvilHpyEW4tYNq6XoN PGOYDa/zCDUM31zPfOk0XfTZP5z5QpSIvonwqa13RF+E8rmsDcMtmaMUI v3FJWmKtKMd6aCekIDLAVxZt7X/7iCeXzFxROH72fl+puvwfGITX6o1pS M=; X-IronPort-AV: E=Sophos;i="5.51,281,1526342400"; d="scan'208";a="414337695" Received: from alln-core-12.cisco.com ([173.36.13.134]) by rcdn-iport-8.cisco.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Jun 2018 03:21:30 +0000 Received: from cisco.com (savbu-usnic-a.cisco.com [10.193.184.48]) by alln-core-12.cisco.com (8.14.5/8.14.5) with ESMTP id w5S3LUm7017422; Thu, 28 Jun 2018 03:21:30 GMT Received: by cisco.com (Postfix, from userid 392789) id 8FA4420F2001; Wed, 27 Jun 2018 20:21:30 -0700 (PDT) From: John Daley To: ferruh.yigit@intel.com Cc: dev@dpdk.org, Hyong Youb Kim Date: Wed, 27 Jun 2018 20:19:31 -0700 Message-Id: <20180628031940.17397-5-johndale@cisco.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180628031940.17397-1-johndale@cisco.com> References: <20180628031940.17397-1-johndale@cisco.com> Subject: [dpdk-dev] [PATCH 05/14] net/enic: report ring limits and preferred default values X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Hyong Youb Kim Report min/max ring sizes, alignments, and so on, and rely on the common checks implemented in the rte_ethdev layer. Signed-off-by: Hyong Youb Kim Reviewed-by: John Daley --- drivers/net/enic/enic_ethdev.c | 24 ++++++++++++++++++++++++ drivers/net/enic/enic_main.c | 24 ++++++++---------------- drivers/net/enic/enic_res.h | 12 ++++++++++++ 3 files changed, 44 insertions(+), 16 deletions(-) diff --git a/drivers/net/enic/enic_ethdev.c b/drivers/net/enic/enic_ethdev.c index 6ebad8d96..697dd6508 100644 --- a/drivers/net/enic/enic_ethdev.c +++ b/drivers/net/enic/enic_ethdev.c @@ -482,6 +482,30 @@ static void enicpmd_dev_info_get(struct rte_eth_dev *eth_dev, device_info->reta_size = enic->reta_size; device_info->hash_key_size = enic->hash_key_size; device_info->flow_type_rss_offloads = enic->flow_type_rss_offloads; + device_info->rx_desc_lim = (struct rte_eth_desc_lim) { + .nb_max = enic->config.rq_desc_count, + .nb_min = ENIC_MIN_RQ_DESCS, + .nb_align = ENIC_ALIGN_DESCS, + }; + device_info->tx_desc_lim = (struct rte_eth_desc_lim) { + .nb_max = enic->config.wq_desc_count, + .nb_min = ENIC_MIN_WQ_DESCS, + .nb_align = ENIC_ALIGN_DESCS, + .nb_seg_max = ENIC_TX_XMIT_MAX, + .nb_mtu_seg_max = ENIC_NON_TSO_MAX_DESC, + }; + device_info->default_rxportconf = (struct rte_eth_dev_portconf) { + .burst_size = ENIC_DEFAULT_RX_BURST, + .ring_size = RTE_MIN(device_info->rx_desc_lim.nb_max, + ENIC_DEFAULT_RX_RING_SIZE), + .nb_queues = ENIC_DEFAULT_RX_RINGS, + }; + device_info->default_txportconf = (struct rte_eth_dev_portconf) { + .burst_size = ENIC_DEFAULT_TX_BURST, + .ring_size = RTE_MIN(device_info->tx_desc_lim.nb_max, + ENIC_DEFAULT_TX_RING_SIZE), + .nb_queues = ENIC_DEFAULT_TX_RINGS, + }; } static const uint32_t *enicpmd_dev_supported_ptypes_get(struct rte_eth_dev *dev) diff --git a/drivers/net/enic/enic_main.c b/drivers/net/enic/enic_main.c index 863d2463c..2cd85168d 100644 --- a/drivers/net/enic/enic_main.c +++ b/drivers/net/enic/enic_main.c @@ -743,8 +743,8 @@ int enic_alloc_rq(struct enic *enic, uint16_t queue_idx, } /* number of descriptors have to be a multiple of 32 */ - nb_sop_desc = (nb_desc / mbufs_per_pkt) & ~0x1F; - nb_data_desc = (nb_desc - nb_sop_desc) & ~0x1F; + nb_sop_desc = (nb_desc / mbufs_per_pkt) & ENIC_ALIGN_DESCS_MASK; + nb_data_desc = (nb_desc - nb_sop_desc) & ENIC_ALIGN_DESCS_MASK; rq_sop->max_mbufs_per_pkt = mbufs_per_pkt; rq_data->max_mbufs_per_pkt = mbufs_per_pkt; @@ -752,7 +752,7 @@ int enic_alloc_rq(struct enic *enic, uint16_t queue_idx, if (mbufs_per_pkt > 1) { min_sop = 64; max_sop = ((enic->config.rq_desc_count / - (mbufs_per_pkt - 1)) & ~0x1F); + (mbufs_per_pkt - 1)) & ENIC_ALIGN_DESCS_MASK); min_data = min_sop * (mbufs_per_pkt - 1); max_data = enic->config.rq_desc_count; } else { @@ -870,19 +870,11 @@ int enic_alloc_wq(struct enic *enic, uint16_t queue_idx, static int instance; wq->socket_id = socket_id; - if (nb_desc > enic->config.wq_desc_count) { - dev_warning(enic, - "WQ %d - number of tx desc in cmd line (%d) " - "is greater than that in the UCSM/CIMC adapter " - "policy. Applying the value in the adapter " - "policy (%d)\n", - queue_idx, nb_desc, enic->config.wq_desc_count); - nb_desc = enic->config.wq_desc_count; - } else if (nb_desc != enic->config.wq_desc_count) { - dev_info(enic, - "TX Queues - effective number of descs:%d\n", - nb_desc); - } + /* + * rte_eth_tx_queue_setup() checks min, max, and alignment. So just + * print an info message for diagnostics. + */ + dev_info(enic, "TX Queues - effective number of descs:%d\n", nb_desc); /* Allocate queue resources */ err = vnic_wq_alloc(enic->vdev, &enic->wq[queue_idx], queue_idx, diff --git a/drivers/net/enic/enic_res.h b/drivers/net/enic/enic_res.h index e68f1307b..6a3a0c5cc 100644 --- a/drivers/net/enic/enic_res.h +++ b/drivers/net/enic/enic_res.h @@ -16,6 +16,10 @@ #define ENIC_MIN_RQ_DESCS 64 #define ENIC_MAX_RQ_DESCS 4096 +/* A descriptor ring has a multiple of 32 descriptors */ +#define ENIC_ALIGN_DESCS 32 +#define ENIC_ALIGN_DESCS_MASK ~(ENIC_ALIGN_DESCS - 1) + #define ENIC_MIN_MTU 68 /* Does not include (possible) inserted VLAN tag and FCS */ @@ -31,6 +35,14 @@ #define ENIC_DEFAULT_RX_FREE_THRESH 32 #define ENIC_TX_XMIT_MAX 64 +/* Defaults for dev_info.default_{rx,tx}portconf */ +#define ENIC_DEFAULT_RX_BURST 32 +#define ENIC_DEFAULT_RX_RINGS 1 +#define ENIC_DEFAULT_RX_RING_SIZE 512 +#define ENIC_DEFAULT_TX_BURST 32 +#define ENIC_DEFAULT_TX_RINGS 1 +#define ENIC_DEFAULT_TX_RING_SIZE 512 + #define ENIC_RSS_DEFAULT_CPU 0 #define ENIC_RSS_BASE_CPU 0 #define ENIC_RSS_HASH_BITS 7