From patchwork Mon Jun 4 12:09:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Krawczyk X-Patchwork-Id: 40617 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id CCBA36CBB; Mon, 4 Jun 2018 14:10:11 +0200 (CEST) Received: from mail-lf0-f65.google.com (mail-lf0-f65.google.com [209.85.215.65]) by dpdk.org (Postfix) with ESMTP id 45B846CA3 for ; Mon, 4 Jun 2018 14:10:07 +0200 (CEST) Received: by mail-lf0-f65.google.com with SMTP id n15-v6so7519968lfn.10 for ; Mon, 04 Jun 2018 05:10:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SFKy5K9SN8ejREiLgjpRRE7TI7rA7HfheNI8U5kv/kk=; b=UXxMFwK51WmgCOxU/CMr+6VboKAJDk8LslHg8JaqNh+KIR7EkfAiIctj+NCkDE3ScV qHUQX5TZpQ9OpCKGoiXGsy3CzHDZM4Z8DYvfVocSdPY2y3NJfsgkCiLc15CAvbdS5qa7 AoHUUtOIwlfji1pZ7NnZXP8iR+ThnJB6PGIRNWhJZ/0i4B9FFEHwepLlKu2+6xv6yVg0 7dPZHG/KPEfw10YzyRgmPjeB5u5OvKXQUiAupHCvSiAVIq4Swsru3NfeMhEu23kyyuqv SCrM7UOpuTym+2TlT5iyktjlmbhxGf4wgZIgZlotPP35cb4wAZwxVVCdv58rNvCDwRA1 RXaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SFKy5K9SN8ejREiLgjpRRE7TI7rA7HfheNI8U5kv/kk=; b=poKkixFu+7SL1kWlbumxQRb5SNuA9BDEZcj3cxKCn4l1iIszv0eSrr7FqqKigmze3S HOAk9CIvEkCHY4GcFs9vvbsxPGr5KW1JH5HeDjZMpI+aUBP6O0UmL5wlmElyHW/vBbvN KVM1vhtDzVS1Or8QSS086vEM1JucrgqGn0BPDvQjUeGm5/Uxcb+sGUIF+yfaZ4WAzwig bFSfzizdrU+nY5FXe/D+z6J3We+YXWm+EhWILiLnmWCrRndnt8mc4lKbidWkAM/ugPhC jPcTMZ7deC3J98wxwBFTKS5c44jDyfr4ToGI4COEAxLQ+WQUfujrNWAjzsslUv69KFa/ m87w== X-Gm-Message-State: APt69E2LqnmlXFN6djS4YefDBZAd98DVI58PfOklx7tJzpoAVhxV9ghG 8kfiJcG1TSP8aQyTfgNmafgZ6Q== X-Google-Smtp-Source: ADUXVKJtCJ8c/lMdqQ9W/TfXP6C+I9N9YhVrSK6L8sSNTtz5U7pm8uj1QLZgYi1ljh6tEyKWrkrncg== X-Received: by 2002:a19:c004:: with SMTP id q4-v6mr5255940lff.16.1528114206963; Mon, 04 Jun 2018 05:10:06 -0700 (PDT) Received: from mkPC.semihalf.local (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id g23-v6sm3817415lfi.49.2018.06.04.05.10.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Jun 2018 05:10:06 -0700 (PDT) From: Michal Krawczyk To: Marcin Wojtas , Michal Krawczyk , Guy Tzalik , Evgeny Schemeilin Cc: dev@dpdk.org, matua@amazon.com, Rafal Kozik Date: Mon, 4 Jun 2018 14:09:43 +0200 Message-Id: <20180604120955.17319-6-mk@semihalf.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180604120955.17319-1-mk@semihalf.com> References: <20180604120955.17319-1-mk@semihalf.com> Subject: [dpdk-dev] [PATCH v2 15/26] net/ena: add info about max number of Tx/Rx descriptors X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Rafal Kozik In function ena_infos_get driver provides information about minimal and maximal number of Rx and Tx descriptors. Signed-off-by: Rafal Kozik Acked-by: Michal Krawczyk --- drivers/net/ena/ena_ethdev.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c index 4178f9132..3e3ae69bb 100644 --- a/drivers/net/ena/ena_ethdev.c +++ b/drivers/net/ena/ena_ethdev.c @@ -85,6 +85,9 @@ #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) +#define ENA_MAX_RING_DESC ENA_DEFAULT_RING_SIZE +#define ENA_MIN_RING_DESC 128 + enum ethtool_stringset { ETH_SS_TEST = 0, ETH_SS_STATS, @@ -1740,6 +1743,16 @@ static void ena_infos_get(struct rte_eth_dev *dev, adapter->tx_supported_offloads = tx_feat; adapter->rx_supported_offloads = rx_feat; + + dev_info->rx_desc_lim.nb_max = ENA_MAX_RING_DESC; + dev_info->rx_desc_lim.nb_min = ENA_MIN_RING_DESC; + + dev_info->tx_desc_lim.nb_max = ENA_MAX_RING_DESC; + dev_info->tx_desc_lim.nb_min = ENA_MIN_RING_DESC; + dev_info->tx_desc_lim.nb_seg_max = RTE_MIN(ENA_PKT_MAX_BUFS, + feat.max_queues.max_packet_tx_descs); + dev_info->tx_desc_lim.nb_mtu_seg_max = RTE_MIN(ENA_PKT_MAX_BUFS, + feat.max_queues.max_packet_tx_descs); } static uint16_t eth_ena_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,