[dpdk-dev,v2] crypto/dpaa2_sec: remove iova conversion for fle address

Message ID 20180509124324.22258-1-shreyansh.jain@nxp.com (mailing list archive)
State Accepted, archived
Delegated to: Pablo de Lara Guarch
Headers

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Shreyansh Jain May 9, 2018, 12:43 p.m. UTC
  From: Hemant Agrawal <hemant.agrawal@nxp.com>

fle is already in virtual addressing mode - no need to perform
address conversion for it.

Fixes: 8d1f3a5d751b ("crypto/dpaa2_sec: support crypto operation")
Cc: akhil.goyal@nxp.com
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
---
v2:
 - fix 32 bit compilation issue

 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h     | 2 +-
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 3 +--
 2 files changed, 2 insertions(+), 3 deletions(-)
  

Comments

De Lara Guarch, Pablo May 9, 2018, 2:35 p.m. UTC | #1
> -----Original Message-----
> From: Shreyansh Jain [mailto:shreyansh.jain@nxp.com]
> Sent: Wednesday, May 9, 2018 1:43 PM
> To: De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>
> Cc: dev@dpdk.org; akhil.goyal@nxp.com; stable@dpdk.org;
> hemant.agrawal@nxp.com
> Subject: [PATCH v2] crypto/dpaa2_sec: remove iova conversion for fle address
> 
> From: Hemant Agrawal <hemant.agrawal@nxp.com>
> 
> fle is already in virtual addressing mode - no need to perform address conversion
> for it.
> 
> Fixes: 8d1f3a5d751b ("crypto/dpaa2_sec: support crypto operation")
> Cc: akhil.goyal@nxp.com
> Cc: stable@dpdk.org
> 
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>

Applied to dpdk-next-crypto.
Thanks,

Pablo
  

Patch

diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index b09218f27..820759360 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -199,7 +199,7 @@  enum qbman_fd_format {
 } while (0)
 #define DPAA2_SET_FLE_INTERNAL_JD(fle, len) ((fle)->frc = (0x80000000 | (len)))
 #define DPAA2_GET_FLE_ADDR(fle)					\
-	(uint64_t)((((uint64_t)((fle)->addr_hi)) << 32) + (fle)->addr_lo)
+	(size_t)((((uint64_t)((fle)->addr_hi)) << 32) + (fle)->addr_lo)
 #define DPAA2_SET_FLE_ADDR(fle, addr) do { \
 	(fle)->addr_lo = lower_32_bits((size_t)addr);		\
 	(fle)->addr_hi = upper_32_bits((uint64_t)addr);		\
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 58cbce868..56fa969d3 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -1261,8 +1261,7 @@  sec_fd_to_mbuf(const struct qbman_fd *fd, uint8_t driver_id)
 		DPAA2_SEC_ERR("error: non inline buffer");
 		return NULL;
 	}
-	op = (struct rte_crypto_op *)DPAA2_IOVA_TO_VADDR(
-			DPAA2_GET_FLE_ADDR((fle - 1)));
+	op = (struct rte_crypto_op *)DPAA2_GET_FLE_ADDR((fle - 1));
 
 	/* Prefeth op */
 	src = op->sym->m_src;