From patchwork Fri Apr 13 11:20:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xueming Li X-Patchwork-Id: 38002 X-Patchwork-Delegate: shahafs@mellanox.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 3F8681C078; Fri, 13 Apr 2018 13:20:39 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id C36801C074 for ; Fri, 13 Apr 2018 13:20:37 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from xuemingl@mellanox.com) with ESMTPS (AES256-SHA encrypted); 13 Apr 2018 14:21:46 +0300 Received: from dev-r630-06.mtbc.labs.mlnx (dev-r630-06.mtbc.labs.mlnx [10.12.205.180]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id w3DBKWHB017055; Fri, 13 Apr 2018 14:20:33 +0300 Received: from dev-r630-06.mtbc.labs.mlnx (localhost [127.0.0.1]) by dev-r630-06.mtbc.labs.mlnx (8.14.7/8.14.7) with ESMTP id w3DBKWgb106487; Fri, 13 Apr 2018 19:20:32 +0800 Received: (from xuemingl@localhost) by dev-r630-06.mtbc.labs.mlnx (8.14.7/8.14.7/Submit) id w3DBKWJI106486; Fri, 13 Apr 2018 19:20:32 +0800 From: Xueming Li To: Nelio Laranjeiro , Shahaf Shuler Cc: Xueming Li , dev@dpdk.org Date: Fri, 13 Apr 2018 19:20:12 +0800 Message-Id: <20180413112023.106420-4-xuemingl@mellanox.com> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20180413112023.106420-1-xuemingl@mellanox.com> References: <20180413112023.106420-1-xuemingl@mellanox.com> In-Reply-To: <20180410133415.189905-1-xuemingl%40mellanox.com> References: <20180410133415.189905-1-xuemingl%40mellanox.com> Subject: [dpdk-dev] [PATCH v3 03/14] net/mlx5: support L3 VXLAN flow X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch support L3 VXLAN, no inner L2 header comparing to standard VXLAN protocol. L3 VXLAN using specific overlay UDP destination port to discriminate against standard VXLAN, FW has to be configured to support it: sudo mlxconfig -d -y s IP_OVER_VXLAN_EN=1 sudo mlxconfig -d -y s IP_OVER_VXLAN_PORT= Signed-off-by: Xueming Li --- drivers/net/mlx5/mlx5_flow.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index 2aae988f2..644f26a95 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -413,7 +413,9 @@ static const struct mlx5_flow_items mlx5_flow_items[] = { .dst_sz = sizeof(struct ibv_flow_spec_tunnel), }, [RTE_FLOW_ITEM_TYPE_VXLAN] = { - .items = ITEMS(RTE_FLOW_ITEM_TYPE_ETH), + .items = ITEMS(RTE_FLOW_ITEM_TYPE_ETH, + RTE_FLOW_ITEM_TYPE_IPV4, /* L3 VXLAN. */ + RTE_FLOW_ITEM_TYPE_IPV6), /* L3 VXLAN. */ .actions = valid_actions, .mask = &(const struct rte_flow_item_vxlan){ .vni = "\xff\xff\xff",