From patchwork Wed Feb 7 01:16:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajit Khaparde X-Patchwork-Id: 35036 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BBBD21B74F; Wed, 7 Feb 2018 02:16:30 +0100 (CET) Received: from rnd-relay.smtp.broadcom.com (rnd-relay.smtp.broadcom.com [192.19.229.170]) by dpdk.org (Postfix) with ESMTP id 846C11B730; Wed, 7 Feb 2018 02:16:27 +0100 (CET) Received: from nis-sj1-27.broadcom.com (nis-sj1-27.lvn.broadcom.net [10.75.144.136]) by rnd-relay.smtp.broadcom.com (Postfix) with ESMTP id 3283530C030; Tue, 6 Feb 2018 17:16:22 -0800 (PST) Received: from C02VPB22HTD6.vpn.broadcom.net (unknown [10.10.118.139]) by nis-sj1-27.broadcom.com (Postfix) with ESMTP id 62030AC0740; Tue, 6 Feb 2018 17:16:21 -0800 (PST) From: Ajit Khaparde To: dev@dpdk.org Cc: ferruh.yigit@intel.com, stable@dpdk.org Date: Tue, 6 Feb 2018 17:16:15 -0800 Message-Id: <20180207011616.57307-4-ajit.khaparde@broadcom.com> X-Mailer: git-send-email 2.14.3 (Apple Git-98) In-Reply-To: <20180207011616.57307-1-ajit.khaparde@broadcom.com> References: <20180207011616.57307-1-ajit.khaparde@broadcom.com> Subject: [dpdk-dev] [PATCH 3/4] net/bnxt: add 100G speed config capability X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" We are not parsing for 100G speed correctly. With this patch we should be able to configure 100G link. Fixes 710d3bd5568d: ("net/bnxt: add 100G speed detection") Cc: stable@dpdk.org Signed-off-by: Ajit Khaparde --- drivers/net/bnxt/bnxt_hwrm.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c index 5450a0253..4dcdf36a5 100644 --- a/drivers/net/bnxt/bnxt_hwrm.c +++ b/drivers/net/bnxt/bnxt_hwrm.c @@ -2042,6 +2042,10 @@ static uint16_t bnxt_parse_eth_link_speed(uint32_t conf_link_speed) eth_link_speed = HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB; break; + case ETH_LINK_SPEED_100G: + eth_link_speed = + HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB; + break; default: PMD_DRV_LOG(ERR, "Unsupported link speed %d; default to AUTO\n", @@ -2054,7 +2058,7 @@ static uint16_t bnxt_parse_eth_link_speed(uint32_t conf_link_speed) #define BNXT_SUPPORTED_SPEEDS (ETH_LINK_SPEED_100M | ETH_LINK_SPEED_100M_HD | \ ETH_LINK_SPEED_1G | ETH_LINK_SPEED_2_5G | \ ETH_LINK_SPEED_10G | ETH_LINK_SPEED_20G | ETH_LINK_SPEED_25G | \ - ETH_LINK_SPEED_40G | ETH_LINK_SPEED_50G) + ETH_LINK_SPEED_40G | ETH_LINK_SPEED_50G | ETH_LINK_SPEED_100G) static int bnxt_valid_link_speed(uint32_t link_speed, uint16_t port_id) { @@ -2118,6 +2122,8 @@ bnxt_parse_eth_link_speed_mask(struct bnxt *bp, uint32_t link_speed) ret |= HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB; if (link_speed & ETH_LINK_SPEED_50G) ret |= HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB; + if (link_speed & ETH_LINK_SPEED_100G) + ret |= HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB; return ret; }