@@ -158,7 +158,7 @@ int bnxt_alloc_def_cp_ring(struct bnxt *bp)
int rc;
rc = bnxt_hwrm_ring_alloc(bp, cp_ring,
- HWRM_RING_ALLOC_INPUT_RING_TYPE_CMPL,
+ HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL,
0, HWRM_NA_SIGNATURE,
HWRM_NA_SIGNATURE);
if (rc)
@@ -597,7 +597,7 @@ static int bnxt_hwrm_port_phy_cfg(struct bnxt *bp, struct bnxt_link_info *conf)
req.enables = rte_cpu_to_le_32(enables);
} else {
req.flags =
- rte_cpu_to_le_32(HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DOWN);
+ rte_cpu_to_le_32(HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DWN);
RTE_LOG(INFO, PMD, "Force Link Down\n");
}
@@ -703,7 +703,7 @@ int bnxt_hwrm_ring_alloc(struct bnxt *bp,
enables |=
HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID;
break;
- case HWRM_RING_ALLOC_INPUT_RING_TYPE_CMPL:
+ case HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL:
req.ring_type = ring_type;
/*
* TODO: Some HWRM versions crash with
@@ -724,7 +724,7 @@ int bnxt_hwrm_ring_alloc(struct bnxt *bp,
if (rc == 0 && resp->error_code)
rc = rte_le_to_cpu_16(resp->error_code);
switch (ring_type) {
- case HWRM_RING_FREE_INPUT_RING_TYPE_CMPL:
+ case HWRM_RING_FREE_INPUT_RING_TYPE_L2_CMPL:
RTE_LOG(ERR, PMD,
"hwrm_ring_alloc cp failed. rc:%d\n", rc);
return rc;
@@ -765,7 +765,7 @@ int bnxt_hwrm_ring_free(struct bnxt *bp,
rc = rte_le_to_cpu_16(resp->error_code);
switch (ring_type) {
- case HWRM_RING_FREE_INPUT_RING_TYPE_CMPL:
+ case HWRM_RING_FREE_INPUT_RING_TYPE_L2_CMPL:
RTE_LOG(ERR, PMD, "hwrm_ring_free cp failed. rc:%d\n",
rc);
return rc;
@@ -1421,7 +1421,7 @@ static void bnxt_free_cp_ring(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,
struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
bnxt_hwrm_ring_free(bp, cp_ring,
- HWRM_RING_FREE_INPUT_RING_TYPE_CMPL);
+ HWRM_RING_FREE_INPUT_RING_TYPE_L2_CMPL);
memset(cpr->cp_desc_ring, 0, cpr->cp_ring_struct->ring_size *
sizeof(*cpr->cp_desc_ring));
cpr->cp_raw_cons = 0;
@@ -298,7 +298,7 @@ int bnxt_alloc_hwrm_rings(struct bnxt *bp)
/* Rx cmpl */
rc = bnxt_hwrm_ring_alloc(bp, cp_ring,
- HWRM_RING_ALLOC_INPUT_RING_TYPE_CMPL,
+ HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL,
idx, HWRM_NA_SIGNATURE,
HWRM_NA_SIGNATURE);
if (rc)
@@ -365,7 +365,7 @@ int bnxt_alloc_hwrm_rings(struct bnxt *bp)
/* Tx cmpl */
rc = bnxt_hwrm_ring_alloc(bp, cp_ring,
- HWRM_RING_ALLOC_INPUT_RING_TYPE_CMPL,
+ HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL,
idx, HWRM_NA_SIGNATURE,
HWRM_NA_SIGNATURE);
if (rc)
@@ -1,7 +1,7 @@
/*-
* BSD LICENSE
*
- * Copyright(c) Broadcom Limited.
+ * Copyright(c) 2001-2017 Broadcom Limited.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -31,55 +31,27 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#ifndef _HSI_STRUCT_DEF_EXTERNAL_H_
-#define _HSI_STRUCT_DEF_EXTERNAL_H_
-
-/*
- * per-context HW statistics -- chip view
- */
-
-struct ctx_hw_stats64 {
- uint64_t rx_ucast_pkts;
- uint64_t rx_mcast_pkts;
- uint64_t rx_bcast_pkts;
- uint64_t rx_drop_pkts;
- uint64_t rx_discard_pkts;
- uint64_t rx_ucast_bytes;
- uint64_t rx_mcast_bytes;
- uint64_t rx_bcast_bytes;
-
- uint64_t tx_ucast_pkts;
- uint64_t tx_mcast_pkts;
- uint64_t tx_bcast_pkts;
- uint64_t tx_drop_pkts;
- uint64_t tx_discard_pkts;
- uint64_t tx_ucast_bytes;
- uint64_t tx_mcast_bytes;
- uint64_t tx_bcast_bytes;
-
- uint64_t tpa_pkts;
- uint64_t tpa_bytes;
- uint64_t tpa_events;
- uint64_t tpa_aborts;
-} __attribute__((packed));
-
-/* HW Resource Manager Specification 1.5.1 */
+#ifndef _HSI_STRUCT_DEF_DPDK_
+#define _HSI_STRUCT_DEF_DPDK_
+/* HSI and HWRM Specification 1.7.4 */
#define HWRM_VERSION_MAJOR 1
-#define HWRM_VERSION_MINOR 5
-#define HWRM_VERSION_UPDATE 1
-
-#define HWRM_VERSION_STR "1.5.1"
+#define HWRM_VERSION_MINOR 7
+#define HWRM_VERSION_UPDATE 5
+#define HWRM_VERSION_STR "1.7.5"
/*
* Following is the signature for HWRM message field that indicates not
- * applicable (All F's). Need to cast it the size of the field if needed.
+ * applicable (All F's). Need to cast it the size of the field if needed.
*/
-#define HWRM_NA_SIGNATURE ((uint32_t)(-1))
+#define HWRM_NA_SIGNATURE ((uint32_t)(-1))
#define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
-#define HWRM_MAX_RESP_LEN (176) /* hwrm_func_qstats */
-#define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
-#define HW_HASH_KEY_SIZE 40
+#define HWRM_MAX_RESP_LEN (248) /* hwrm_selftest_qlist */
+#define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
+#define HW_HASH_KEY_SIZE 40
#define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
+#define HWRM_ROCE_SP_HSI_VERSION_MAJOR 1
+#define HWRM_ROCE_SP_HSI_VERSION_MINOR 7
+#define HWRM_ROCE_SP_HSI_VERSION_UPDATE 4
/*
* Request types
@@ -140,10 +112,10 @@ struct ctx_hw_stats64 {
#define HWRM_VNIC_PLCMODES_QCFG (UINT32_C(0x49))
#define HWRM_RING_ALLOC (UINT32_C(0x50))
#define HWRM_RING_FREE (UINT32_C(0x51))
-#define HWRM_RING_CMPL_RING_QAGGINT_PARAMS (UINT32_C(0x52))
#define HWRM_RING_CMPL_RING_CFG_AGGINT_PARAM (UINT32_C(0x53))
#define HWRM_RING_RESET (UINT32_C(0x5e))
#define HWRM_RING_GRP_ALLOC (UINT32_C(0x60))
+#define HWRM_RING_GRP_ALLOC (UINT32_C(0x60))
#define HWRM_RING_GRP_FREE (UINT32_C(0x61))
#define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC (UINT32_C(0x70))
#define HWRM_VNIC_RSS_COS_LB_CTX_FREE (UINT32_C(0x71))
@@ -193,11 +165,27 @@ struct ctx_hw_stats64 {
#define HWRM_NVM_WRITE (UINT32_C(0xfffe))
#define HWRM_NVM_RAW_WRITE_BLK (UINT32_C(0xffff))
-/* Return Codes */
-#define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
-#define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
-
-/* Short TX BD (16 bytes) */
+/*
+ * Note: The Host Software Interface (HSI) and Hardware Resource Manager (HWRM)
+ * specification describes the data structures used in Ethernet packet or RDMA
+ * message data transfers as well as an abstract interface for managing Ethernet
+ * NIC hardware resources.
+ */
+/* Ethernet Data path Host Structures */
+/*
+ * Description: The following three sections document the host structures used
+ * between device and software drivers for communicating Ethernet packets.
+ */
+/* BD Ring Structures */
+/*
+ * Description: This structure is used to inform the NIC of a location for and
+ * an aggregation buffer that will be used for packet data that is received. An
+ * aggregation buffer creates a different kind of completion operation for a
+ * packet where a variable number of BDs may be used to place the packet in the
+ * host. RX Rings that have aggregation buffers are known as aggregation rings
+ * and must contain only aggregation buffers.
+ */
+/* Short TX BD (16 bytes) */
struct tx_bd_short {
uint16_t flags_type;
/*
@@ -230,10 +218,10 @@ struct tx_bd_short {
/*
* This value indicates how many 16B BD locations are consumed
* in the ring by this packet. A value of 1 indicates that this
- * BD is the only BD (and that the it is a short BD). A value of
+ * BD is the only BD (and that the it is a short BD). A value of
* 3 indicates either 3 short BDs or 1 long BD and one short BD
* in the packet. A value of 0 indicates that there are 32 BD
- * locations in the packet (the maximum). This field is valid
+ * locations in the packet (the maximum). This field is valid
* only on the first BD of a packet.
*/
#define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
@@ -254,7 +242,8 @@ struct tx_bd_short {
#define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
/* indicates packet length >= 2KB */
#define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
- #define TX_BD_SHORT_FLAGS_LHINT_LAST TX_BD_SHORT_FLAGS_LHINT_GTE2K
+ #define TX_BD_SHORT_FLAGS_LHINT_LAST \
+ TX_BD_SHORT_FLAGS_LHINT_GTE2K
/*
* If set to 1, the device immediately updates the Send Consumer
* Index after the buffer associated with this descriptor has
@@ -294,7 +283,7 @@ struct tx_bd_short {
*/
} __attribute__((packed));
-/* Long TX BD (32 bytes split to 2 16-byte struct) */
+/* Long TX BD (32 bytes split to 2 16-byte struct) */
struct tx_bd_long {
uint16_t flags_type;
/*
@@ -327,10 +316,10 @@ struct tx_bd_long {
/*
* This value indicates how many 16B BD locations are consumed
* in the ring by this packet. A value of 1 indicates that this
- * BD is the only BD (and that the it is a short BD). A value of
+ * BD is the only BD (and that the it is a short BD). A value of
* 3 indicates either 3 short BDs or 1 long BD and one short BD
* in the packet. A value of 0 indicates that there are 32 BD
- * locations in the packet (the maximum). This field is valid
+ * locations in the packet (the maximum). This field is valid
* only on the first BD of a packet.
*/
#define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
@@ -351,7 +340,8 @@ struct tx_bd_long {
#define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
/* indicates packet length >= 2KB */
#define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
- #define TX_BD_LONG_FLAGS_LHINT_LAST TX_BD_LONG_FLAGS_LHINT_GTE2K
+ #define TX_BD_LONG_FLAGS_LHINT_LAST \
+ TX_BD_LONG_FLAGS_LHINT_GTE2K
/*
* If set to 1, the device immediately updates the Send Consumer
* Index after the buffer associated with this descriptor has
@@ -441,7 +431,7 @@ struct tx_bd_long_hi {
* bit is set, outer UDP checksum will be calculated for the
* following cases: 1. Packets with tcp_udp_chksum flag set to
* offload checksum for inner packet AND the inner packet is
- * TCP/UDP. If the inner packet is ICMP for example (non-
+ * TCP/UDP. If the inner packet is ICMP for example (non-
* TCP/UDP), even if the tcp_udp_chksum is set, the outer UDP
* checksum will not be calculated. 2. Packets with lso flag set
* which implies inner TCP checksum calculation as part of LSO
@@ -473,7 +463,7 @@ struct tx_bd_long_hi {
* to one when LSO is '1', then the IPID of the tunnel IP header
* will be incremented for each subsequent segment of an LSO
* operation. The flag is ignored if the LSO packet is a normal
- * (non-tunneled) TCP packet.
+ * (non-tunneled) TCP packet.
*/
#define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80)
/*
@@ -541,7 +531,7 @@ struct tx_bd_long_hi {
#define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
/* Value programmed in CFA VLANTPID register. */
#define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
- #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \
+ #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \
TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG
/* When key=1, This is the VLAN tag TPID select value. */
#define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
@@ -555,15 +545,16 @@ struct tx_bd_long_hi {
/* No editing */
#define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
/*
- * - meta[17:16] - TPID select value (0 =
+ * - meta[17:16] - TPID select value (0 =
* 0x8100). - meta[15:12] - PRI/DE value. -
* meta[11:0] - VID value.
*/
#define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
- #define TX_BD_LONG_CFA_META_KEY_LAST TX_BD_LONG_CFA_META_KEY_VLAN_TAG
+ #define TX_BD_LONG_CFA_META_KEY_LAST \
+ TX_BD_LONG_CFA_META_KEY_VLAN_TAG
} __attribute__((packed));
-/* RX Producer Packet BD (16 bytes) */
+/* RX Producer Packet BD (16 bytes) */
struct rx_prod_pkt_bd {
uint16_t flags_type;
/* This value identifies the type of buffer descriptor. */
@@ -571,7 +562,7 @@ struct rx_prod_pkt_bd {
#define RX_PROD_PKT_BD_TYPE_SFT 0
/*
* Indicates that this BD is 16B long and is an
- * RX Producer (ie. empty) buffer descriptor.
+ * RX Producer (ie. empty) buffer descriptor.
*/
#define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT UINT32_C(0x4)
/*
@@ -639,7 +630,7 @@ struct rx_prod_pkt_bd {
/* Completion Ring Structures */
/* Note: This structure is used by the HWRM to communicate HWRM Error. */
-/* Base Completion Record (16 bytes) */
+/* Base Completion Record (16 bytes) */
struct cmpl_base {
uint16_t type;
/* unused is 10 b */
@@ -718,7 +709,7 @@ struct cmpl_base {
/* info4 is 32 b */
} __attribute__((packed));
-/* TX Completion Record (16 bytes) */
+/* TX Completion Record (16 bytes) */
struct tx_cmpl {
uint16_t flags_type;
/*
@@ -770,7 +761,7 @@ struct tx_cmpl {
#define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1)
/* Bad Format: BDs were not formatted correctly. */
#define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1)
- #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \
+ #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \
TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT
/*
* When this bit is '1', it indicates that the length of the
@@ -807,7 +798,7 @@ struct tx_cmpl {
/* unused3 is 32 b */
} __attribute__((packed));
-/* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */
+/* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */
struct rx_pkt_cmpl {
uint16_t flags_type;
/*
@@ -844,10 +835,12 @@ struct rx_pkt_cmpl {
* field.
*/
#define RX_PKT_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
- #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST RX_PKT_CMPL_FLAGS_PLACEMENT_HDS
+ #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST \
+ RX_PKT_CMPL_FLAGS_PLACEMENT_HDS
/* This bit is '1' if the RSS field in this completion is valid. */
#define RX_PKT_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
/* unused is 1 b */
+ #define RX_PKT_CMPL_FLAGS_UNUSED UINT32_C(0x800)
/*
* This value indicates what the inner packet determined for the
* packet was.
@@ -903,7 +896,8 @@ struct rx_pkt_cmpl {
* that a timestamp was taken for the packet.
*/
#define RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP (UINT32_C(0x9) << 12)
- #define RX_PKT_CMPL_FLAGS_ITYPE_LAST RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP
+ #define RX_PKT_CMPL_FLAGS_ITYPE_LAST \
+ RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP
#define RX_PKT_CMPL_FLAGS_MASK UINT32_C(0xffc0)
#define RX_PKT_CMPL_FLAGS_SFT 6
uint16_t len;
@@ -1021,7 +1015,7 @@ struct rx_pkt_cmpl_hi {
* the vlan TPID value.
*/
#define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
- #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST \
+ #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST \
RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
/*
* This field indicates the IP type for the inner-most IP
@@ -1071,15 +1065,18 @@ struct rx_pkt_cmpl_hi {
* means that the packet could not be placed
* into 7 physical buffers or less.
*/
- #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT (UINT32_C(0x1) << 1)
+ #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT \
+ (UINT32_C(0x1) << 1)
/*
* Not On Chip: All BDs needed for the packet
* were not on-chip when the packet arrived.
*/
- #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP (UINT32_C(0x2) << 1)
+ #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
+ (UINT32_C(0x2) << 1)
/* Bad Format: BDs were not formatted correctly. */
- #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT (UINT32_C(0x3) << 1)
- #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST \
+ #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT \
+ (UINT32_C(0x3) << 1)
+ #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST \
RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT
/* This indicates that there was an error in the IP header checksum. */
#define RX_PKT_CMPL_ERRORS_IP_CS_ERROR UINT32_C(0x10)
@@ -1120,39 +1117,45 @@ struct rx_pkt_cmpl_hi {
* match expectation from L2 Ethertype for IPv4
* and IPv6 in the tunnel header.
*/
- #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION (UINT32_C(0x1) << 9)
+ #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION \
+ (UINT32_C(0x1) << 9)
/*
* Indicates that header length is out of range
* in the tunnel header. Valid for IPv4.
*/
- #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN (UINT32_C(0x2) << 9)
+ #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN \
+ (UINT32_C(0x2) << 9)
/*
* Indicates that the physical packet is shorter
* than that claimed by the PPPoE header length
* for a tunnel PPPoE packet.
*/
- #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR (UINT32_C(0x3) << 9)
+ #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR \
+ (UINT32_C(0x3) << 9)
/*
* Indicates that physical packet is shorter
* than that claimed by the tunnel l3 header
* length. Valid for IPv4, or IPv6 tunnel packet
* packets.
*/
- #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR (UINT32_C(0x4) << 9)
+ #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR \
+ (UINT32_C(0x4) << 9)
/*
* Indicates that the physical packet is shorter
* than that claimed by the tunnel UDP header
* length for a tunnel UDP packet that is not
* fragmented.
*/
- #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR (UINT32_C(0x5) << 9)
+ #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR \
+ (UINT32_C(0x5) << 9)
/*
* indicates that the IPv4 TTL or IPv6 hop limit
- * check have failed (e.g. TTL = 0) in the
+ * check have failed (e.g. TTL = 0) in the
* tunnel header. Valid for IPv4, and IPv6.
*/
- #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL (UINT32_C(0x6) << 9)
- #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST \
+ #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL \
+ (UINT32_C(0x6) << 9)
+ #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST \
RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL
/*
* This indicates that there was an error in the inner portion
@@ -1172,15 +1175,17 @@ struct rx_pkt_cmpl_hi {
* and IPv6 or that option other than VFT was
* parsed on FCoE packet.
*/
- #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION (UINT32_C(0x1) << 12)
+ #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION \
+ (UINT32_C(0x1) << 12)
/*
* indicates that header length is out of range.
* Valid for IPv4 and RoCE
*/
- #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN (UINT32_C(0x2) << 12)
+ #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN \
+ (UINT32_C(0x2) << 12)
/*
* indicates that the IPv4 TTL or IPv6 hop limit
- * check have failed (e.g. TTL = 0). Valid for
+ * check have failed (e.g. TTL = 0). Valid for
* IPv4, and IPv6
*/
#define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12)
@@ -1189,18 +1194,21 @@ struct rx_pkt_cmpl_hi {
* than that claimed by the l3 header length.
* Valid for IPv4, IPv6 packet or RoCE packets.
*/
- #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR (UINT32_C(0x4) << 12)
+ #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR \
+ (UINT32_C(0x4) << 12)
/*
* Indicates that the physical packet is shorter
* than that claimed by the UDP header length
* for a UDP packet that is not fragmented.
*/
- #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR (UINT32_C(0x5) << 12)
+ #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR \
+ (UINT32_C(0x5) << 12)
/*
* Indicates that TCP header length > IP
* payload. Valid for TCP packets only.
*/
- #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN (UINT32_C(0x6) << 12)
+ #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN \
+ (UINT32_C(0x6) << 12)
/* Indicates that TCP header length < 5. Valid for TCP. */
#define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL \
(UINT32_C(0x7) << 12)
@@ -1209,9 +1217,9 @@ struct rx_pkt_cmpl_hi {
* TCP header size that does not match data
* offset in TCP header. Valid for TCP.
*/
- #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN \
+ #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN \
(UINT32_C(0x8) << 12)
- #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST \
+ #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST \
RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN
#define RX_PKT_CMPL_ERRORS_MASK UINT32_C(0xfffe)
#define RX_PKT_CMPL_ERRORS_SFT 1
@@ -1699,7 +1707,7 @@ struct rx_tpa_end_cmpl_hi {
*/
} __attribute__((packed));
-/* HWRM Forwarded Request (16 bytes) */
+/* HWRM Forwarded Request (16 bytes) */
struct hwrm_fwd_req_cmpl {
uint16_t req_len_type;
/* Length of forwarded request in bytes. */
@@ -1738,7 +1746,7 @@ struct hwrm_fwd_req_cmpl {
#define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1
} __attribute__((packed));
-/* HWRM Asynchronous Event Completion Record (16 bytes) */
+/* HWRM Asynchronous Event Completion Record (16 bytes) */
struct hwrm_async_event_cmpl {
uint16_t type;
/* unused1 is 10 b */
@@ -1760,19 +1768,20 @@ struct hwrm_async_event_cmpl {
/* Link MTU changed */
#define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE UINT32_C(0x1)
/* Link speed changed */
- #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE UINT32_C(0x2)
+ #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE UINT32_C(0x2)
/* DCB Configuration changed */
- #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE UINT32_C(0x3)
+ #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE UINT32_C(0x3)
/* Port connection not allowed */
#define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED UINT32_C(0x4)
/* Link speed configuration was not allowed */
- #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED UINT32_C(0x5)
+ #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED \
+ UINT32_C(0x5)
/* Link speed configuration change */
#define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_CHANGE UINT32_C(0x6)
/* Port PHY configuration change */
#define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_PHY_CFG_CHANGE UINT32_C(0x7)
/* Function driver unloaded */
- #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD UINT32_C(0x10)
+ #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD UINT32_C(0x10)
/* Function driver loaded */
#define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD UINT32_C(0x11)
/* Function FLR related processing has completed */
@@ -1781,12 +1790,13 @@ struct hwrm_async_event_cmpl {
#define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD UINT32_C(0x20)
/* PF driver loaded */
#define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD UINT32_C(0x21)
- /* VF Function Level Reset (FLR) */
+ /* VF Function Level Reset (FLR) */
#define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR UINT32_C(0x30)
/* VF MAC Address Change */
#define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE UINT32_C(0x31)
/* PF-VF communication channel status change. */
- #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE UINT32_C(0x32)
+ #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE \
+ UINT32_C(0x32)
/* VF Configuration Change */
#define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_CFG_CHANGE UINT32_C(0x33)
/* HWRM Error */
@@ -1805,69 +1815,13 @@ struct hwrm_async_event_cmpl {
#define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe)
#define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1
uint8_t timestamp_lo;
- /* 8-lsb timestamp from POR (100-msec resolution) */
+ /* 8-lsb timestamp from POR (100-msec resolution) */
uint16_t timestamp_hi;
- /* 16-lsb timestamp from POR (100-msec resolution) */
+ /* 16-lsb timestamp from POR (100-msec resolution) */
uint32_t event_data1;
/* Event specific data */
} __attribute__((packed));
-/*
- * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
- * inside the chip. The HWRM is implemented in firmware, and runs on embedded
- * processors inside the chip. This firmware service is vital part of the chip.
- * The chip can not be used by a driver or HWRM client without the HWRM.
- */
-
-/* Input (16 bytes) */
-struct input {
- uint16_t req_type;
- /*
- * This value indicates what type of request this is. The format
- * for the rest of the command is determined by this field.
- */
- uint16_t cmpl_ring;
- /*
- * This value indicates the what completion ring the request
- * will be optionally completed on. If the value is -1, then no
- * CR completion will be generated. Any other value must be a
- * valid CR ring_id value for this function.
- */
- uint16_t seq_id;
- /* This value indicates the command sequence number. */
- uint16_t target_id;
- /*
- * Target ID of this command. 0x0 - 0xFFF8 - Used for function
- * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
- * - HWRM
- */
- uint64_t resp_addr;
- /*
- * This is the host address where the response will be written
- * when the request is complete. This area must be 16B aligned
- * and must be cleared to zero before the request is made.
- */
-} __attribute__((packed));
-
-/* Output (8 bytes) */
-struct output {
- uint16_t error_code;
- /*
- * Pass/Fail or error type Note: receiver to verify the in
- * parameters, and fail the call with an error when appropriate
- */
- uint16_t req_type;
- /* This field returns the type of original request. */
- uint16_t seq_id;
- /* This field provides original sequence number of the command. */
- uint16_t resp_len;
- /*
- * This field is the length of the response in bytes. The last
- * byte of the response is a valid flag that will read as '1'
- * when the command has been completely written to memory.
- */
-} __attribute__((packed));
-
/* hwrm_ver_get */
/*
* Description: This function is called by a driver to determine the HWRM
@@ -1877,7 +1831,7 @@ struct output {
* interface or firmware version with major = 0, minor = 0, and update = 0 shall
* be considered an invalid version.
*/
-/* Input (24 bytes) */
+/* Input (24 bytes) */
struct hwrm_ver_get_input {
uint16_t req_type;
/*
@@ -1934,7 +1888,7 @@ struct hwrm_ver_get_input {
uint8_t unused_0[5];
} __attribute__((packed));
-/* Output (128 bytes) */
+/* Output (128 bytes) */
struct hwrm_ver_get_output {
uint16_t error_code;
/*
@@ -2004,7 +1958,7 @@ struct hwrm_ver_get_output {
/*
* This field is a reserved field. This field can be used to
* represent firmware branches or customer specific releases
- * tied to a specific (major,minor,update) version of the HWRM
+ * tied to a specific (major,minor,update) version of the HWRM
* firmware.
*/
uint8_t mgmt_fw_maj;
@@ -2027,7 +1981,7 @@ struct hwrm_ver_get_output {
/*
* This field is a reserved field. This field can be used to
* represent firmware branches or customer specific releases
- * tied to a specific (major,minor,update) version
+ * tied to a specific (major,minor,update) version
*/
uint8_t netctrl_fw_maj;
/*
@@ -2050,7 +2004,7 @@ struct hwrm_ver_get_output {
/*
* This field is a reserved field. This field can be used to
* represent firmware branches or customer specific releases
- * tied to a specific (major,minor,update) version
+ * tied to a specific (major,minor,update) version
*/
uint32_t dev_caps_cfg;
/*
@@ -2062,13 +2016,27 @@ struct hwrm_ver_get_output {
* supported. If set to 0, then secure firmware update behavior
* is not supported.
*/
- #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SECURE_FW_UPD_SUPPORTED UINT32_C(0x1)
+ #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SECURE_FW_UPD_SUPPORTED \
+ UINT32_C(0x1)
/*
* If set to 1, then firmware based DCBX agent is supported. If
* set to 0, then firmware based DCBX agent capability is not
* supported on this device.
*/
- #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_FW_DCBX_AGENT_SUPPORTED UINT32_C(0x2)
+ #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_FW_DCBX_AGENT_SUPPORTED \
+ UINT32_C(0x2)
+ /*
+ * If set to 1, then HWRM short command format is supported. If
+ * set to 0, then HWRM short command format is not supported.
+ */
+ #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SHORT_CMD_SUPPORTED \
+ UINT32_C(0x4)
+ /*
+ * If set to 1, then HWRM short command format is required. If
+ * set to 0, then HWRM short command format is not required.
+ */
+ #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SHORT_CMD_INPUTUIRED \
+ UINT32_C(0x8)
uint8_t roce_fw_maj;
/*
* This field represents the major version of RoCE firmware. A
@@ -2089,22 +2057,22 @@ struct hwrm_ver_get_output {
/*
* This field is a reserved field. This field can be used to
* represent firmware branches or customer specific releases
- * tied to a specific (major,minor,update) version
+ * tied to a specific (major,minor,update) version
*/
char hwrm_fw_name[16];
/*
- * This field represents the name of HWRM FW (ASCII chars with
+ * This field represents the name of HWRM FW (ASCII chars with
* NULL at the end).
*/
char mgmt_fw_name[16];
/*
- * This field represents the name of mgmt FW (ASCII chars with
+ * This field represents the name of mgmt FW (ASCII chars with
* NULL at the end).
*/
char netctrl_fw_name[16];
/*
* This field represents the name of network control firmware
- * (ASCII chars with NULL at the end).
+ * (ASCII chars with NULL at the end).
*/
uint32_t reserved2[4];
/*
@@ -2113,7 +2081,7 @@ struct hwrm_ver_get_output {
*/
char roce_fw_name[16];
/*
- * This field represents the name of RoCE FW (ASCII chars with
+ * This field represents the name of RoCE FW (ASCII chars with
* NULL at the end).
*/
uint16_t chip_num;
@@ -2134,7 +2102,7 @@ struct hwrm_ver_get_output {
/* FPGA platform of the chip. */
#define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA UINT32_C(0x1)
/* Palladium platform of the chip. */
- #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM UINT32_C(0x2)
+ #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM UINT32_C(0x2)
uint16_t max_req_win_len;
/*
* This field returns the maximum value of request window that
@@ -2164,7 +2132,7 @@ struct hwrm_ver_get_output {
/* hwrm_func_reset */
/*
- * Description: This command resets a hardware function (PCIe function) and
+ * Description: This command resets a hardware function (PCIe function) and
* frees any resources used by the function. This command shall be initiated by
* the driver after an FLR has occurred to prepare the function for re-use. This
* command may also be initiated by a driver prior to doing it's own
@@ -2176,7 +2144,7 @@ struct hwrm_ver_get_output {
* idled. The command returns all the resources owned by the function so a new
* driver may allocate and configure resources normally.
*/
-/* Input (24 bytes) */
+/* Input (24 bytes) */
struct hwrm_func_reset_input {
uint16_t req_type;
/*
@@ -2218,7 +2186,7 @@ struct hwrm_func_reset_input {
/* This value indicates the level of a function reset. */
/*
* Reset the caller function and its children
- * VFs (if any). If no children functions exist,
+ * VFs (if any). If no children functions exist,
* then reset the caller function only.
*/
#define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL UINT32_C(0x0)
@@ -2231,7 +2199,8 @@ struct hwrm_func_reset_input {
* It is an error to specify this level by a PF
* driver with no children VFs.
*/
- #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN UINT32_C(0x2)
+ #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN \
+ UINT32_C(0x2)
/*
* Reset a specific VF of the caller function
* driver if the caller is the parent PF driver.
@@ -2244,7 +2213,7 @@ struct hwrm_func_reset_input {
uint8_t unused_0;
} __attribute__((packed));
-/* Output (16 bytes) */
+/* Output (16 bytes) */
struct hwrm_func_reset_output {
uint16_t error_code;
/*
@@ -2284,7 +2253,7 @@ struct hwrm_func_reset_output {
* physical function. The output FID value is needed to configure Rings and
* MSI-X vectors so their DMA operations appear correctly on the PCI bus.
*/
-/* Input (24 bytes) */
+/* Input (24 bytes) */
struct hwrm_func_qcaps_input {
uint16_t req_type;
/*
@@ -2315,12 +2284,12 @@ struct hwrm_func_qcaps_input {
uint16_t fid;
/*
* Function ID of the function that is being queried. 0xFF...
- * (All Fs) if the query is for the requesting function.
+ * (All Fs) if the query is for the requesting function.
*/
uint16_t unused_0[3];
} __attribute__((packed));
-/* Output (80 bytes) */
+/* Output (80 bytes) */
struct hwrm_func_qcaps_output {
uint16_t error_code;
/*
@@ -2345,54 +2314,56 @@ struct hwrm_func_qcaps_output {
uint16_t port_id;
/*
* Port ID of port that this function is associated with. Valid
- * only for the PF. 0xFF... (All Fs) if this function is not
- * associated with any port. 0xFF... (All Fs) if this function
+ * only for the PF. 0xFF... (All Fs) if this function is not
+ * associated with any port. 0xFF... (All Fs) if this function
* is called from a VF.
*/
uint32_t flags;
/* If 1, then Push mode is supported on this function. */
- #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
+ #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
/*
* If 1, then the global MSI-X auto-masking is enabled for the
* device.
*/
- #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING UINT32_C(0x2)
+ #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING \
+ UINT32_C(0x2)
/*
- * If 1, then the Precision Time Protocol (PTP) processing is
+ * If 1, then the Precision Time Protocol (PTP) processing is
* supported on this function. The HWRM should enable PTP on
- * only a single Physical Function (PF) per port.
+ * only a single Physical Function (PF) per port.
*/
#define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4)
/*
- * If 1, then RDMA over Converged Ethernet (RoCE) v1 is
+ * If 1, then RDMA over Converged Ethernet (RoCE) v1 is
* supported on this function.
*/
- #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V1_SUPPORTED UINT32_C(0x8)
+ #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V1_SUPPORTED UINT32_C(0x8)
/*
- * If 1, then RDMA over Converged Ethernet (RoCE) v2 is
+ * If 1, then RDMA over Converged Ethernet (RoCE) v2 is
* supported on this function.
*/
- #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V2_SUPPORTED UINT32_C(0x10)
+ #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V2_SUPPORTED UINT32_C(0x10)
/*
* If 1, then control and configuration of WoL magic packet are
* supported on this function.
*/
- #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_MAGICPKT_SUPPORTED UINT32_C(0x20)
+ #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_MAGICPKT_SUPPORTED \
+ UINT32_C(0x20)
/*
* If 1, then control and configuration of bitmap pattern packet
* are supported on this function.
*/
- #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_BMP_SUPPORTED UINT32_C(0x40)
+ #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_BMP_SUPPORTED UINT32_C(0x40)
/*
* If set to 1, then the control and configuration of rate limit
* of an allocated TX ring on the queried function is supported.
*/
- #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_RING_RL_SUPPORTED UINT32_C(0x80)
+ #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_RING_RL_SUPPORTED UINT32_C(0x80)
/*
* If 1, then control and configuration of minimum and maximum
* bandwidths are supported on the queried function.
*/
- #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_BW_CFG_SUPPORTED UINT32_C(0x100)
+ #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_BW_CFG_SUPPORTED UINT32_C(0x100)
/*
* If the query is for a VF, then this flag shall be ignored. If
* this query is for a PF and this flag is set to 1, then the PF
@@ -2401,7 +2372,8 @@ struct hwrm_func_qcaps_output {
* set to 0, then the PF does not have the capability to set the
* rate limits on the TX rings of its children VFs.
*/
- #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_TX_RING_RL_SUPPORTED UINT32_C(0x200)
+ #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_TX_RING_RL_SUPPORTED \
+ UINT32_C(0x200)
/*
* If the query is for a VF, then this flag shall be ignored. If
* this query is for a PF and this flag is set to 1, then the PF
@@ -2411,7 +2383,17 @@ struct hwrm_func_qcaps_output {
* capability to set the minimum or maximum bandwidths for its
* children VFs.
*/
- #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_BW_CFG_SUPPORTED UINT32_C(0x400)
+ #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_BW_CFG_SUPPORTED UINT32_C(0x400)
+ /*
+ * Standard TX Ring mode is used for the allocation of TX ring
+ * and underlying scheduling resources that allow bandwidth
+ * reservation and limit settings on the queried function. If
+ * set to 1, then standard TX ring mode is supported on the
+ * queried function. If set to 0, then standard TX ring mode is
+ * not available on the queried function.
+ */
+ #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_STD_TX_RING_MODE_SUPPORTED \
+ UINT32_C(0x800)
uint8_t mac_address[6];
/*
* This value is current MAC address configured for this
@@ -2451,7 +2433,7 @@ struct hwrm_func_qcaps_output {
uint16_t first_vf_id;
/*
* The identifier for the first VF enabled on a PF. This is
- * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if
+ * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if
* this command is called on a PF with SR-IOV disabled or on a
* VF.
*/
@@ -2459,7 +2441,7 @@ struct hwrm_func_qcaps_output {
/*
* The maximum number of VFs that can be allocated to the
* function. This is valid only on the PF with SR-IOV enabled.
- * 0xFF... (All Fs) if this command is called on a PF with SR-
+ * 0xFF... (All Fs) if this command is called on a PF with SR-
* IOV disabled or on a VF.
*/
uint16_t max_stat_ctx;
@@ -2479,22 +2461,22 @@ struct hwrm_func_qcaps_output {
*/
uint32_t max_tx_em_flows;
/*
- * The maximum number of Exact Match (EM) flows that can be
+ * The maximum number of Exact Match (EM) flows that can be
* offloaded by this function on the TX side.
*/
uint32_t max_tx_wm_flows;
/*
- * The maximum number of Wildcard Match (WM) flows that can be
+ * The maximum number of Wildcard Match (WM) flows that can be
* offloaded by this function on the TX side.
*/
uint32_t max_rx_em_flows;
/*
- * The maximum number of Exact Match (EM) flows that can be
+ * The maximum number of Exact Match (EM) flows that can be
* offloaded by this function on the RX side.
*/
uint32_t max_rx_wm_flows;
/*
- * The maximum number of Wildcard Match (WM) flows that can be
+ * The maximum number of Wildcard Match (WM) flows that can be
* offloaded by this function on the RX side.
*/
uint32_t max_mcast_filters;
@@ -2518,7 +2500,7 @@ struct hwrm_func_qcaps_output {
* be allocated to the function. This number indicates the
* maximum number of TX rings that can be assigned strict
* priorities out of the maximum number of TX rings that can be
- * allocated (max_tx_rings) to the function.
+ * allocated (max_tx_rings) to the function.
*/
uint8_t unused_0;
uint8_t valid;
@@ -2539,9 +2521,13 @@ struct hwrm_func_qcaps_output {
* allows a physical function driver to query virtual functions that are
* children of the physical function. The output FID value is needed to
* configure Rings and MSI-X vectors so their DMA operations appear correctly on
- * the PCI bus.
+ * the PCI bus. This command should be called by every driver after
+ * 'hwrm_func_cfg' to get the actual number of resources allocated by the HWRM.
+ * The values returned by hwrm_func_qcfg are the values the driver shall use.
+ * These values may be different than what was originally requested in the
+ * 'hwrm_func_cfg' command.
*/
-/* Input (24 bytes) */
+/* Input (24 bytes) */
struct hwrm_func_qcfg_input {
uint16_t req_type;
/*
@@ -2572,12 +2558,12 @@ struct hwrm_func_qcfg_input {
uint16_t fid;
/*
* Function ID of the function that is being queried. 0xFF...
- * (All Fs) if the query is for the requesting function.
+ * (All Fs) if the query is for the requesting function.
*/
uint16_t unused_0[3];
} __attribute__((packed));
-/* Output (72 bytes) */
+/* Output (72 bytes) */
struct hwrm_func_qcfg_output {
uint16_t error_code;
/*
@@ -2602,7 +2588,7 @@ struct hwrm_func_qcfg_output {
uint16_t port_id;
/*
* Port ID of port that this function is associated with.
- * 0xFF... (All Fs) if this function is not associated with any
+ * 0xFF... (All Fs) if this function is not associated with any
* port.
*/
uint16_t vlan;
@@ -2610,15 +2596,15 @@ struct hwrm_func_qcfg_output {
* This value is the current VLAN setting for this function. The
* value of 0 for this field indicates no priority tagging or
* VLAN is used. This field's format is same as 802.1Q Tag's Tag
- * Control Information (TCI) format that includes both Priority
- * Code Point (PCP) and VLAN Identifier (VID).
+ * Control Information (TCI) format that includes both Priority
+ * Code Point (PCP) and VLAN Identifier (VID).
*/
uint16_t flags;
/*
* If 1, then magic packet based Out-Of-Box WoL is enabled on
* the port associated with this function.
*/
- #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_OOB_WOL_MAGICPKT_ENABLED \
+ #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_OOB_WOL_MAGICPKT_ENABLED \
UINT32_C(0x1)
/*
* If 1, then bitmap pattern based Out-Of-Box WoL packet is
@@ -2630,8 +2616,27 @@ struct hwrm_func_qcfg_output {
* on the port associated with this function. If set to 0, then
* DCBX agent is not running in the firmware.
*/
- #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_FW_DCBX_AGENT_ENABLED \
+ #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_FW_DCBX_AGENT_ENABLED \
UINT32_C(0x4)
+ /*
+ * Standard TX Ring mode is used for the allocation of TX ring
+ * and underlying scheduling resources that allow bandwidth
+ * reservation and limit settings on the queried function. If
+ * set to 1, then standard TX ring mode is enabled on the
+ * queried function. If set to 0, then the standard TX ring mode
+ * is disabled on the queried function. In this extended TX ring
+ * resource mode, the minimum and maximum bandwidth settings are
+ * not supported to allow the allocation of TX rings to span
+ * multiple scheduler nodes.
+ */
+ #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_STD_TX_RING_MODE_ENABLED \
+ UINT32_C(0x8)
+ /*
+ * If set to 1 then FW based LLDP agent is enabled and running
+ * on the port associated with this function. If set to 0 then
+ * the LLDP agent is not running in the firmware.
+ */
+ #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_FW_LLDP_AGENT_ENABLED UINT32_C(0x10)
uint8_t mac_address[6];
/*
* This value is current MAC address configured for this
@@ -2641,8 +2646,8 @@ struct hwrm_func_qcfg_output {
uint16_t pci_id;
/*
* This value is current PCI ID of this function. If ARI is
- * enabled, then it is Bus Number (8b):Function Number(8b).
- * Otherwise, it is Bus Number (8b):Device Number (4b):Function
+ * enabled, then it is Bus Number (8b):Function Number(8b).
+ * Otherwise, it is Bus Number (8b):Device Number (4b):Function
* Number(4b).
*/
uint16_t alloc_rsscos_ctx;
@@ -2696,17 +2701,13 @@ struct hwrm_func_qcfg_output {
/* Multiple physical functions */
#define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_MPFS UINT32_C(0x1)
/* Network Partitioning 1.0 */
- #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_0 \
- UINT32_C(0x2)
+ #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_0 UINT32_C(0x2)
/* Network Partitioning 1.5 */
- #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_5 \
- UINT32_C(0x3)
+ #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_5 UINT32_C(0x3)
/* Network Partitioning 2.0 */
- #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR2_0 \
- UINT32_C(0x4)
+ #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR2_0 UINT32_C(0x4)
/* Unknown */
- #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_UNKNOWN \
- UINT32_C(0xff)
+ #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_UNKNOWN UINT32_C(0xff)
uint8_t unused_0;
uint16_t dflt_vnic_id;
/* The default VNIC ID assigned to a function that is being queried. */
@@ -2719,26 +2720,41 @@ struct hwrm_func_qcfg_output {
* for the scheduler inside the device. A value of 0 indicates
* the minimum bandwidth is not configured.
*/
- /* Bandwidth value */
- #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_MASK \
- UINT32_C(0xfffffff)
+ /* The bandwidth value. */
+ #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
#define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_SFT 0
- /* Reserved */
- #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_RSVD UINT32_C(0x10000000)
+ /* The granularity of the value (bits or bytes). */
+ #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE UINT32_C(0x10000000)
+ /* Value is in bits. */
+ #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE_BITS (UINT32_C(0x0) << 28)
+ /* Value is in bytes. */
+ #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE_BYTES \
+ (UINT32_C(0x1) << 28)
+ #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE_LAST \
+ FUNC_QCFG_OUTPUT_MIN_BW_SCALE_BYTES
/* bw_value_unit is 3 b */
#define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_MASK \
UINT32_C(0xe0000000)
#define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_SFT 29
- /* Value is in Mbps */
- #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_MBPS \
+ /* Value is in Mb or MB (base 10). */
+ #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_MEGA \
(UINT32_C(0x0) << 29)
+ /* Value is in Kb or KB (base 10). */
+ #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_KILO \
+ (UINT32_C(0x2) << 29)
+ /* Value is in bits or bytes. */
+ #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_BASE \
+ (UINT32_C(0x4) << 29)
+ /* Value is in Gb or GB (base 10). */
+ #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_GIGA \
+ (UINT32_C(0x6) << 29)
/* Value is in 1/100th of a percentage of total bandwidth. */
- #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_PERCENT1_100 \
+ #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_PERCENT1_100 \
(UINT32_C(0x1) << 29)
/* Invalid unit */
- #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_INVALID \
+ #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_INVALID \
(UINT32_C(0x7) << 29)
- #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_LAST \
+ #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_LAST \
FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_INVALID
uint32_t max_bw;
/*
@@ -2747,43 +2763,58 @@ struct hwrm_func_qcfg_output {
* for the scheduler inside the device. A value of 0 indicates
* that the maximum bandwidth is not configured.
*/
- /* Bandwidth value */
- #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_MASK \
- UINT32_C(0xfffffff)
+ /* The bandwidth value. */
+ #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
#define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_SFT 0
- /* Reserved */
- #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_RSVD UINT32_C(0x10000000)
+ /* The granularity of the value (bits or bytes). */
+ #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE UINT32_C(0x10000000)
+ /* Value is in bits. */
+ #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE_BITS (UINT32_C(0x0) << 28)
+ /* Value is in bytes. */
+ #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE_BYTES \
+ (UINT32_C(0x1) << 28)
+ #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE_LAST \
+ FUNC_QCFG_OUTPUT_MAX_BW_SCALE_BYTES
/* bw_value_unit is 3 b */
#define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_MASK \
UINT32_C(0xe0000000)
#define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_SFT 29
- /* Value is in Mbps */
- #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_MBPS \
+ /* Value is in Mb or MB (base 10). */
+ #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_MEGA \
(UINT32_C(0x0) << 29)
+ /* Value is in Kb or KB (base 10). */
+ #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_KILO \
+ (UINT32_C(0x2) << 29)
+ /* Value is in bits or bytes. */
+ #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_BASE \
+ (UINT32_C(0x4) << 29)
+ /* Value is in Gb or GB (base 10). */
+ #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_GIGA \
+ (UINT32_C(0x6) << 29)
/* Value is in 1/100th of a percentage of total bandwidth. */
- #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
+ #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
(UINT32_C(0x1) << 29)
/* Invalid unit */
- #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
+ #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
(UINT32_C(0x7) << 29)
- #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_LAST \
+ #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_LAST \
FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_INVALID
uint8_t evb_mode;
/*
* This value indicates the Edge virtual bridge mode for the
* domain that this function belongs to.
*/
- /* No Edge Virtual Bridging (EVB) */
+ /* No Edge Virtual Bridging (EVB) */
#define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_NO_EVB UINT32_C(0x0)
- /* Virtual Ethernet Bridge (VEB) */
+ /* Virtual Ethernet Bridge (VEB) */
#define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEB UINT32_C(0x1)
- /* Virtual Ethernet Port Aggregator (VEPA) */
+ /* Virtual Ethernet Port Aggregator (VEPA) */
#define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEPA UINT32_C(0x2)
uint8_t unused_3;
uint16_t alloc_vfs;
/*
* The number of VFs that are allocated to the function. This is
- * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if
+ * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if
* this command is called on a PF with SR-IOV disabled or on a
* VF.
*/
@@ -2797,7 +2828,7 @@ struct hwrm_func_qcfg_output {
uint16_t alloc_sp_tx_rings;
/*
* The number of strict priority transmit rings out of currently
- * allocated TX rings to the function (alloc_tx_rings).
+ * allocated TX rings to the function (alloc_tx_rings).
*/
uint8_t unused_4;
uint8_t valid;
@@ -3068,8 +3099,7 @@ struct hwrm_func_cfg_input {
* for the scheduler inside the device.
*/
/* The bandwidth value. */
- #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_MASK \
- UINT32_C(0xfffffff)
+ #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
#define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_SFT 0
/* The granularity of the value (bits or bytes). */
#define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE UINT32_C(0x10000000)
@@ -3084,22 +3114,22 @@ struct hwrm_func_cfg_input {
UINT32_C(0xe0000000)
#define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_SFT 29
/* Value is in Mb or MB (base 10). */
- #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_MEGA \
+ #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_MEGA \
(UINT32_C(0x0) << 29)
/* Value is in Kb or KB (base 10). */
- #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_KILO \
+ #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_KILO \
(UINT32_C(0x2) << 29)
/* Value is in bits or bytes. */
- #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_BASE \
+ #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_BASE \
(UINT32_C(0x4) << 29)
/* Value is in Gb or GB (base 10). */
- #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_GIGA \
+ #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_GIGA \
(UINT32_C(0x6) << 29)
/* Value is in 1/100th of a percentage of total bandwidth. */
#define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_PERCENT1_100 \
(UINT32_C(0x1) << 29)
/* Invalid unit */
- #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_INVALID \
+ #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_INVALID \
(UINT32_C(0x7) << 29)
#define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_LAST \
FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_INVALID
@@ -3110,7 +3140,7 @@ struct hwrm_func_cfg_input {
* for the scheduler inside the device.
*/
/* The bandwidth value. */
- #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_MASK \
+ #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_MASK \
UINT32_C(0xfffffff)
#define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_SFT 0
/* The granularity of the value (bits or bytes). */
@@ -3132,16 +3162,16 @@ struct hwrm_func_cfg_input {
#define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_KILO \
(UINT32_C(0x2) << 29)
/* Value is in bits or bytes. */
- #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_BASE \
+ #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_BASE \
(UINT32_C(0x4) << 29)
/* Value is in Gb or GB (base 10). */
- #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_GIGA \
+ #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_GIGA \
(UINT32_C(0x6) << 29)
/* Value is in 1/100th of a percentage of total bandwidth. */
#define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
(UINT32_C(0x1) << 29)
/* Invalid unit */
- #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
+ #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
(UINT32_C(0x7) << 29)
#define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_LAST \
FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID
@@ -3379,10 +3409,15 @@ struct hwrm_func_qstats_output {
*/
} __attribute__((packed));
-/* hwrm_stat_ctx_query */
-/* Description: This command returns statistics of a context. */
+/* hwrm_func_clr_stats */
+/*
+ * Description: This command clears statistics of a function. The input FID
+ * value is used to indicate what function's statistics is being cleared. This
+ * allows a physical function driver to clear statistics of virtual functions
+ * that are children of the physical function.
+ */
/* Input (24 bytes) */
-struct hwrm_stat_ctx_query_input {
+struct hwrm_func_clr_stats_input {
uint16_t req_type;
/*
* This value indicates what type of request this is. The format
@@ -3409,13 +3444,16 @@ struct hwrm_stat_ctx_query_input {
* when the request is complete. This area must be 16B aligned
* and must be cleared to zero before the request is made.
*/
- uint32_t stat_ctx_id;
- /* ID of the statistics context that is being queried. */
- uint32_t unused_0;
+ uint16_t fid;
+ /*
+ * Function ID of the function. 0xFF... (All Fs) if the query is
+ * for the requesting function.
+ */
+ uint16_t unused_0[3];
} __attribute__((packed));
-/* Output (176 bytes) */
-struct hwrm_stat_ctx_query_output {
+/* Output (16 bytes) */
+struct hwrm_func_clr_stats_output {
uint16_t error_code;
/*
* Pass/Fail or error type Note: receiver to verify the in
@@ -3431,46 +3469,6 @@ struct hwrm_stat_ctx_query_output {
* byte of the response is a valid flag that will read as '1'
* when the command has been completely written to memory.
*/
- uint64_t tx_ucast_pkts;
- /* Number of transmitted unicast packets */
- uint64_t tx_mcast_pkts;
- /* Number of transmitted multicast packets */
- uint64_t tx_bcast_pkts;
- /* Number of transmitted broadcast packets */
- uint64_t tx_err_pkts;
- /* Number of transmitted packets with error */
- uint64_t tx_drop_pkts;
- /* Number of dropped packets on transmit path */
- uint64_t tx_ucast_bytes;
- /* Number of transmitted bytes for unicast traffic */
- uint64_t tx_mcast_bytes;
- /* Number of transmitted bytes for multicast traffic */
- uint64_t tx_bcast_bytes;
- /* Number of transmitted bytes for broadcast traffic */
- uint64_t rx_ucast_pkts;
- /* Number of received unicast packets */
- uint64_t rx_mcast_pkts;
- /* Number of received multicast packets */
- uint64_t rx_bcast_pkts;
- /* Number of received broadcast packets */
- uint64_t rx_err_pkts;
- /* Number of received packets with error */
- uint64_t rx_drop_pkts;
- /* Number of dropped packets on received path */
- uint64_t rx_ucast_bytes;
- /* Number of received bytes for unicast traffic */
- uint64_t rx_mcast_bytes;
- /* Number of received bytes for multicast traffic */
- uint64_t rx_bcast_bytes;
- /* Number of received bytes for broadcast traffic */
- uint64_t rx_agg_pkts;
- /* Number of aggregated unicast packets */
- uint64_t rx_agg_bytes;
- /* Number of aggregated unicast bytes */
- uint64_t rx_agg_events;
- /* Number of aggregation events */
- uint64_t rx_agg_aborts;
- /* Number of aborted aggregations */
uint32_t unused_0;
uint8_t unused_1;
uint8_t unused_2;
@@ -3486,15 +3484,10 @@ struct hwrm_stat_ctx_query_output {
*/
} __attribute__((packed));
-/* hwrm_func_clr_stats */
-/*
- * Description: This command clears statistics of a function. The input FID
- * value is used to indicate what function's statistics is being cleared. This
- * allows a physical function driver to clear statistics of virtual functions
- * that are children of the physical function.
- */
-/* Input (24 bytes) */
-struct hwrm_func_clr_stats_input {
+/* hwrm_func_vf_vnic_ids_query */
+/* Description: This command is used to query vf vnic ids. */
+/* Input (32 bytes) */
+struct hwrm_func_vf_vnic_ids_query_input {
uint16_t req_type;
/*
* This value indicates what type of request this is. The format
@@ -3521,87 +3514,17 @@ struct hwrm_func_clr_stats_input {
* when the request is complete. This area must be 16B aligned
* and must be cleared to zero before the request is made.
*/
- uint16_t fid;
+ uint16_t vf_id;
/*
- * Function ID of the function. 0xFF... (All Fs) if the query is
- * for the requesting function.
+ * This value is used to identify a Virtual Function (VF). The
+ * scope of VF ID is local within a PF.
*/
- uint16_t unused_0[3];
-} __attribute__((packed));
-
-/* Output (16 bytes) */
-struct hwrm_func_clr_stats_output {
- uint16_t error_code;
- /*
- * Pass/Fail or error type Note: receiver to verify the in
- * parameters, and fail the call with an error when appropriate
- */
- uint16_t req_type;
- /* This field returns the type of original request. */
- uint16_t seq_id;
- /* This field provides original sequence number of the command. */
- uint16_t resp_len;
- /*
- * This field is the length of the response in bytes. The last
- * byte of the response is a valid flag that will read as '1'
- * when the command has been completely written to memory.
- */
- uint32_t unused_0;
- uint8_t unused_1;
- uint8_t unused_2;
- uint8_t unused_3;
- uint8_t valid;
- /*
- * This field is used in Output records to indicate that the
- * output is completely written to RAM. This field should be
- * read as '1' to indicate that the output has been completely
- * written. When writing a command completion or response to an
- * internal processor, the order of writes has to be such that
- * this field is written last.
- */
-} __attribute__((packed));
-
-/* hwrm_func_vf_vnic_ids_query */
-/* Description: This command is used to query vf vnic ids. */
-/* Input (32 bytes) */
-struct hwrm_func_vf_vnic_ids_query_input {
- uint16_t req_type;
- /*
- * This value indicates what type of request this is. The format
- * for the rest of the command is determined by this field.
- */
- uint16_t cmpl_ring;
- /*
- * This value indicates the what completion ring the request
- * will be optionally completed on. If the value is -1, then no
- * CR completion will be generated. Any other value must be a
- * valid CR ring_id value for this function.
- */
- uint16_t seq_id;
- /* This value indicates the command sequence number. */
- uint16_t target_id;
- /*
- * Target ID of this command. 0x0 - 0xFFF8 - Used for function
- * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
- * - HWRM
- */
- uint64_t resp_addr;
- /*
- * This is the host address where the response will be written
- * when the request is complete. This area must be 16B aligned
- * and must be cleared to zero before the request is made.
- */
- uint16_t vf_id;
- /*
- * This value is used to identify a Virtual Function (VF). The
- * scope of VF ID is local within a PF.
- */
- uint8_t unused_0;
- uint8_t unused_1;
- uint32_t max_vnic_id_cnt;
- /* Max number of vnic ids in vnic id table */
- uint64_t vnic_id_tbl_addr;
- /* This is the address for VF VNIC ID table */
+ uint8_t unused_0;
+ uint8_t unused_1;
+ uint32_t max_vnic_id_cnt;
+ /* Max number of vnic ids in vnic id table */
+ uint64_t vnic_id_tbl_addr;
+ /* This is the address for VF VNIC ID table */
} __attribute__((packed));
/* Output (16 bytes) */
@@ -3647,7 +3570,7 @@ struct hwrm_func_vf_vnic_ids_query_output {
* function driver shall use this command during the driver initialization right
* after the HWRM version discovery and default ring resources allocation.
*/
-/* Input (80 bytes) */
+/* Input (80 bytes) */
struct hwrm_func_drv_rgtr_input {
uint16_t req_type;
/*
@@ -3705,7 +3628,10 @@ struct hwrm_func_drv_rgtr_input {
*/
#define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD UINT32_C(0x10)
uint16_t os_type;
- /* This value indicates the type of OS. */
+ /*
+ * This value indicates the type of OS. The values are based on
+ * CIM_OperatingSystem.mof file as published by the DMTF.
+ */
/* Unknown */
#define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN UINT32_C(0x0)
/* Other OS not listed below. */
@@ -3753,17 +3679,17 @@ struct hwrm_func_drv_rgtr_input {
uint32_t async_event_fwd[8];
/*
* This is a 256-bit bit mask provided by the function driver
- * (PF or VF driver) to indicate the list of asynchronous event
+ * (PF or VF driver) to indicate the list of asynchronous event
* completions to be forwarded. Nth bit refers to the Nth
* event_id. Setting Nth bit to 1 by the function driver shall
* result in the HWRM forwarding asynchronous event completion
- * with event_id equal to N. If all bits are set to 0 (value of
+ * with event_id equal to N. If all bits are set to 0 (value of
* 0), then the HWRM shall not forward any asynchronous event
* completion to this function driver.
*/
} __attribute__((packed));
-/* Output (16 bytes) */
+/* Output (16 bytes) */
struct hwrm_func_drv_rgtr_output {
uint16_t error_code;
/*
@@ -3801,7 +3727,7 @@ struct hwrm_func_drv_rgtr_output {
* the HWRM. A function driver shall implement this command. A function driver
* shall use this command during the driver unloading.
*/
-/* Input (24 bytes) */
+/* Input (24 bytes) */
struct hwrm_func_drv_unrgtr_input {
uint16_t req_type;
/*
@@ -3834,11 +3760,12 @@ struct hwrm_func_drv_unrgtr_input {
* When this bit is '1', the function driver is notifying the
* HWRM to prepare for the shutdown.
*/
- #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN UINT32_C(0x1)
+ #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN \
+ UINT32_C(0x1)
uint32_t unused_0;
} __attribute__((packed));
-/* Output (16 bytes) */
+/* Output (16 bytes) */
struct hwrm_func_drv_unrgtr_output {
uint16_t error_code;
/*
@@ -4165,9 +4092,9 @@ struct hwrm_func_vf_cfg_output {
/* This field provides original sequence number of the command. */
uint16_t resp_len;
/*
- * This field is the length of the response in bytes. The last byte of
- * the response is a valid flag that will read as '1' when the command
- * has been completely written to memory.
+ * This field is the length of the response in bytes. The last
+ * byte of the response is a valid flag that will read as '1'
+ * when the command has been completely written to memory.
*/
uint32_t unused_0;
uint8_t unused_1;
@@ -4192,7 +4119,7 @@ struct hwrm_func_vf_cfg_output {
* configure PHY using this command. In a network partition mode, a PF driver
* shall not be allowed to configure PHY using this command.
*/
-/* Input (56 bytes) */
+/* Input (56 bytes) */
struct hwrm_port_phy_cfg_input {
uint16_t req_type;
/*
@@ -4232,19 +4159,8 @@ struct hwrm_port_phy_cfg_input {
* PHY configuration and settings specified in this command.
*/
#define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
- /*
- * When this bit is set to '1', the link shall be forced to be
- * taken down. # When this bit is set to '1", all other command
- * input settings related to the link speed shall be ignored.
- * Once the link state is forced down, it can be explicitly
- * cleared from that state by setting this flag to '0'. # If
- * this flag is set to '0', then the link shall be cleared from
- * forced down state if the link is in forced down state. There
- * may be conditions (e.g. out-of-band or sideband configuration
- * changes for the link) outside the scope of the HWRM
- * implementation that may clear forced down link state.
- */
- #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DOWN UINT32_C(0x2)
+ /* deprecated bit. Do not use!!! */
+ #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_DEPRECATED UINT32_C(0x2)
/*
* When this bit is set to '1', the link shall be forced to the
* force_link_speed value. When this bit is set to '1', the HWRM
@@ -4262,14 +4178,14 @@ struct hwrm_port_phy_cfg_input {
*/
#define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8)
/*
- * When this bit is set to '1', Energy Efficient Ethernet (EEE)
+ * When this bit is set to '1', Energy Efficient Ethernet (EEE)
* is requested to be enabled on this link. If EEE is not
* supported on this port, then this flag shall be ignored by
* the HWRM.
*/
#define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10)
/*
- * When this bit is set to '1', Energy Efficient Ethernet (EEE)
+ * When this bit is set to '1', Energy Efficient Ethernet (EEE)
* is requested to be disabled on this link. If EEE is not
* supported on this port, then this flag shall be ignored by
* the HWRM.
@@ -4304,35 +4220,53 @@ struct hwrm_port_phy_cfg_input {
* then this flag shall be ignored. If FEC autonegotiation is
* not supported, then the HWRM shall ignore this flag.
*/
- #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_AUTONEG_DISABLE UINT32_C(0x200)
+ #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_AUTONEG_DISABLE \
+ UINT32_C(0x200)
/*
- * When set to 1, then the HWRM shall enable FEC CLAUSE 74 (Fire
+ * When set to 1, then the HWRM shall enable FEC CLAUSE 74 (Fire
* Code) on this port if supported. When set to 0, then this
* flag shall be ignored. If FEC CLAUSE 74 is not supported,
* then the HWRM shall ignore this flag.
*/
- #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_ENABLE UINT32_C(0x400)
+ #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_ENABLE \
+ UINT32_C(0x400)
/*
* When set to 1, then the HWRM shall disable FEC CLAUSE 74
- * (Fire Code) on this port if supported. When set to 0, then
+ * (Fire Code) on this port if supported. When set to 0, then
* this flag shall be ignored. If FEC CLAUSE 74 is not
* supported, then the HWRM shall ignore this flag.
*/
- #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_DISABLE UINT32_C(0x800)
+ #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_DISABLE \
+ UINT32_C(0x800)
/*
- * When set to 1, then the HWRM shall enable FEC CLAUSE 91 (Reed
+ * When set to 1, then the HWRM shall enable FEC CLAUSE 91 (Reed
* Solomon) on this port if supported. When set to 0, then this
* flag shall be ignored. If FEC CLAUSE 91 is not supported,
* then the HWRM shall ignore this flag.
*/
- #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_ENABLE UINT32_C(0x1000)
+ #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_ENABLE \
+ UINT32_C(0x1000)
/*
* When set to 1, then the HWRM shall disable FEC CLAUSE 91
- * (Reed Solomon) on this port if supported. When set to 0, then
+ * (Reed Solomon) on this port if supported. When set to 0, then
* this flag shall be ignored. If FEC CLAUSE 91 is not
* supported, then the HWRM shall ignore this flag.
*/
- #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_DISABLE UINT32_C(0x2000)
+ #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_DISABLE \
+ UINT32_C(0x2000)
+ /*
+ * When this bit is set to '1', the link shall be forced to be
+ * taken down. # When this bit is set to '1", all other command
+ * input settings related to the link speed shall be ignored.
+ * Once the link state is forced down, it can be explicitly
+ * cleared from that state by setting this flag to '0'. # If
+ * this flag is set to '0', then the link shall be cleared from
+ * forced down state if the link is in forced down state. There
+ * may be conditions (e.g. out-of-band or sideband configuration
+ * changes for the link) outside the scope of the HWRM
+ * implementation that may clear forced down link state.
+ */
+ #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DWN UINT32_C(0x4000)
uint32_t enables;
/* This bit must be '1' for the auto_mode field to be configured. */
#define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1)
@@ -4349,7 +4283,8 @@ struct hwrm_port_phy_cfg_input {
* This bit must be '1' for the auto_link_speed_mask field to be
* configured.
*/
- #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK UINT32_C(0x10)
+ #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK \
+ UINT32_C(0x10)
/* This bit must be '1' for the wirespeed field to be configured. */
#define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIOUTPUTEED UINT32_C(0x20)
/* This bit must be '1' for the lpbk field to be configured. */
@@ -4362,7 +4297,8 @@ struct hwrm_port_phy_cfg_input {
* This bit must be '1' for the eee_link_speed_mask field to be
* configured.
*/
- #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK UINT32_C(0x200)
+ #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK \
+ UINT32_C(0x200)
/* This bit must be '1' for the tx_lpi_timer field to be configured. */
#define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400)
uint16_t port_id;
@@ -4500,34 +4436,42 @@ struct hwrm_port_phy_cfg_input {
* autoneg_mode is "mask". If unsupported speed is enabled an
* error will be generated.
*/
- /* 100Mb link speed (Half-duplex) */
- #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD UINT32_C(0x1)
- /* 100Mb link speed (Full-duplex) */
- #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB UINT32_C(0x2)
- /* 1Gb link speed (Half-duplex) */
- #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD UINT32_C(0x4)
- /* 1Gb link speed (Full-duplex) */
+ /* 100Mb link speed (Half-duplex) */
+ #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD \
+ UINT32_C(0x1)
+ /* 100Mb link speed (Full-duplex) */
+ #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB UINT32_C(0x2)
+ /* 1Gb link speed (Half-duplex) */
+ #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD UINT32_C(0x4)
+ /* 1Gb link speed (Full-duplex) */
#define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB UINT32_C(0x8)
/* 2Gb link speed */
#define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB UINT32_C(0x10)
/* 2.5Gb link speed */
- #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB UINT32_C(0x20)
+ #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB \
+ UINT32_C(0x20)
/* 10Gb link speed */
- #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB UINT32_C(0x40)
+ #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB UINT32_C(0x40)
/* 20Gb link speed */
- #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB UINT32_C(0x80)
+ #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB UINT32_C(0x80)
/* 25Gb link speed */
- #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB UINT32_C(0x100)
+ #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB \
+ UINT32_C(0x100)
/* 40Gb link speed */
- #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB UINT32_C(0x200)
+ #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB \
+ UINT32_C(0x200)
/* 50Gb link speed */
- #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB UINT32_C(0x400)
+ #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB \
+ UINT32_C(0x400)
/* 100Gb link speed */
- #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB UINT32_C(0x800)
- /* 10Mb link speed (Half-duplex) */
- #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD UINT32_C(0x1000)
- /* 10Mb link speed (Full-duplex) */
- #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB UINT32_C(0x2000)
+ #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB \
+ UINT32_C(0x800)
+ /* 10Mb link speed (Half-duplex) */
+ #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD \
+ UINT32_C(0x1000)
+ /* 10Mb link speed (Full-duplex) */
+ #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB \
+ UINT32_C(0x2000)
uint8_t wirespeed;
/* This value controls the wirespeed feature. */
/* Wirespeed feature is disabled. */
@@ -4570,7 +4514,7 @@ struct hwrm_port_phy_cfg_input {
uint32_t preemphasis;
/*
* This value controls the pre-emphasis to be used for the link.
- * Driver should not set this value (use enable.preemphasis = 0)
+ * Driver should not set this value (use enable.preemphasis = 0)
* unless driver is sure of setting. Normally HWRM FW will
* determine proper pre-emphasis.
*/
@@ -4585,16 +4529,16 @@ struct hwrm_port_phy_cfg_input {
*/
/* Reserved */
#define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
- /* 100Mb link speed (Full-duplex) */
+ /* 100Mb link speed (Full-duplex) */
#define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
/* Reserved */
#define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
- /* 1Gb link speed (Full-duplex) */
+ /* 1Gb link speed (Full-duplex) */
#define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
/* Reserved */
- #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 UINT32_C(0x10)
+ #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 UINT32_C(0x10)
/* Reserved */
- #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 UINT32_C(0x20)
+ #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 UINT32_C(0x20)
/* 10Gb link speed */
#define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB UINT32_C(0x40)
uint8_t unused_2;
@@ -4605,11 +4549,11 @@ struct hwrm_port_phy_cfg_input {
* Reuested setting of TX LPI timer in microseconds. This field
* is valid only when EEE is enabled and TX LPI is enabled.
*/
- #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK UINT32_C(0xffffff)
+ #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK UINT32_C(0xffffff)
#define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0
} __attribute__((packed));
-/* Output (16 bytes) */
+/* Output (16 bytes) */
struct hwrm_port_phy_cfg_output {
uint16_t error_code;
/*
@@ -4643,7 +4587,7 @@ struct hwrm_port_phy_cfg_output {
/* hwrm_port_phy_qcfg */
/* Description: This command queries the PHY configuration for the port. */
-/* Input (24 bytes) */
+/* Input (24 bytes) */
struct hwrm_port_phy_qcfg_input {
uint16_t req_type;
/*
@@ -4676,7 +4620,7 @@ struct hwrm_port_phy_qcfg_input {
uint16_t unused_0[3];
} __attribute__((packed));
-/* Output (96 bytes) */
+/* Output (96 bytes) */
struct hwrm_port_phy_qcfg_output {
uint16_t error_code;
/*
@@ -4754,50 +4698,47 @@ struct hwrm_port_phy_qcfg_output {
* each speed that is supported, the corrresponding bit will be
* set to '1'.
*/
- /* 100Mb link speed (Half-duplex) */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MBHD \
- UINT32_C(0x1)
- /* 100Mb link speed (Full-duplex) */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MB UINT32_C(0x2)
- /* 1Gb link speed (Half-duplex) */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GBHD UINT32_C(0x4)
- /* 1Gb link speed (Full-duplex) */
+ /* 100Mb link speed (Half-duplex) */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MBHD UINT32_C(0x1)
+ /* 100Mb link speed (Full-duplex) */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MB UINT32_C(0x2)
+ /* 1Gb link speed (Half-duplex) */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GBHD UINT32_C(0x4)
+ /* 1Gb link speed (Full-duplex) */
#define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GB UINT32_C(0x8)
/* 2Gb link speed */
#define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2GB UINT32_C(0x10)
/* 2.5Gb link speed */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2_5GB UINT32_C(0x20)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2_5GB UINT32_C(0x20)
/* 10Gb link speed */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB UINT32_C(0x40)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB UINT32_C(0x40)
/* 20Gb link speed */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_20GB UINT32_C(0x80)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_20GB UINT32_C(0x80)
/* 25Gb link speed */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_25GB UINT32_C(0x100)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_25GB UINT32_C(0x100)
/* 40Gb link speed */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_40GB UINT32_C(0x200)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_40GB UINT32_C(0x200)
/* 50Gb link speed */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_50GB UINT32_C(0x400)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_50GB UINT32_C(0x400)
/* 100Gb link speed */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB UINT32_C(0x800)
- /* 10Mb link speed (Half-duplex) */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB UINT32_C(0x800)
+ /* 10Mb link speed (Half-duplex) */
#define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MBHD UINT32_C(0x1000)
- /* 10Mb link speed (Full-duplex) */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MB UINT32_C(0x2000)
+ /* 10Mb link speed (Full-duplex) */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MB UINT32_C(0x2000)
uint16_t force_link_speed;
/*
* Current setting of forced link speed. When the link speed is
* not being forced, this value shall be set to 0.
*/
/* 100Mb link speed */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100MB \
- UINT32_C(0x1)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100MB UINT32_C(0x1)
/* 1Gb link speed */
#define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_1GB UINT32_C(0xa)
/* 2Gb link speed */
#define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2GB UINT32_C(0x14)
/* 2.5Gb link speed */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2_5GB \
- UINT32_C(0x19)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2_5GB UINT32_C(0x19)
/* 10Gb link speed */
#define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10GB UINT32_C(0x64)
/* 20Mb link speed */
@@ -4805,14 +4746,13 @@ struct hwrm_port_phy_qcfg_output {
/* 25Gb link speed */
#define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_25GB UINT32_C(0xfa)
/* 40Gb link speed */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_40GB UINT32_C(0x190)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_40GB UINT32_C(0x190)
/* 50Gb link speed */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_50GB UINT32_C(0x1f4)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_50GB UINT32_C(0x1f4)
/* 100Gb link speed */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100GB \
- UINT32_C(0x3e8)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100GB UINT32_C(0x3e8)
/* 10Mb link speed */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10MB UINT32_C(0xffff)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10MB UINT32_C(0xffff)
uint8_t auto_mode;
/* Current setting of auto negotiation mode. */
/*
@@ -4834,8 +4774,7 @@ struct hwrm_port_phy_qcfg_output {
* DEPRECATED. An HWRM client should not use
* this mode.
*/
- #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_OR_BELOW \
- UINT32_C(0x3)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_OR_BELOW UINT32_C(0x3)
/*
* Select the speeds based on the corresponding
* link speed mask value that is provided.
@@ -4869,8 +4808,7 @@ struct hwrm_port_phy_qcfg_output {
* set to 1, auto_pause bits should be ignored and should be set
* to 0.
*/
- #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_AUTONEG_PAUSE \
- UINT32_C(0x4)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
uint16_t auto_link_speed;
/*
* Current setting for auto_link_speed. This field is only valid
@@ -4895,9 +4833,9 @@ struct hwrm_port_phy_qcfg_output {
/* 50Gb link speed */
#define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_50GB UINT32_C(0x1f4)
/* 100Gb link speed */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100GB UINT32_C(0x3e8)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100GB UINT32_C(0x3e8)
/* 10Mb link speed */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10MB UINT32_C(0xffff)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10MB UINT32_C(0xffff)
uint16_t auto_link_speed_mask;
/*
* Current setting for auto_link_speed_mask that is used to
@@ -4906,23 +4844,22 @@ struct hwrm_port_phy_qcfg_output {
* in this field shall be a subset of supported speeds on this
* port.
*/
- /* 100Mb link speed (Half-duplex) */
+ /* 100Mb link speed (Half-duplex) */
#define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MBHD \
UINT32_C(0x1)
- /* 100Mb link speed (Full-duplex) */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MB \
+ /* 100Mb link speed (Full-duplex) */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MB \
UINT32_C(0x2)
- /* 1Gb link speed (Half-duplex) */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GBHD \
+ /* 1Gb link speed (Half-duplex) */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GBHD \
UINT32_C(0x4)
- /* 1Gb link speed (Full-duplex) */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GB \
- UINT32_C(0x8)
+ /* 1Gb link speed (Full-duplex) */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GB UINT32_C(0x8)
/* 2Gb link speed */
#define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2GB \
UINT32_C(0x10)
/* 2.5Gb link speed */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2_5GB \
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2_5GB \
UINT32_C(0x20)
/* 10Gb link speed */
#define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10GB \
@@ -4940,12 +4877,12 @@ struct hwrm_port_phy_qcfg_output {
#define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_50GB \
UINT32_C(0x400)
/* 100Gb link speed */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100GB \
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100GB \
UINT32_C(0x800)
- /* 10Mb link speed (Half-duplex) */
+ /* 10Mb link speed (Half-duplex) */
#define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MBHD \
UINT32_C(0x1000)
- /* 10Mb link speed (Full-duplex) */
+ /* 10Mb link speed (Full-duplex) */
#define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MB \
UINT32_C(0x2000)
uint8_t wirespeed;
@@ -4994,18 +4931,16 @@ struct hwrm_port_phy_qcfg_output {
/* Module is inserted and accepted */
#define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NONE UINT32_C(0x0)
/* Module is rejected and transmit side Laser is disabled. */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_DISABLETX \
- UINT32_C(0x1)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_DISABLETX UINT32_C(0x1)
/* Module mismatch warning. */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_WARNINGMSG \
- UINT32_C(0x2)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_WARNINGMSG UINT32_C(0x2)
/* Module is rejected and powered down. */
#define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_PWRDOWN UINT32_C(0x3)
/* Module is not inserted. */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTINSERTED \
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTINSERTED \
UINT32_C(0x4)
/* Module status is not applicable. */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTAPPLICABLE \
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTAPPLICABLE \
UINT32_C(0xff)
uint32_t preemphasis;
/* Current setting for preemphasis. */
@@ -5021,13 +4956,13 @@ struct hwrm_port_phy_qcfg_output {
#define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_UNKNOWN UINT32_C(0x0)
/* BASE-CR */
#define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR UINT32_C(0x1)
- /* BASE-KR4 (Deprecated) */
+ /* BASE-KR4 (Deprecated) */
#define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR4 UINT32_C(0x2)
/* BASE-LR */
#define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASELR UINT32_C(0x3)
/* BASE-SR */
#define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR UINT32_C(0x4)
- /* BASE-KR2 (Deprecated) */
+ /* BASE-KR2 (Deprecated) */
#define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR2 UINT32_C(0x5)
/* BASE-KX */
#define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKX UINT32_C(0x6)
@@ -5039,6 +4974,35 @@ struct hwrm_port_phy_qcfg_output {
#define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASETE UINT32_C(0x9)
/* SGMII connected external PHY */
#define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_SGMIIEXTPHY UINT32_C(0xa)
+ /* 25G_BASECR_CA_L */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_L UINT32_C(0xb)
+ /* 25G_BASECR_CA_S */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_S UINT32_C(0xc)
+ /* 25G_BASECR_CA_N */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_N UINT32_C(0xd)
+ /* 25G_BASESR */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASESR UINT32_C(0xe)
+ /* 100G_BASECR4 */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASECR4 UINT32_C(0xf)
+ /* 100G_BASESR4 */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASESR4 UINT32_C(0x10)
+ /* 100G_BASELR4 */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASELR4 UINT32_C(0x11)
+ /* 100G_BASEER4 */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASEER4 UINT32_C(0x12)
+ /* 100G_BASESR10 */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASESR10 UINT32_C(0x13)
+ /* 40G_BASECR4 */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASECR4 UINT32_C(0x14)
+ /* 40G_BASESR4 */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASESR4 UINT32_C(0x15)
+ /* 40G_BASELR4 */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASELR4 UINT32_C(0x16)
+ /* 40G_BASEER4 */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASEER4 UINT32_C(0x17)
+ /* 40G_ACTIVE_CABLE */
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_ACTIVE_CABLE \
+ UINT32_C(0x18)
uint8_t media_type;
/* This value represents a media type. */
/* Unknown */
@@ -5052,35 +5016,34 @@ struct hwrm_port_phy_qcfg_output {
uint8_t xcvr_pkg_type;
/* This value represents a transceiver type. */
/* PHY and MAC are in the same package */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_INTERNAL \
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_INTERNAL \
UINT32_C(0x1)
/* PHY and MAC are in different packages */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_EXTERNAL \
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_EXTERNAL \
UINT32_C(0x2)
uint8_t eee_config_phy_addr;
/*
* This field represents flags related to EEE configuration.
* These EEE configuration flags are valid only when the
- * auto_mode is not set to none (in other words autonegotiation
+ * auto_mode is not set to none (in other words autonegotiation
* is enabled).
*/
/* This field represents PHY address. */
#define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_MASK UINT32_C(0x1f)
#define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_SFT 0
/*
- * When set to 1, Energy Efficient Ethernet (EEE) mode is
+ * When set to 1, Energy Efficient Ethernet (EEE) mode is
* enabled. Speeds for autoneg with EEE mode enabled are based
* on eee_link_speed_mask.
*/
- #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ENABLED \
- UINT32_C(0x20)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ENABLED UINT32_C(0x20)
/*
* This flag is valid only when eee_enabled is set to 1. # If
* eee_enabled is set to 0, then EEE mode is disabled and this
* flag shall be ignored. # If eee_enabled is set to 1 and this
- * flag is set to 1, then Energy Efficient Ethernet (EEE) mode
+ * flag is set to 1, then Energy Efficient Ethernet (EEE) mode
* is enabled and in use. # If eee_enabled is set to 1 and this
- * flag is set to 0, then Energy Efficient Ethernet (EEE) mode
+ * flag is set to 0, then Energy Efficient Ethernet (EEE) mode
* is enabled but is currently not in use.
*/
#define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ACTIVE UINT32_C(0x40)
@@ -5088,16 +5051,16 @@ struct hwrm_port_phy_qcfg_output {
* This flag is valid only when eee_enabled is set to 1. # If
* eee_enabled is set to 0, then EEE mode is disabled and this
* flag shall be ignored. # If eee_enabled is set to 1 and this
- * flag is set to 1, then Energy Efficient Ethernet (EEE) mode
+ * flag is set to 1, then Energy Efficient Ethernet (EEE) mode
* is enabled and TX LPI is enabled. # If eee_enabled is set to
* 1 and this flag is set to 0, then Energy Efficient Ethernet
- * (EEE) mode is enabled but TX LPI is disabled.
+ * (EEE) mode is enabled but TX LPI is disabled.
*/
#define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_TX_LPI UINT32_C(0x80)
/*
* This field represents flags related to EEE configuration.
* These EEE configuration flags are valid only when the
- * auto_mode is not set to none (in other words autonegotiation
+ * auto_mode is not set to none (in other words autonegotiation
* is enabled).
*/
#define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_MASK UINT32_C(0xe0)
@@ -5119,16 +5082,16 @@ struct hwrm_port_phy_qcfg_output {
* The advertised speeds for the port by the link partner. Each
* advertised speed will be set to '1'.
*/
- /* 100Mb link speed (Half-duplex) */
+ /* 100Mb link speed (Half-duplex) */
#define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MBHD \
UINT32_C(0x1)
- /* 100Mb link speed (Full-duplex) */
+ /* 100Mb link speed (Full-duplex) */
#define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MB \
UINT32_C(0x2)
- /* 1Gb link speed (Half-duplex) */
+ /* 1Gb link speed (Half-duplex) */
#define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GBHD \
UINT32_C(0x4)
- /* 1Gb link speed (Full-duplex) */
+ /* 1Gb link speed (Full-duplex) */
#define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GB \
UINT32_C(0x8)
/* 2Gb link speed */
@@ -5155,10 +5118,10 @@ struct hwrm_port_phy_qcfg_output {
/* 100Gb link speed */
#define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100GB \
UINT32_C(0x800)
- /* 10Mb link speed (Half-duplex) */
+ /* 10Mb link speed (Half-duplex) */
#define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MBHD \
UINT32_C(0x1000)
- /* 10Mb link speed (Full-duplex) */
+ /* 10Mb link speed (Full-duplex) */
#define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MB \
UINT32_C(0x2000)
uint8_t link_partner_adv_auto_mode;
@@ -5175,13 +5138,14 @@ struct hwrm_port_phy_qcfg_output {
/* Select all possible speeds for autoneg mode. */
#define \
HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ALL_SPEEDS \
- UINT32_C(0x1)
+ UINT32_C(0x1)
/*
* Select only the auto_link_speed speed for
* autoneg mode. This mode has been DEPRECATED.
* An HWRM client should not use this mode.
*/
- #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_SPEED \
+ #define \
+ HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_SPEED \
UINT32_C(0x2)
/*
* Select the auto_link_speed or any speed below
@@ -5191,14 +5155,14 @@ struct hwrm_port_phy_qcfg_output {
*/
#define \
HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_OR_BELOW \
- UINT32_C(0x3)
+ UINT32_C(0x3)
/*
* Select the speeds based on the corresponding
* link speed mask value that is provided.
*/
#define \
HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_SPEED_MASK \
- UINT32_C(0x4)
+ UINT32_C(0x4)
uint8_t link_partner_adv_pause;
/* The advertised pause settings on the port by the link partner. */
/*
@@ -5224,13 +5188,13 @@ struct hwrm_port_phy_qcfg_output {
/* Reserved */
#define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
UINT32_C(0x1)
- /* 100Mb link speed (Full-duplex) */
+ /* 100Mb link speed (Full-duplex) */
#define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_100MB \
UINT32_C(0x2)
/* Reserved */
#define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
UINT32_C(0x4)
- /* 1Gb link speed (Full-duplex) */
+ /* 1Gb link speed (Full-duplex) */
#define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_1GB \
UINT32_C(0x8)
/* Reserved */
@@ -5251,31 +5215,31 @@ struct hwrm_port_phy_qcfg_output {
/* Reserved */
#define \
HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
- UINT32_C(0x1)
- /* 100Mb link speed (Full-duplex) */
+ UINT32_C(0x1)
+ /* 100Mb link speed (Full-duplex) */
#define \
HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_100MB \
- UINT32_C(0x2)
+ UINT32_C(0x2)
/* Reserved */
#define \
HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
- UINT32_C(0x4)
- /* 1Gb link speed (Full-duplex) */
+ UINT32_C(0x4)
+ /* 1Gb link speed (Full-duplex) */
#define \
HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_1GB \
- UINT32_C(0x8)
+ UINT32_C(0x8)
/* Reserved */
#define \
HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD3 \
- UINT32_C(0x10)
+ UINT32_C(0x10)
/* Reserved */
#define \
HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD4 \
- UINT32_C(0x20)
+ UINT32_C(0x20)
/* 10Gb link speed */
#define \
HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_10GB \
- UINT32_C(0x40)
+ UINT32_C(0x40)
uint32_t xcvr_identifier_type_tx_lpi_timer;
/* This value represents transceiver identifier type. */
/*
@@ -5283,32 +5247,31 @@ struct hwrm_port_phy_qcfg_output {
* is valid only when_eee_enabled flag is set to 1 and
* tx_lpi_enabled is set to 1.
*/
- #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_MASK \
- UINT32_C(0xffffff)
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_MASK UINT32_C(0xffffff)
#define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_SFT 0
/* This value represents transceiver identifier type. */
#define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_MASK \
UINT32_C(0xff000000)
#define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFT 24
/* Unknown */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_UNKNOWN \
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_UNKNOWN \
(UINT32_C(0x0) << 24)
/* SFP/SFP+/SFP28 */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFP \
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFP \
(UINT32_C(0x3) << 24)
/* QSFP */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP \
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP \
(UINT32_C(0xc) << 24)
/* QSFP+ */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFPPLUS \
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFPPLUS \
(UINT32_C(0xd) << 24)
/* QSFP28 */
- #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP28 \
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP28 \
(UINT32_C(0x11) << 24)
uint16_t fec_cfg;
/*
* This value represents the current configuration of Forward
- * Error Correction (FEC) on the port.
+ * Error Correction (FEC) on the port.
*/
/*
* When set to 1, then FEC is not supported on this port. If
@@ -5319,7 +5282,7 @@ struct hwrm_port_phy_qcfg_output {
* then the HWRM shall set this flag to 1 when reporting FEC
* capability.
*/
- #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_NONE_SUPPORTED \
+ #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_NONE_SUPPORTED \
UINT32_C(0x1)
/*
* When set to 1, then FEC autonegotiation is supported on this
@@ -5337,30 +5300,30 @@ struct hwrm_port_phy_qcfg_output {
#define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_AUTONEG_ENABLED \
UINT32_C(0x4)
/*
- * When set to 1, then FEC CLAUSE 74 (Fire Code) is supported on
- * this port. When set to 0, then FEC CLAUSE 74 (Fire Code) is
+ * When set to 1, then FEC CLAUSE 74 (Fire Code) is supported on
+ * this port. When set to 0, then FEC CLAUSE 74 (Fire Code) is
* not supported on this port.
*/
#define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE74_SUPPORTED \
UINT32_C(0x8)
/*
- * When set to 1, then FEC CLAUSE 74 (Fire Code) is enabled on
- * this port. When set to 0, then FEC CLAUSE 74 (Fire Code) is
+ * When set to 1, then FEC CLAUSE 74 (Fire Code) is enabled on
+ * this port. When set to 0, then FEC CLAUSE 74 (Fire Code) is
* disabled if supported. This flag should be ignored if FEC
* CLAUSE 74 is not supported on this port.
*/
#define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE74_ENABLED \
UINT32_C(0x10)
/*
- * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is supported
- * on this port. When set to 0, then FEC CLAUSE 91 (Reed
+ * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is supported
+ * on this port. When set to 0, then FEC CLAUSE 91 (Reed
* Solomon) is not supported on this port.
*/
#define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE91_SUPPORTED \
UINT32_C(0x20)
/*
- * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is enabled
- * on this port. When set to 0, then FEC CLAUSE 91 (Reed
+ * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is enabled
+ * on this port. When set to 0, then FEC CLAUSE 91 (Reed
* Solomon) is disabled if supported. This flag should be
* ignored if FEC CLAUSE 91 is not supported on this port.
*/
@@ -5545,7 +5508,6 @@ struct hwrm_port_clr_stats_output {
*/
} __attribute__((packed));
-
/* hwrm_queue_qportcfg */
/*
* Description: This function is called by a driver to query queue configuration
@@ -5557,7 +5519,7 @@ struct hwrm_port_clr_stats_output {
* then the driver shall only use queues for which service profiles are pre-
* configured.
*/
-/* Input (24 bytes) */
+/* Input (24 bytes) */
struct hwrm_queue_qportcfg_input {
uint16_t req_type;
/*
@@ -5596,7 +5558,7 @@ struct hwrm_queue_qportcfg_input {
#define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX UINT32_C(0x0)
/* rx path */
#define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX UINT32_C(0x1)
- #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \
+ #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \
QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX
uint16_t port_id;
/*
@@ -5606,7 +5568,7 @@ struct hwrm_queue_qportcfg_input {
uint16_t unused_0;
} __attribute__((packed));
-/* Output (32 bytes) */
+/* Output (32 bytes) */
struct hwrm_queue_qportcfg_output {
uint16_t error_code;
/*
@@ -5655,18 +5617,18 @@ struct hwrm_queue_qportcfg_output {
* TX side is the same as the corresponding queue configuration
* on the RX side.
*/
- #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_CFG_INFO_ASYM_CFG \
- UINT32_C(0x1)
+ #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_CFG_INFO_ASYM_CFG UINT32_C(0x1)
uint8_t queue_pfcenable_cfg_allowed;
/*
* Bitmask indicating which queues can be configured by the
* hwrm_queue_pfcenable_cfg command. Each bit represents a
- * specific queue where bit 0 represents queue 0 and bit 7
- * represents queue 7. # A value of 0 indicates that the queue
- * is not configurable by the hwrm_queue_pfcenable_cfg command.
- * # A value of 1 indicates that the queue is configurable. # A
- * hwrm_queue_pfcenable_cfg command shall return error when
- * trying to configure a queue that is not configurable.
+ * specific priority where bit 0 represents priority 0 and bit 7
+ * represents priority 7. # A value of 0 indicates that the
+ * priority is not configurable by the hwrm_queue_pfcenable_cfg
+ * command. # A value of 1 indicates that the priority is
+ * configurable. # A hwrm_queue_pfcenable_cfg command shall
+ * return error when trying to configure a priority that is not
+ * configurable.
*/
uint8_t queue_pri2cos_cfg_allowed;
/*
@@ -5702,14 +5664,14 @@ struct hwrm_queue_qportcfg_output {
*/
uint8_t queue_id0_service_profile;
/* This value is applicable to CoS queues only. */
- /* Lossy (best-effort) */
+ /* Lossy (best-effort) */
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY \
UINT32_C(0x0)
/* Lossless */
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS \
UINT32_C(0x1)
/*
- * Set to 0xFF... (All Fs) if there is no
+ * Set to 0xFF... (All Fs) if there is no
* service profile specified
*/
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN \
@@ -5726,14 +5688,14 @@ struct hwrm_queue_qportcfg_output {
*/
uint8_t queue_id1_service_profile;
/* This value is applicable to CoS queues only. */
- /* Lossy (best-effort) */
+ /* Lossy (best-effort) */
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY \
UINT32_C(0x0)
/* Lossless */
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS \
UINT32_C(0x1)
/*
- * Set to 0xFF... (All Fs) if there is no
+ * Set to 0xFF... (All Fs) if there is no
* service profile specified
*/
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN \
@@ -5750,14 +5712,14 @@ struct hwrm_queue_qportcfg_output {
*/
uint8_t queue_id2_service_profile;
/* This value is applicable to CoS queues only. */
- /* Lossy (best-effort) */
+ /* Lossy (best-effort) */
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY \
UINT32_C(0x0)
/* Lossless */
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS \
UINT32_C(0x1)
/*
- * Set to 0xFF... (All Fs) if there is no
+ * Set to 0xFF... (All Fs) if there is no
* service profile specified
*/
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN \
@@ -5774,14 +5736,14 @@ struct hwrm_queue_qportcfg_output {
*/
uint8_t queue_id3_service_profile;
/* This value is applicable to CoS queues only. */
- /* Lossy (best-effort) */
+ /* Lossy (best-effort) */
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY \
UINT32_C(0x0)
/* Lossless */
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS \
UINT32_C(0x1)
/*
- * Set to 0xFF... (All Fs) if there is no
+ * Set to 0xFF... (All Fs) if there is no
* service profile specified
*/
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN \
@@ -5798,14 +5760,14 @@ struct hwrm_queue_qportcfg_output {
*/
uint8_t queue_id4_service_profile;
/* This value is applicable to CoS queues only. */
- /* Lossy (best-effort) */
+ /* Lossy (best-effort) */
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY \
UINT32_C(0x0)
/* Lossless */
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS \
UINT32_C(0x1)
/*
- * Set to 0xFF... (All Fs) if there is no
+ * Set to 0xFF... (All Fs) if there is no
* service profile specified
*/
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN \
@@ -5822,14 +5784,14 @@ struct hwrm_queue_qportcfg_output {
*/
uint8_t queue_id5_service_profile;
/* This value is applicable to CoS queues only. */
- /* Lossy (best-effort) */
+ /* Lossy (best-effort) */
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY \
UINT32_C(0x0)
/* Lossless */
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS \
UINT32_C(0x1)
/*
- * Set to 0xFF... (All Fs) if there is no
+ * Set to 0xFF... (All Fs) if there is no
* service profile specified
*/
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN \
@@ -5846,14 +5808,14 @@ struct hwrm_queue_qportcfg_output {
*/
uint8_t queue_id6_service_profile;
/* This value is applicable to CoS queues only. */
- /* Lossy (best-effort) */
+ /* Lossy (best-effort) */
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY \
UINT32_C(0x0)
/* Lossless */
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS \
UINT32_C(0x1)
/*
- * Set to 0xFF... (All Fs) if there is no
+ * Set to 0xFF... (All Fs) if there is no
* service profile specified
*/
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN \
@@ -5870,14 +5832,14 @@ struct hwrm_queue_qportcfg_output {
*/
uint8_t queue_id7_service_profile;
/* This value is applicable to CoS queues only. */
- /* Lossy (best-effort) */
+ /* Lossy (best-effort) */
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY \
UINT32_C(0x0)
/* Lossless */
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS \
UINT32_C(0x1)
/*
- * Set to 0xFF... (All Fs) if there is no
+ * Set to 0xFF... (All Fs) if there is no
* service profile specified
*/
#define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN \
@@ -5910,7 +5872,7 @@ struct hwrm_queue_qportcfg_output {
* enabled, then the internal VNIC to SVIF mapping data structures shall be
* programmed at the time of VNIC allocation.
*/
-/* Input (24 bytes) */
+/* Input (24 bytes) */
struct hwrm_vnic_alloc_input {
uint16_t req_type;
/*
@@ -5947,7 +5909,7 @@ struct hwrm_vnic_alloc_input {
uint32_t unused_0;
} __attribute__((packed));
-/* Output (16 bytes) */
+/* Output (16 bytes) */
struct hwrm_vnic_alloc_output {
uint16_t error_code;
/*
@@ -5986,7 +5948,7 @@ struct hwrm_vnic_alloc_output {
* VNIC as well as the VNIC. Reset and release all resources associated with the
* VNIC.
*/
-/* Input (24 bytes) */
+/* Input (24 bytes) */
struct hwrm_vnic_free_input {
uint16_t req_type;
/*
@@ -6019,7 +5981,7 @@ struct hwrm_vnic_free_input {
uint32_t unused_0;
} __attribute__((packed));
-/* Output (16 bytes) */
+/* Output (16 bytes) */
struct hwrm_vnic_free_output {
uint16_t error_code;
/*
@@ -6053,7 +6015,7 @@ struct hwrm_vnic_free_output {
/* hwrm_vnic_cfg */
/* Description: Configure the RX VNIC structure. */
-/* Input (40 bytes) */
+/* Input (40 bytes) */
struct hwrm_vnic_cfg_input {
uint16_t req_type;
/*
@@ -6113,10 +6075,10 @@ struct hwrm_vnic_cfg_input {
* roce_dual_vnic_mode flag is set to '1', then the HWRM client
* shall not set this flag to '1'.
*/
- #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
+ #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
/*
* When a VNIC uses one destination ring group for certain
- * application (e.g. Receive Flow Steering) where exact match is
+ * application (e.g. Receive Flow Steering) where exact match is
* used to direct packets to a VNIC with one destination ring
* group only, there is no need to configure RSS indirection
* table for that VNIC as only one destination ring group is
@@ -6152,17 +6114,17 @@ struct hwrm_vnic_cfg_input {
*/
uint16_t rss_rule;
/*
- * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if
+ * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if
* there is no RSS rule.
*/
uint16_t cos_rule;
/*
- * RSS ID for COS rule/table structure. 0xFF... (All Fs) if
+ * RSS ID for COS rule/table structure. 0xFF... (All Fs) if
* there is no COS rule.
*/
uint16_t lb_rule;
/*
- * RSS ID for load balancing rule/table structure. 0xFF... (All
+ * RSS ID for load balancing rule/table structure. 0xFF... (All
* Fs) if there is no LB rule.
*/
uint16_t mru;
@@ -6176,7 +6138,7 @@ struct hwrm_vnic_cfg_input {
uint32_t unused_0;
} __attribute__((packed));
-/* Output (16 bytes) */
+/* Output (16 bytes) */
struct hwrm_vnic_cfg_output {
uint16_t error_code;
/*
@@ -6354,7 +6316,7 @@ struct hwrm_vnic_qcfg_output {
/* hwrm_vnic_rss_cfg */
/* Description: This function is used to enable RSS configuration. */
-/* Input (48 bytes) */
+/* Input (48 bytes) */
struct hwrm_vnic_rss_cfg_input {
uint16_t req_type;
/*
@@ -6427,7 +6389,7 @@ struct hwrm_vnic_rss_cfg_input {
uint16_t unused_1[3];
} __attribute__((packed));
-/* Output (16 bytes) */
+/* Output (16 bytes) */
struct hwrm_vnic_rss_cfg_output {
uint16_t error_code;
/*
@@ -6746,10 +6708,8 @@ struct hwrm_vnic_plcmodes_qcfg_output {
} __attribute__((packed));
/* hwrm_vnic_rss_cos_lb_ctx_alloc */
-/*
- * Description: This function is used to allocate COS/Load Balance context.
- */
-/* Input (16 bytes) */
+/* Description: This function is used to allocate COS/Load Balance context. */
+/* Input (16 bytes) */
struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
uint16_t req_type;
/*
@@ -6779,7 +6739,7 @@ struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
*/
} __attribute__((packed));
-/* Output (16 bytes) */
+/* Output (16 bytes) */
struct hwrm_vnic_rss_cos_lb_ctx_alloc_output {
uint16_t error_code;
/*
@@ -6816,7 +6776,7 @@ struct hwrm_vnic_rss_cos_lb_ctx_alloc_output {
/* hwrm_vnic_rss_cos_lb_ctx_free */
/* Description: This function can be used to free COS/Load Balance context. */
-/* Input (24 bytes) */
+/* Input (24 bytes) */
struct hwrm_vnic_rss_cos_lb_ctx_free_input {
uint16_t req_type;
/*
@@ -6849,7 +6809,7 @@ struct hwrm_vnic_rss_cos_lb_ctx_free_input {
uint16_t unused_0[3];
} __attribute__((packed));
-/* Output (16 bytes) */
+/* Output (16 bytes) */
struct hwrm_vnic_rss_cos_lb_ctx_free_output {
uint16_t error_code;
/*
@@ -7057,11 +7017,12 @@ struct hwrm_vnic_tpa_cfg_output {
*/
} __attribute__((packed));
+
/* hwrm_ring_alloc */
/*
* Description: This command allocates and does basic preparation for a ring.
*/
-/* Input (80 bytes) */
+/* Input (80 bytes) */
struct hwrm_ring_alloc_input {
uint16_t req_type;
/*
@@ -7107,12 +7068,14 @@ struct hwrm_ring_alloc_input {
#define HWRM_RING_ALLOC_INPUT_ENABLES_MAX_BW_VALID UINT32_C(0x20)
uint8_t ring_type;
/* Ring Type. */
- /* Completion Ring (CR) */
- #define HWRM_RING_ALLOC_INPUT_RING_TYPE_CMPL UINT32_C(0x0)
- /* TX Ring (TR) */
+ /* L2 Completion Ring (CR) */
+ #define HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL UINT32_C(0x0)
+ /* TX Ring (TR) */
#define HWRM_RING_ALLOC_INPUT_RING_TYPE_TX UINT32_C(0x1)
- /* RX Ring (RR) */
+ /* RX Ring (RR) */
#define HWRM_RING_ALLOC_INPUT_RING_TYPE_RX UINT32_C(0x2)
+ /* RoCE Notification Completion Ring (ROCE_CR) */
+ #define HWRM_RING_ALLOC_INPUT_RING_TYPE_ROCE_CMPL UINT32_C(0x3)
uint8_t unused_0;
uint16_t unused_1;
uint64_t page_tbl_addr;
@@ -7175,23 +7138,22 @@ struct hwrm_ring_alloc_input {
* a TX ring.
*/
/* Arbitration policy used for the ring. */
- #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_MASK \
- UINT32_C(0xf)
+ #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_MASK UINT32_C(0xf)
#define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_SFT 0
/*
* Use strict priority for the TX ring. Priority
* value is specified in arb_policy_param
*/
- #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_SP \
+ #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_SP \
(UINT32_C(0x1) << 0)
/*
* Use weighted fair queue arbitration for the
* TX ring. Weight is specified in
* arb_policy_param
*/
- #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_WFQ \
+ #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_WFQ \
(UINT32_C(0x2) << 0)
- #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_LAST \
+ #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_LAST \
RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_WFQ
/* Reserved field. */
#define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_RSVD_MASK UINT32_C(0xf0)
@@ -7208,7 +7170,7 @@ struct hwrm_ring_alloc_input {
*/
#define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_PARAM_MASK \
UINT32_C(0xff00)
- #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_PARAM_SFT 8
+ #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_PARAM_SFT 8
uint8_t unused_6;
uint8_t unused_7;
uint32_t reserved3;
@@ -7228,26 +7190,40 @@ struct hwrm_ring_alloc_input {
* translate this value into byte counter and time interval used
* for this ring inside the device.
*/
- /* Bandwidth value */
- #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_MASK \
- UINT32_C(0xfffffff)
+ /* The bandwidth value. */
+ #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
#define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_SFT 0
- /* Reserved */
- #define HWRM_RING_ALLOC_INPUT_MAX_BW_RSVD UINT32_C(0x10000000)
+ /* The granularity of the value (bits or bytes). */
+ #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE UINT32_C(0x10000000)
+ /* Value is in bits. */
+ #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE_BITS (UINT32_C(0x0) << 28)
+ /* Value is in bytes. */
+ #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE_BYTES (UINT32_C(0x1) << 28)
+ #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE_LAST \
+ RING_ALLOC_INPUT_MAX_BW_SCALE_BYTES
/* bw_value_unit is 3 b */
#define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_MASK \
UINT32_C(0xe0000000)
#define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_SFT 29
- /* Value is in Mbps */
- #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_MBPS \
+ /* Value is in Mb or MB (base 10). */
+ #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_MEGA \
(UINT32_C(0x0) << 29)
+ /* Value is in Kb or KB (base 10). */
+ #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_KILO \
+ (UINT32_C(0x2) << 29)
+ /* Value is in bits or bytes. */
+ #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_BASE \
+ (UINT32_C(0x4) << 29)
+ /* Value is in Gb or GB (base 10). */
+ #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_GIGA \
+ (UINT32_C(0x6) << 29)
/* Value is in 1/100th of a percentage of total bandwidth. */
- #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
+ #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
(UINT32_C(0x1) << 29)
/* Invalid unit */
- #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
+ #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
(UINT32_C(0x7) << 29)
- #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_LAST \
+ #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_LAST \
RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID
uint8_t int_mode;
/*
@@ -7267,7 +7243,7 @@ struct hwrm_ring_alloc_input {
uint8_t unused_8[3];
} __attribute__((packed));
-/* Output (16 bytes) */
+/* Output (16 bytes) */
struct hwrm_ring_alloc_output {
uint16_t error_code;
/*
@@ -7308,8 +7284,16 @@ struct hwrm_ring_alloc_output {
/* hwrm_ring_free */
/*
* Description: This command is used to free a ring and associated resources.
+ * With QoS and DCBx agents, it is possible the traffic classes will be moved
+ * from one CoS queue to another. When this occurs, the driver shall call
+ * 'hwrm_ring_free' to free the allocated rings and then call 'hwrm_ring_alloc'
+ * to re-allocate each ring and assign it to a new CoS queue. hwrm_ring_free
+ * shall be called on a ring only after it has been idle for 500ms or more and
+ * no frames have been posted to the ring during this time. All frames queued
+ * for transmission shall be completed and at least 500ms time elapsed from the
+ * last completion before calling this command.
*/
-/* Input (24 bytes) */
+/* Input (24 bytes) */
struct hwrm_ring_free_input {
uint16_t req_type;
/*
@@ -7339,19 +7323,21 @@ struct hwrm_ring_free_input {
*/
uint8_t ring_type;
/* Ring Type. */
- /* Completion Ring (CR) */
- #define HWRM_RING_FREE_INPUT_RING_TYPE_CMPL UINT32_C(0x0)
- /* TX Ring (TR) */
+ /* L2 Completion Ring (CR) */
+ #define HWRM_RING_FREE_INPUT_RING_TYPE_L2_CMPL UINT32_C(0x0)
+ /* TX Ring (TR) */
#define HWRM_RING_FREE_INPUT_RING_TYPE_TX UINT32_C(0x1)
- /* RX Ring (RR) */
+ /* RX Ring (RR) */
#define HWRM_RING_FREE_INPUT_RING_TYPE_RX UINT32_C(0x2)
+ /* RoCE Notification Completion Ring (ROCE_CR) */
+ #define HWRM_RING_FREE_INPUT_RING_TYPE_ROCE_CMPL UINT32_C(0x3)
uint8_t unused_0;
uint16_t ring_id;
/* Physical number of ring allocated. */
uint32_t unused_1;
} __attribute__((packed));
-/* Output (16 bytes) */
+/* Output (16 bytes) */
struct hwrm_ring_free_output {
uint16_t error_code;
/*
@@ -7387,7 +7373,7 @@ struct hwrm_ring_free_output {
/*
* Description: This API allocates and does basic preparation for a ring group.
*/
-/* Input (24 bytes) */
+/* Input (24 bytes) */
struct hwrm_ring_grp_alloc_input {
uint16_t req_type;
/*
@@ -7422,7 +7408,7 @@ struct hwrm_ring_grp_alloc_input {
uint16_t ar;
/*
* This value identifies the aggregation RR associated with the
- * ring group. If this value is 0xFF... (All Fs), then no
+ * ring group. If this value is 0xFF... (All Fs), then no
* Aggregation ring will be set.
*/
uint16_t sc;
@@ -7432,7 +7418,7 @@ struct hwrm_ring_grp_alloc_input {
*/
} __attribute__((packed));
-/* Output (16 bytes) */
+/* Output (16 bytes) */
struct hwrm_ring_grp_alloc_output {
uint16_t error_code;
/*
@@ -7478,7 +7464,7 @@ struct hwrm_ring_grp_alloc_output {
* a part of executing this command, the HWRM shall reset all associated ring
* group resources.
*/
-/* Input (24 bytes) */
+/* Input (24 bytes) */
struct hwrm_ring_grp_free_input {
uint16_t req_type;
/*
@@ -7511,7 +7497,7 @@ struct hwrm_ring_grp_free_input {
uint32_t unused_0;
} __attribute__((packed));
-/* Output (16 bytes) */
+/* Output (16 bytes) */
struct hwrm_ring_grp_free_output {
uint16_t error_code;
/*
@@ -7545,12 +7531,61 @@ struct hwrm_ring_grp_free_output {
/* hwrm_cfa_l2_filter_alloc */
/*
- * A filter is used to identify traffic that contains a matching set of
- * parameters like unicast or broadcast MAC address or a VLAN tag amongst
- * other things which then allows the ASIC to direct the incoming traffic
- * to an appropriate VNIC or Rx ring.
+ * Description: An L2 filter is a filter resource that is used to identify a
+ * vnic or ring for a packet based on layer 2 fields. Layer 2 fields for
+ * encapsulated packets include both outer L2 header and/or inner l2 header of
+ * encapsulated packet. The L2 filter resource covers the following OS specific
+ * L2 filters. Linux/FreeBSD (per function): # Broadcast enable/disable # List
+ * of individual multicast filters # All multicast enable/disable filter #
+ * Unicast filters # Promiscuous mode VMware: # Broadcast enable/disable (per
+ * physical function) # All multicast enable/disable (per function) # Unicast
+ * filters per ring or vnic # Promiscuous mode per PF Windows: # Broadcast
+ * enable/disable (per physical function) # List of individual multicast filters
+ * (Driver needs to advertise the maximum number of filters supported) # All
+ * multicast enable/disable per physical function # Unicast filters per vnic #
+ * Promiscuous mode per PF Implementation notes on the use of VNIC in this
+ * command: # By default, these filters belong to default vnic for the function.
+ * # Once these filters are set up, only destination VNIC can be modified. # If
+ * the destination VNIC is not specified in this command, then the HWRM shall
+ * only create an l2 context id. HWRM Implementation notes for multicast
+ * filters: # The hwrm_filter_alloc command can be used to set up multicast
+ * filters (perfect match or partial match). Each individual function driver can
+ * set up multicast filters independently. # The HWRM needs to keep track of
+ * multicast filters set up by function drivers and maintain multicast group
+ * replication records to enable a subset of functions to receive traffic for a
+ * specific multicast address. # When a specific multicast filter cannot be set,
+ * the HWRM shall return an error. In this error case, the driver should fall
+ * back to using one general filter (rather than specific) for all multicast
+ * traffic. # When the SR-IOV is enabled, the HWRM needs to additionally track
+ * source knockout per multicast group record. Examples of setting unicast
+ * filters: For a unicast MAC based filter, one can use a combination of the
+ * fields and masks provided in this command to set up the filter. Below are
+ * some examples: # MAC + no VLAN filter: This filter is used to identify
+ * traffic that does not contain any VLAN tags and matches destination (or
+ * source) MAC address. This filter can be set up by setting only l2_addr field
+ * to be a valid field. All other fields are not valid. The following value is
+ * set for l2_addr. l2_addr = MAC # MAC + Any VLAN filter: This filter is used
+ * to identify traffic that carries single VLAN tag and matches (destination or
+ * source) MAC address. This filter can be set up by setting only l2_addr and
+ * l2_ovlan_mask fields to be valid fields. All other fields are not valid. The
+ * following values are set for those two valid fields. l2_addr = MAC,
+ * l2_ovlan_mask = 0xFFFF # MAC + no VLAN or VLAN ID=0: This filter is used to
+ * identify untagged traffic that does not contain any VLAN tags or a VLAN tag
+ * with VLAN ID = 0 and matches destination (or source) MAC address. This filter
+ * can be set up by setting only l2_addr and l2_ovlan fields to be valid fields.
+ * All other fields are not valid. The following value are set for l2_addr and
+ * l2_ovlan. l2_addr = MAC, l2_ovlan = 0x0 # MAC + no VLAN or any VLAN: This
+ * filter is used to identify traffic that contains zero or 1 VLAN tag and
+ * matches destination (or source) MAC address. This filter can be set up by
+ * setting only l2_addr, l2_ovlan, and l2_mask fields to be valid fields. All
+ * other fields are not valid. The following value are set for l2_addr,
+ * l2_ovlan, and l2_mask fields. l2_addr = MAC, l2_ovlan = 0x0, l2_ovlan_mask =
+ * 0xFFFF # MAC + VLAN ID filter: This filter can be set up by setting only
+ * l2_addr, l2_ovlan, and l2_ovlan_mask fields to be valid fields. All other
+ * fields are not valid. The following values are set for those three valid
+ * fields. l2_addr = MAC, l2_ovlan = VLAN ID, l2_ovlan_mask = 0xF000
*/
-/* Input (96 bytes) */
+/* Input (96 bytes) */
struct hwrm_cfa_l2_filter_alloc_input {
uint16_t req_type;
/*
@@ -7589,7 +7624,7 @@ struct hwrm_cfa_l2_filter_alloc_input {
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX (UINT32_C(0x0) << 0)
/* rx path */
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX (UINT32_C(0x1) << 0)
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
/*
* Setting of this flag indicates the applicability to the
@@ -7606,60 +7641,70 @@ struct hwrm_cfa_l2_filter_alloc_input {
* should not be specified. If this flag is set, then l2_*
* fields refer to fields of outermost L2 header.
*/
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST UINT32_C(0x8)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST UINT32_C(0x8)
uint32_t enables;
/* This bit must be '1' for the l2_addr field to be configured. */
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR UINT32_C(0x1)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR UINT32_C(0x1)
/* This bit must be '1' for the l2_addr_mask field to be configured. */
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK UINT32_C(0x2)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
+ UINT32_C(0x2)
/* This bit must be '1' for the l2_ovlan field to be configured. */
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN UINT32_C(0x4)
/*
* This bit must be '1' for the l2_ovlan_mask field to be
* configured.
*/
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK UINT32_C(0x8)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
+ UINT32_C(0x8)
/* This bit must be '1' for the l2_ivlan field to be configured. */
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN UINT32_C(0x10)
/*
* This bit must be '1' for the l2_ivlan_mask field to be
* configured.
*/
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK UINT32_C(0x20)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
+ UINT32_C(0x20)
/* This bit must be '1' for the t_l2_addr field to be configured. */
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR UINT32_C(0x40)
/*
* This bit must be '1' for the t_l2_addr_mask field to be
* configured.
*/
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK UINT32_C(0x80)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
+ UINT32_C(0x80)
/* This bit must be '1' for the t_l2_ovlan field to be configured. */
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN UINT32_C(0x100)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
+ UINT32_C(0x100)
/*
* This bit must be '1' for the t_l2_ovlan_mask field to be
* configured.
*/
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK UINT32_C(0x200)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
+ UINT32_C(0x200)
/* This bit must be '1' for the t_l2_ivlan field to be configured. */
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN UINT32_C(0x400)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
+ UINT32_C(0x400)
/*
* This bit must be '1' for the t_l2_ivlan_mask field to be
* configured.
*/
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK UINT32_C(0x800)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
+ UINT32_C(0x800)
/* This bit must be '1' for the src_type field to be configured. */
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE UINT32_C(0x1000)
/* This bit must be '1' for the src_id field to be configured. */
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID UINT32_C(0x2000)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID UINT32_C(0x2000)
/* This bit must be '1' for the tunnel_type field to be configured. */
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE UINT32_C(0x4000)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
+ UINT32_C(0x4000)
/* This bit must be '1' for the dst_id field to be configured. */
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID UINT32_C(0x8000)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID UINT32_C(0x8000)
/*
* This bit must be '1' for the mirror_vnic_id field to be
* configured.
*/
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID UINT32_C(0x10000)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
+ UINT32_C(0x10000)
uint8_t l2_addr[6];
/*
* This value sets the match value for the L2 MAC address.
@@ -7747,34 +7792,38 @@ struct hwrm_cfa_l2_filter_alloc_input {
uint8_t tunnel_type;
/* Tunnel Type. */
/* Non-tunnel */
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL UINT32_C(0x0)
- /* Virtual eXtensible Local Area Network (VXLAN) */
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
+ UINT32_C(0x0)
+ /* Virtual eXtensible Local Area Network (VXLAN) */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
+ UINT32_C(0x1)
/*
* Network Virtualization Generic Routing
- * Encapsulation (NVGRE)
+ * Encapsulation (NVGRE)
*/
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE UINT32_C(0x2)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
+ UINT32_C(0x2)
/*
- * Generic Routing Encapsulation (GRE) inside
+ * Generic Routing Encapsulation (GRE) inside
* Ethernet payload
*/
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE UINT32_C(0x3)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE UINT32_C(0x3)
/* IP in IP */
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4)
- /* Generic Network Virtualization Encapsulation (Geneve) */
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
- /* Multi-Protocol Lable Switching (MPLS) */
+ /* Generic Network Virtualization Encapsulation (Geneve) */
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
+ /* Multi-Protocol Lable Switching (MPLS) */
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6)
- /* Stateless Transport Tunnel (STT) */
+ /* Stateless Transport Tunnel (STT) */
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
/*
- * Generic Routing Encapsulation (GRE) inside IP
+ * Generic Routing Encapsulation (GRE) inside IP
* datagram payload
*/
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE UINT32_C(0x8)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE UINT32_C(0x8)
/* Any tunneled traffic */
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL UINT32_C(0xff)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
+ UINT32_C(0xff)
uint8_t unused_7;
uint16_t dst_id;
/*
@@ -7790,11 +7839,14 @@ struct hwrm_cfa_l2_filter_alloc_input {
* filter table.
*/
/* No preference */
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER UINT32_C(0x0)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
+ UINT32_C(0x0)
/* Above the given filter */
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER UINT32_C(0x1)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
+ UINT32_C(0x1)
/* Below the given filter */
- #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER UINT32_C(0x2)
+ #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
+ UINT32_C(0x2)
/* As high as possible */
#define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX UINT32_C(0x3)
/* As low as possible */
@@ -7809,7 +7861,7 @@ struct hwrm_cfa_l2_filter_alloc_input {
*/
} __attribute__((packed));
-/* Output (24 bytes) */
+/* Output (24 bytes) */
struct hwrm_cfa_l2_filter_alloc_output {
uint16_t error_code;
/*
@@ -7857,7 +7909,7 @@ struct hwrm_cfa_l2_filter_alloc_output {
* Description: Free a L2 filter. The HWRM shall free all associated filter
* resources with the L2 filter.
*/
-/* Input (24 bytes) */
+/* Input (24 bytes) */
struct hwrm_cfa_l2_filter_free_input {
uint16_t req_type;
/*
@@ -7892,7 +7944,7 @@ struct hwrm_cfa_l2_filter_free_input {
*/
} __attribute__((packed));
-/* Output (16 bytes) */
+/* Output (16 bytes) */
struct hwrm_cfa_l2_filter_free_output {
uint16_t error_code;
/*
@@ -7926,7 +7978,7 @@ struct hwrm_cfa_l2_filter_free_output {
/* hwrm_cfa_l2_filter_cfg */
/* Description: Change the configuration of an existing L2 filter */
-/* Input (40 bytes) */
+/* Input (40 bytes) */
struct hwrm_cfa_l2_filter_cfg_input {
uint16_t req_type;
/*
@@ -7965,7 +8017,7 @@ struct hwrm_cfa_l2_filter_cfg_input {
#define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_TX (UINT32_C(0x0) << 0)
/* rx path */
#define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX (UINT32_C(0x1) << 0)
- #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_LAST \
+ #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_LAST \
CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX
/*
* Setting of this flag indicates drop action. If this flag is
@@ -7979,7 +8031,8 @@ struct hwrm_cfa_l2_filter_cfg_input {
* This bit must be '1' for the new_mirror_vnic_id field to be
* configured.
*/
- #define HWRM_CFA_L2_FILTER_CFG_INPUT_ENABLES_NEW_MIRROR_VNIC_ID UINT32_C(0x2)
+ #define HWRM_CFA_L2_FILTER_CFG_INPUT_ENABLES_NEW_MIRROR_VNIC_ID \
+ UINT32_C(0x2)
uint64_t l2_filter_id;
/*
* This value identifies a set of CFA data structures used for
@@ -7995,7 +8048,7 @@ struct hwrm_cfa_l2_filter_cfg_input {
/* New Logical VNIC ID of the VNIC where traffic is mirrored. */
} __attribute__((packed));
-/* Output (16 bytes) */
+/* Output (16 bytes) */
struct hwrm_cfa_l2_filter_cfg_output {
uint16_t error_code;
/*
@@ -8029,7 +8082,7 @@ struct hwrm_cfa_l2_filter_cfg_output {
/* hwrm_cfa_l2_set_rx_mask */
/* Description: This command will set rx mask of the function. */
-/* Input (56 bytes) */
+/* Input (56 bytes) */
struct hwrm_cfa_l2_set_rx_mask_input {
uint16_t req_type;
/*
@@ -8082,14 +8135,14 @@ struct hwrm_cfa_l2_set_rx_mask_input {
* the promiscuous mode. The HWRM should accept any function to
* set up promiscuous mode. The HWRM shall follow the semantics
* below for the promiscuous mode support. # When partitioning
- * is not enabled on a port (i.e. single PF on the port), then
+ * is not enabled on a port (i.e. single PF on the port), then
* the PF shall be allowed to be in the promiscuous mode. When
* the PF is in the promiscuous mode, then it shall receive all
* host bound traffic on that port. # When partitioning is
- * enabled on a port (i.e. multiple PFs per port) and a PF on
+ * enabled on a port (i.e. multiple PFs per port) and a PF on
* that port is in the promiscuous mode, then the PF receives
* all traffic within that partition as identified by a unique
- * identifier for the PF (e.g. S-Tag). If a unique outer VLAN
+ * identifier for the PF (e.g. S-Tag). If a unique outer VLAN
* for the PF is specified, then the setting of promiscuous mode
* on that PF shall result in the PF receiving all host bound
* traffic with matching outer VLAN. # A VF shall can be set in
@@ -8102,7 +8155,7 @@ struct hwrm_cfa_l2_set_rx_mask_input {
* mode on a function independently from the promiscuous mode
* settings on other functions.
*/
- #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS UINT32_C(0x10)
+ #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS UINT32_C(0x10)
/*
* If this flag is set, the corresponding RX filters shall be
* set up to cover multicast/broadcast filters for the outermost
@@ -8135,7 +8188,8 @@ struct hwrm_cfa_l2_set_rx_mask_input {
* set at most one flag out of vlanonly, vlan_nonvlan, and
* anyvlan_nonvlan.
*/
- #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ANYVLAN_NONVLAN UINT32_C(0x100)
+ #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ANYVLAN_NONVLAN \
+ UINT32_C(0x100)
uint64_t mc_tbl_addr;
/* This is the address for mcast address tbl. */
uint32_t num_mc_entries;
@@ -8158,7 +8212,7 @@ struct hwrm_cfa_l2_set_rx_mask_input {
uint32_t unused_1;
} __attribute__((packed));
-/* Output (16 bytes) */
+/* Output (16 bytes) */
struct hwrm_cfa_l2_set_rx_mask_output {
uint16_t error_code;
/*
@@ -8468,7 +8522,7 @@ struct hwrm_tunnel_dst_port_free_output {
* Description: This command allocates and does basic preparation for a stat
* context.
*/
-/* Input (32 bytes) */
+/* Input (32 bytes) */
struct hwrm_stat_ctx_alloc_input {
uint16_t req_type;
/*
@@ -8506,10 +8560,24 @@ struct hwrm_stat_ctx_alloc_input {
* used. In this case, the stat block can only be read by
* hwrm_stat_ctx_query command.
*/
- uint32_t unused_0;
+ uint8_t stat_ctx_flags;
+ /*
+ * This field is used to specify statistics context specific
+ * configuration flags.
+ */
+ /*
+ * When this bit is set to '1', the statistics context shall be
+ * allocated for RoCE traffic only. In this case, traffic other
+ * than offloaded RoCE traffic shall not be included in this
+ * statistic context. When this bit is set to '0', the
+ * statistics context shall be used for the network traffic
+ * other than offloaded RoCE traffic.
+ */
+ #define HWRM_STAT_CTX_ALLOC_INPUT_STAT_CTX_FLAGS_ROCE UINT32_C(0x1)
+ uint8_t unused_0[3];
} __attribute__((packed));
-/* Output (16 bytes) */
+/* Output (16 bytes) */
struct hwrm_stat_ctx_alloc_output {
uint16_t error_code;
/*
@@ -8544,7 +8612,7 @@ struct hwrm_stat_ctx_alloc_output {
/* hwrm_stat_ctx_free */
/* Description: This command is used to free a stat context. */
-/* Input (24 bytes) */
+/* Input (24 bytes) */
struct hwrm_stat_ctx_free_input {
uint16_t req_type;
/*
@@ -8577,7 +8645,7 @@ struct hwrm_stat_ctx_free_input {
uint32_t unused_0;
} __attribute__((packed));
-/* Output (16 bytes) */
+/* Output (16 bytes) */
struct hwrm_stat_ctx_free_output {
uint16_t error_code;
/*
@@ -8612,7 +8680,7 @@ struct hwrm_stat_ctx_free_output {
/* hwrm_stat_ctx_clr_stats */
/* Description: This command clears statistics of a context. */
-/* Input (24 bytes) */
+/* Input (24 bytes) */
struct hwrm_stat_ctx_clr_stats_input {
uint16_t req_type;
/*
@@ -8640,13 +8708,363 @@ struct hwrm_stat_ctx_clr_stats_input {
* when the request is complete. This area must be 16B aligned
* and must be cleared to zero before the request is made.
*/
- uint32_t stat_ctx_id;
- /* ID of the statistics context that is being queried. */
- uint32_t unused_0;
+ uint32_t stat_ctx_id;
+ /* ID of the statistics context that is being queried. */
+ uint32_t unused_0;
+} __attribute__((packed));
+
+/* Output (16 bytes) */
+struct hwrm_stat_ctx_clr_stats_output {
+ uint16_t error_code;
+ /*
+ * Pass/Fail or error type Note: receiver to verify the in
+ * parameters, and fail the call with an error when appropriate
+ */
+ uint16_t req_type;
+ /* This field returns the type of original request. */
+ uint16_t seq_id;
+ /* This field provides original sequence number of the command. */
+ uint16_t resp_len;
+ /*
+ * This field is the length of the response in bytes. The last
+ * byte of the response is a valid flag that will read as '1'
+ * when the command has been completely written to memory.
+ */
+ uint32_t unused_0;
+ uint8_t unused_1;
+ uint8_t unused_2;
+ uint8_t unused_3;
+ uint8_t valid;
+ /*
+ * This field is used in Output records to indicate that the
+ * output is completely written to RAM. This field should be
+ * read as '1' to indicate that the output has been completely
+ * written. When writing a command completion or response to an
+ * internal processor, the order of writes has to be such that
+ * this field is written last.
+ */
+} __attribute__((packed));
+
+/* hwrm_stat_ctx_query */
+/* Description: This command returns statistics of a context. */
+/* Input (24 bytes) */
+
+struct hwrm_stat_ctx_query_input {
+ uint16_t req_type;
+ /*
+ * This value indicates what type of request this is. The format for the
+ * rest of the command is determined by this field.
+ */
+ uint16_t cmpl_ring;
+ /*
+ * This value indicates the what completion ring the request will be
+ * optionally completed on. If the value is -1, then no CR completion
+ * will be generated. Any other value must be a valid CR ring_id value
+ * for this function.
+ */
+ uint16_t seq_id;
+ /* This value indicates the command sequence number. */
+ uint16_t target_id;
+ /*
+ * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
+ * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
+ */
+ uint64_t resp_addr;
+ /*
+ * This is the host address where the response will be written when the
+ * request is complete. This area must be 16B aligned and must be
+ * cleared to zero before the request is made.
+ */
+ uint32_t stat_ctx_id;
+ /* ID of the statistics context that is being queried. */
+ uint32_t unused_0;
+} __attribute__((packed));
+
+/* Output (176 bytes) */
+
+struct hwrm_stat_ctx_query_output {
+ uint16_t error_code;
+ /*
+ * Pass/Fail or error type Note: receiver to verify the in parameters,
+ * and fail the call with an error when appropriate
+ */
+ uint16_t req_type;
+ /* This field returns the type of original request. */
+ uint16_t seq_id;
+ /* This field provides original sequence number of the command. */
+ uint16_t resp_len;
+ /*
+ * This field is the length of the response in bytes. The last byte of
+ * the response is a valid flag that will read as '1' when the command
+ * has been completely written to memory.
+ */
+ uint64_t tx_ucast_pkts;
+ /* Number of transmitted unicast packets */
+ uint64_t tx_mcast_pkts;
+ /* Number of transmitted multicast packets */
+ uint64_t tx_bcast_pkts;
+ /* Number of transmitted broadcast packets */
+ uint64_t tx_err_pkts;
+ /* Number of transmitted packets with error */
+ uint64_t tx_drop_pkts;
+ /* Number of dropped packets on transmit path */
+ uint64_t tx_ucast_bytes;
+ /* Number of transmitted bytes for unicast traffic */
+ uint64_t tx_mcast_bytes;
+ /* Number of transmitted bytes for multicast traffic */
+ uint64_t tx_bcast_bytes;
+ /* Number of transmitted bytes for broadcast traffic */
+ uint64_t rx_ucast_pkts;
+ /* Number of received unicast packets */
+ uint64_t rx_mcast_pkts;
+ /* Number of received multicast packets */
+ uint64_t rx_bcast_pkts;
+ /* Number of received broadcast packets */
+ uint64_t rx_err_pkts;
+ /* Number of received packets with error */
+ uint64_t rx_drop_pkts;
+ /* Number of dropped packets on received path */
+ uint64_t rx_ucast_bytes;
+ /* Number of received bytes for unicast traffic */
+ uint64_t rx_mcast_bytes;
+ /* Number of received bytes for multicast traffic */
+ uint64_t rx_bcast_bytes;
+ /* Number of received bytes for broadcast traffic */
+ uint64_t rx_agg_pkts;
+ /* Number of aggregated unicast packets */
+ uint64_t rx_agg_bytes;
+ /* Number of aggregated unicast bytes */
+ uint64_t rx_agg_events;
+ /* Number of aggregation events */
+ uint64_t rx_agg_aborts;
+ /* Number of aborted aggregations */
+ uint32_t unused_0;
+ uint8_t unused_1;
+ uint8_t unused_2;
+ uint8_t unused_3;
+ uint8_t valid;
+ /*
+ * This field is used in Output records to indicate that the output is
+ * completely written to RAM. This field should be read as '1' to
+ * indicate that the output has been completely written. When writing a
+ * command completion or response to an internal processor, the order of
+ * writes has to be such that this field is written last.
+ */
+} __attribute__((packed));
+
+/* hwrm_exec_fwd_resp */
+/*
+ * Description: This command is used to send an encapsulated request to the
+ * HWRM. This command instructs the HWRM to execute the request and forward the
+ * response of the encapsulated request to the location specified in the
+ * original request that is encapsulated. The target id of this command shall be
+ * set to 0xFFFF (HWRM). The response location in this command shall be used to
+ * acknowledge the receipt of the encapsulated request and forwarding of the
+ * response.
+ */
+/* Input (128 bytes) */
+struct hwrm_exec_fwd_resp_input {
+ uint16_t req_type;
+ /*
+ * This value indicates what type of request this is. The format
+ * for the rest of the command is determined by this field.
+ */
+ uint16_t cmpl_ring;
+ /*
+ * This value indicates the what completion ring the request
+ * will be optionally completed on. If the value is -1, then no
+ * CR completion will be generated. Any other value must be a
+ * valid CR ring_id value for this function.
+ */
+ uint16_t seq_id;
+ /* This value indicates the command sequence number. */
+ uint16_t target_id;
+ /*
+ * Target ID of this command. 0x0 - 0xFFF8 - Used for function
+ * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
+ * - HWRM
+ */
+ uint64_t resp_addr;
+ /*
+ * This is the host address where the response will be written
+ * when the request is complete. This area must be 16B aligned
+ * and must be cleared to zero before the request is made.
+ */
+ uint32_t encap_request[26];
+ /*
+ * This is an encapsulated request. This request should be
+ * executed by the HWRM and the response should be provided in
+ * the response buffer inside the encapsulated request.
+ */
+ uint16_t encap_resp_target_id;
+ /*
+ * This value indicates the target id of the response to the
+ * encapsulated request. 0x0 - 0xFFF8 - Used for function ids
+ * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
+ * HWRM
+ */
+ uint16_t unused_0[3];
+} __attribute__((packed));
+
+/* Output (16 bytes) */
+struct hwrm_exec_fwd_resp_output {
+ uint16_t error_code;
+ /*
+ * Pass/Fail or error type Note: receiver to verify the in
+ * parameters, and fail the call with an error when appropriate
+ */
+ uint16_t req_type;
+ /* This field returns the type of original request. */
+ uint16_t seq_id;
+ /* This field provides original sequence number of the command. */
+ uint16_t resp_len;
+ /*
+ * This field is the length of the response in bytes. The last
+ * byte of the response is a valid flag that will read as '1'
+ * when the command has been completely written to memory.
+ */
+ uint32_t unused_0;
+ uint8_t unused_1;
+ uint8_t unused_2;
+ uint8_t unused_3;
+ uint8_t valid;
+ /*
+ * This field is used in Output records to indicate that the
+ * output is completely written to RAM. This field should be
+ * read as '1' to indicate that the output has been completely
+ * written. When writing a command completion or response to an
+ * internal processor, the order of writes has to be such that
+ * this field is written last.
+ */
+} __attribute__((packed));
+
+/* hwrm_reject_fwd_resp */
+/*
+ * Description: This command is used to send an encapsulated request to the
+ * HWRM. This command instructs the HWRM to reject the request and forward the
+ * error response of the encapsulated request to the location specified in the
+ * original request that is encapsulated. The target id of this command shall be
+ * set to 0xFFFF (HWRM). The response location in this command shall be used to
+ * acknowledge the receipt of the encapsulated request and forwarding of the
+ * response.
+ */
+/* Input (128 bytes) */
+struct hwrm_reject_fwd_resp_input {
+ uint16_t req_type;
+ /*
+ * This value indicates what type of request this is. The format
+ * for the rest of the command is determined by this field.
+ */
+ uint16_t cmpl_ring;
+ /*
+ * This value indicates the what completion ring the request
+ * will be optionally completed on. If the value is -1, then no
+ * CR completion will be generated. Any other value must be a
+ * valid CR ring_id value for this function.
+ */
+ uint16_t seq_id;
+ /* This value indicates the command sequence number. */
+ uint16_t target_id;
+ /*
+ * Target ID of this command. 0x0 - 0xFFF8 - Used for function
+ * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
+ * - HWRM
+ */
+ uint64_t resp_addr;
+ /*
+ * This is the host address where the response will be written
+ * when the request is complete. This area must be 16B aligned
+ * and must be cleared to zero before the request is made.
+ */
+ uint32_t encap_request[26];
+ /*
+ * This is an encapsulated request. This request should be
+ * rejected by the HWRM and the error response should be
+ * provided in the response buffer inside the encapsulated
+ * request.
+ */
+ uint16_t encap_resp_target_id;
+ /*
+ * This value indicates the target id of the response to the
+ * encapsulated request. 0x0 - 0xFFF8 - Used for function ids
+ * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
+ * HWRM
+ */
+ uint16_t unused_0[3];
+} __attribute__((packed));
+
+/* Output (16 bytes) */
+struct hwrm_reject_fwd_resp_output {
+ uint16_t error_code;
+ /*
+ * Pass/Fail or error type Note: receiver to verify the in
+ * parameters, and fail the call with an error when appropriate
+ */
+ uint16_t req_type;
+ /* This field returns the type of original request. */
+ uint16_t seq_id;
+ /* This field provides original sequence number of the command. */
+ uint16_t resp_len;
+ /*
+ * This field is the length of the response in bytes. The last
+ * byte of the response is a valid flag that will read as '1'
+ * when the command has been completely written to memory.
+ */
+ uint32_t unused_0;
+ uint8_t unused_1;
+ uint8_t unused_2;
+ uint8_t unused_3;
+ uint8_t valid;
+ /*
+ * This field is used in Output records to indicate that the
+ * output is completely written to RAM. This field should be
+ * read as '1' to indicate that the output has been completely
+ * written. When writing a command completion or response to an
+ * internal processor, the order of writes has to be such that
+ * this field is written last.
+ */
+} __attribute__((packed));
+
+/* Hardware Resource Manager Specification */
+/* Description: This structure is used to specify port description. */
+/*
+ * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
+ * inside the chip. The HWRM is implemented in firmware, and runs on embedded
+ * processors inside the chip. This firmware service is vital part of the chip.
+ * The chip can not be used by a driver or HWRM client without the HWRM.
+ */
+/* Input (16 bytes) */
+struct input {
+ uint16_t req_type;
+ /*
+ * This value indicates what type of request this is. The format
+ * for the rest of the command is determined by this field.
+ */
+ uint16_t cmpl_ring;
+ /*
+ * This value indicates the what completion ring the request
+ * will be optionally completed on. If the value is -1, then no
+ * CR completion will be generated. Any other value must be a
+ * valid CR ring_id value for this function.
+ */
+ uint16_t seq_id;
+ /* This value indicates the command sequence number. */
+ uint16_t target_id;
+ /*
+ * Target ID of this command. 0x0 - 0xFFF8 - Used for function
+ * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
+ * - HWRM
+ */
+ uint64_t resp_addr;
+ /*
+ * This is the host address where the response will be written
+ * when the request is complete. This area must be 16B aligned
+ * and must be cleared to zero before the request is made.
+ */
} __attribute__((packed));
-/* Output (16 bytes) */
-struct hwrm_stat_ctx_clr_stats_output {
+/* Output (8 bytes) */
+struct output {
uint16_t error_code;
/*
* Pass/Fail or error type Note: receiver to verify the in
@@ -8662,21 +9080,71 @@ struct hwrm_stat_ctx_clr_stats_output {
* byte of the response is a valid flag that will read as '1'
* when the command has been completely written to memory.
*/
- uint32_t unused_0;
- uint8_t unused_1;
- uint8_t unused_2;
- uint8_t unused_3;
- uint8_t valid;
+} __attribute__((packed));
+
+#define HWRM_GET_HWRM_ERROR_CODE(arg) \
+ { \
+ typeof(arg) x = (arg); \
+ ((x) == 0xf ? "HWRM_ERROR" : \
+ ((x) == 0xffff ? "CMD_NOT_SUPPORTED" : \
+ ((x) == 0xfffe ? "UNKNOWN_ERR" : \
+ ((x) == 0x4 ? "RESOURCE_ALLOC_ERROR" : \
+ ((x) == 0x5 ? "INVALID_FLAGS" : \
+ ((x) == 0x6 ? "INVALID_ENABLES" : \
+ ((x) == 0x0 ? "SUCCESS" : \
+ ((x) == 0x1 ? "FAIL" : \
+ ((x) == 0x2 ? "INVALID_PARAMS" : \
+ ((x) == 0x3 ? "RESOURCE_ACCESS_DENIED" : \
+ "Unknown error_code")))))))))) \
+ }
+
+/* Return Codes (8 bytes) */
+struct ret_codes {
+ uint16_t error_code;
+ /* These are numbers assigned to return/error codes. */
+ /* Request was successfully executed by the HWRM. */
+ #define HWRM_ERR_CODE_SUCCESS (UINT32_C(0x0))
+ /* THe HWRM failed to execute the request. */
+ #define HWRM_ERR_CODE_FAIL (UINT32_C(0x1))
/*
- * This field is used in Output records to indicate that the
- * output is completely written to RAM. This field should be
- * read as '1' to indicate that the output has been completely
- * written. When writing a command completion or response to an
- * internal processor, the order of writes has to be such that
- * this field is written last.
+ * The request contains invalid argument(s) or
+ * input parameters.
+ */
+ #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
+ /*
+ * The requester is not allowed to access the
+ * requested resource. This error code shall be
+ * provided in a response to a request to query
+ * or modify an existing resource that is not
+ * accessible by the requester.
+ */
+ #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
+ /*
+ * The HWRM is unable to allocate the requested
+ * resource. This code only applies to requests
+ * for HWRM resource allocations.
+ */
+ #define HWRM_ERR_CODE_RESOURCE_ALLOC_ERROR (UINT32_C(0x4))
+ /* Invalid combination of flags is specified in the request. */
+ #define HWRM_ERR_CODE_INVALID_FLAGS (UINT32_C(0x5))
+ /*
+ * Invalid combination of enables fields is
+ * specified in the request.
+ */
+ #define HWRM_ERR_CODE_INVALID_ENABLES (UINT32_C(0x6))
+ /*
+ * Generic HWRM execution error that represents
+ * an internal error.
*/
+ #define HWRM_ERR_CODE_HWRM_ERROR (UINT32_C(0xf))
+ /* Unknown error */
+ #define HWRM_ERR_CODE_UNKNOWN_ERR (UINT32_C(0xfffe))
+ /* Unsupported or invalid command */
+ #define HWRM_ERR_CODE_CMD_NOT_SUPPORTED (UINT32_C(0xffff))
+ uint16_t unused_0[3];
} __attribute__((packed));
+/* Output (16 bytes) */
struct hwrm_err_output {
uint16_t error_code;
/*
@@ -9057,177 +9525,34 @@ struct rx_port_stats {
/* Total Rx Error Drops per Port reported by STATS block */
} __attribute__((packed));
-/* hwrm_exec_fwd_resp */
+/* Periodic Statistics Context DMA to host (160 bytes) */
/*
- * Description: This command is used to send an encapsulated request to the
- * HWRM. This command instructs the HWRM to execute the request and forward the
- * response of the encapsulated request to the location specified in the
- * original request that is encapsulated. The target id of this command shall be
- * set to 0xFFFF (HWRM). The response location in this command shall be used to
- * acknowledge the receipt of the encapsulated request and forwarding of the
- * response.
+ * per-context HW statistics -- chip view
*/
-/* Input (128 bytes) */
-struct hwrm_exec_fwd_resp_input {
- uint16_t req_type;
- /*
- * This value indicates what type of request this is. The format
- * for the rest of the command is determined by this field.
- */
- uint16_t cmpl_ring;
- /*
- * This value indicates the what completion ring the request
- * will be optionally completed on. If the value is -1, then no
- * CR completion will be generated. Any other value must be a
- * valid CR ring_id value for this function.
- */
- uint16_t seq_id;
- /* This value indicates the command sequence number. */
- uint16_t target_id;
- /*
- * Target ID of this command. 0x0 - 0xFFF8 - Used for function
- * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
- * - HWRM
- */
- uint64_t resp_addr;
- /*
- * This is the host address where the response will be written
- * when the request is complete. This area must be 16B aligned
- * and must be cleared to zero before the request is made.
- */
- uint32_t encap_request[26];
- /*
- * This is an encapsulated request. This request should be
- * executed by the HWRM and the response should be provided in
- * the response buffer inside the encapsulated request.
- */
- uint16_t encap_resp_target_id;
- /*
- * This value indicates the target id of the response to the
- * encapsulated request. 0x0 - 0xFFF8 - Used for function ids
- * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
- * HWRM
- */
- uint16_t unused_0[3];
-} __attribute__((packed));
-/* Output (16 bytes) */
-struct hwrm_exec_fwd_resp_output {
- uint16_t error_code;
- /*
- * Pass/Fail or error type Note: receiver to verify the in
- * parameters, and fail the call with an error when appropriate
- */
- uint16_t req_type;
- /* This field returns the type of original request. */
- uint16_t seq_id;
- /* This field provides original sequence number of the command. */
- uint16_t resp_len;
- /*
- * This field is the length of the response in bytes. The last
- * byte of the response is a valid flag that will read as '1'
- * when the command has been completely written to memory.
- */
- uint32_t unused_0;
- uint8_t unused_1;
- uint8_t unused_2;
- uint8_t unused_3;
- uint8_t valid;
- /*
- * This field is used in Output records to indicate that the
- * output is completely written to RAM. This field should be
- * read as '1' to indicate that the output has been completely
- * written. When writing a command completion or response to an
- * internal processor, the order of writes has to be such that
- * this field is written last.
- */
-} __attribute__((packed));
+struct ctx_hw_stats64 {
+ uint64_t rx_ucast_pkts;
+ uint64_t rx_mcast_pkts;
+ uint64_t rx_bcast_pkts;
+ uint64_t rx_drop_pkts;
+ uint64_t rx_discard_pkts;
+ uint64_t rx_ucast_bytes;
+ uint64_t rx_mcast_bytes;
+ uint64_t rx_bcast_bytes;
-/* hwrm_reject_fwd_resp */
-/*
- * Description: This command is used to send an encapsulated request to the
- * HWRM. This command instructs the HWRM to reject the request and forward the
- * error response of the encapsulated request to the location specified in the
- * original request that is encapsulated. The target id of this command shall be
- * set to 0xFFFF (HWRM). The response location in this command shall be used to
- * acknowledge the receipt of the encapsulated request and forwarding of the
- * response.
- */
-/* Input (128 bytes) */
-struct hwrm_reject_fwd_resp_input {
- uint16_t req_type;
- /*
- * This value indicates what type of request this is. The format
- * for the rest of the command is determined by this field.
- */
- uint16_t cmpl_ring;
- /*
- * This value indicates the what completion ring the request
- * will be optionally completed on. If the value is -1, then no
- * CR completion will be generated. Any other value must be a
- * valid CR ring_id value for this function.
- */
- uint16_t seq_id;
- /* This value indicates the command sequence number. */
- uint16_t target_id;
- /*
- * Target ID of this command. 0x0 - 0xFFF8 - Used for function
- * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
- * - HWRM
- */
- uint64_t resp_addr;
- /*
- * This is the host address where the response will be written
- * when the request is complete. This area must be 16B aligned
- * and must be cleared to zero before the request is made.
- */
- uint32_t encap_request[26];
- /*
- * This is an encapsulated request. This request should be
- * rejected by the HWRM and the error response should be
- * provided in the response buffer inside the encapsulated
- * request.
- */
- uint16_t encap_resp_target_id;
- /*
- * This value indicates the target id of the response to the
- * encapsulated request. 0x0 - 0xFFF8 - Used for function ids
- * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
- * HWRM
- */
- uint16_t unused_0[3];
-} __attribute__((packed));
+ uint64_t tx_ucast_pkts;
+ uint64_t tx_mcast_pkts;
+ uint64_t tx_bcast_pkts;
+ uint64_t tx_drop_pkts;
+ uint64_t tx_discard_pkts;
+ uint64_t tx_ucast_bytes;
+ uint64_t tx_mcast_bytes;
+ uint64_t tx_bcast_bytes;
-/* Output (16 bytes) */
-struct hwrm_reject_fwd_resp_output {
- uint16_t error_code;
- /*
- * Pass/Fail or error type Note: receiver to verify the in
- * parameters, and fail the call with an error when appropriate
- */
- uint16_t req_type;
- /* This field returns the type of original request. */
- uint16_t seq_id;
- /* This field provides original sequence number of the command. */
- uint16_t resp_len;
- /*
- * This field is the length of the response in bytes. The last
- * byte of the response is a valid flag that will read as '1'
- * when the command has been completely written to memory.
- */
- uint32_t unused_0;
- uint8_t unused_1;
- uint8_t unused_2;
- uint8_t unused_3;
- uint8_t valid;
- /*
- * This field is used in Output records to indicate that the
- * output is completely written to RAM. This field should be
- * read as '1' to indicate that the output has been completely
- * written. When writing a command completion or response to an
- * internal processor, the order of writes has to be such that
- * this field is written last.
- */
+ uint64_t tpa_pkts;
+ uint64_t tpa_bytes;
+ uint64_t tpa_events;
+ uint64_t tpa_aborts;
} __attribute__((packed));
-#endif
+#endif /* _HSI_STRUCT_DEF_DPDK_ */