diff mbox series

[v2,09/14] eventdev: use C11 alignas

Message ID 1707884270-27189-10-git-send-email-roretzla@linux.microsoft.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series use C11 alignas and normalize type alignment |

Checks

Context Check Description
ci/checkpatch warning coding style issues

Commit Message

Tyler Retzlaff Feb. 14, 2024, 4:17 a.m. UTC 
  * Move __rte_aligned from the end of {struct,union} definitions to
  be between {struct,union} and tag.

  The placement between {struct,union} and the tag allows the desired
  alignment to be imparted on the type regardless of the toolchain being
  used for all of GCC, LLVM, MSVC compilers building both C and C++.

* Replace use of __rte_aligned(a) on variables/fields with alignas(a).

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/eventdev/rte_eventdev.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h
index ec9b024..ff143c7 100644
--- a/lib/eventdev/rte_eventdev.h
+++ b/lib/eventdev/rte_eventdev.h
@@ -1078,7 +1078,7 @@  int rte_event_dev_stop_flush_callback_register(uint8_t dev_id,
 /**
  * Event vector structure.
  */
-struct rte_event_vector {
+struct __rte_aligned(16) rte_event_vector {
 	uint16_t nb_elem;
 	/**< Number of elements valid in this event vector. */
 	uint16_t elem_offset : 12;
@@ -1118,19 +1118,19 @@  struct rte_event_vector {
 	 * value to share between dequeue and enqueue operation.
 	 * The application should not modify this field.
 	 */
-	union {
+	union __rte_aligned(16) {
 #endif
 		struct rte_mbuf *mbufs[0];
 		void *ptrs[0];
 		uint64_t u64s[0];
 #ifndef __cplusplus
-	} __rte_aligned(16);
+	};
 #endif
 	/**< Start of the vector array union. Depending upon the event type the
 	 * vector array can be an array of mbufs or pointers or opaque u64
 	 * values.
 	 */
-} __rte_aligned(16);
+};
 
 /* Scheduler type definitions */
 #define RTE_SCHED_TYPE_ORDERED          0