From patchwork Tue May 2 03:15:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tyler Retzlaff X-Patchwork-Id: 126644 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4D17042A38; Tue, 2 May 2023 05:16:13 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E5B8D42D35; Tue, 2 May 2023 05:15:50 +0200 (CEST) Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mails.dpdk.org (Postfix) with ESMTP id 8DF984114B for ; Tue, 2 May 2023 05:15:44 +0200 (CEST) Received: by linux.microsoft.com (Postfix, from userid 1086) id E435D21C3F1C; Mon, 1 May 2023 20:15:43 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com E435D21C3F1C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1682997343; bh=/n6LyB9S2KGWejOdD735duGMaOHGwfOgr77axzCuQ9U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nBtZqAeGCggPa7ZjXW+PaZnybnQ2SVXgh10b32aX+iVOOy4CLPevYAoiZlRwZ37WX blc09dIWetcz17/dMOZWa/l64+uRftz3826fpC3PneLHGU4M9by5XN/wVcK15FrazJ EMPfPklCn+QEucsUkOH4VZUPkXBJ2fYgHj/3ggoc= From: Tyler Retzlaff To: dev@dpdk.org Cc: bruce.richardson@intel.com, david.marchand@redhat.com, thomas@monjalon.net, mb@smartsharesystems.com, konstantin.ananyev@huawei.com, Tyler Retzlaff Subject: [PATCH v8 04/14] eal: use cpuid and cpuidex intrinsics Date: Mon, 1 May 2023 20:15:31 -0700 Message-Id: <1682997341-2271-5-git-send-email-roretzla@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1682997341-2271-1-git-send-email-roretzla@linux.microsoft.com> References: <1680558751-17931-1-git-send-email-roretzla@linux.microsoft.com> <1682997341-2271-1-git-send-email-roretzla@linux.microsoft.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Inline assembly is not supported for MSVC x64 instead use __cpuid and __cpuidex intrinsics. Signed-off-by: Tyler Retzlaff Acked-by: Morten Brørup --- lib/eal/x86/rte_cpuflags.c | 4 ++++ lib/eal/x86/rte_cpuid.h | 7 +++++++ lib/eal/x86/rte_cycles.c | 36 ++++++++++++++++++++++++++++++++++++ lib/eal/x86/rte_hypervisor.c | 4 ++++ 4 files changed, 51 insertions(+) diff --git a/lib/eal/x86/rte_cpuflags.c b/lib/eal/x86/rte_cpuflags.c index d6b5182..e3624e7 100644 --- a/lib/eal/x86/rte_cpuflags.c +++ b/lib/eal/x86/rte_cpuflags.c @@ -165,9 +165,13 @@ struct feature_entry { if (maxleaf < feat->leaf) return 0; +#ifndef RTE_TOOLCHAIN_MSVC __cpuid_count(feat->leaf, feat->subleaf, regs[RTE_REG_EAX], regs[RTE_REG_EBX], regs[RTE_REG_ECX], regs[RTE_REG_EDX]); +#else + __cpuidex(regs, feat->leaf, feat->subleaf); +#endif /* check if the feature is enabled */ return (regs[feat->reg] >> feat->bit) & 1; diff --git a/lib/eal/x86/rte_cpuid.h b/lib/eal/x86/rte_cpuid.h index b773ad9..c6abaad 100644 --- a/lib/eal/x86/rte_cpuid.h +++ b/lib/eal/x86/rte_cpuid.h @@ -5,7 +5,9 @@ #ifndef RTE_CPUID_H #define RTE_CPUID_H +#ifndef RTE_TOOLCHAIN_MSVC #include +#endif enum cpu_register_t { RTE_REG_EAX = 0, @@ -16,4 +18,9 @@ enum cpu_register_t { typedef uint32_t cpuid_registers_t[4]; +#ifdef RTE_TOOLCHAIN_MSVC +int +__get_cpuid_max(unsigned int e, unsigned int *s); +#endif + #endif /* RTE_CPUID_H */ diff --git a/lib/eal/x86/rte_cycles.c b/lib/eal/x86/rte_cycles.c index 0e695ca..db56d39 100644 --- a/lib/eal/x86/rte_cycles.c +++ b/lib/eal/x86/rte_cycles.c @@ -4,7 +4,11 @@ #include #include +#ifndef RTE_TOOLCHAIN_MSVC #include +#else +#define bit_AVX (1 << 28) +#endif #include "eal_private.h" @@ -82,9 +86,25 @@ return 0; } +#ifdef RTE_TOOLCHAIN_MSVC +int +__get_cpuid_max(unsigned int e, unsigned int *s) +{ + uint32_t cpuinfo[4]; + + __cpuid(cpuinfo, e); + if (s) + *s = cpuinfo[1]; + return cpuinfo[0]; +} +#endif + uint64_t get_tsc_freq_arch(void) { +#ifdef RTE_TOOLCHAIN_MSVC + int cpuinfo[4]; +#endif uint64_t tsc_hz = 0; uint32_t a, b, c, d, maxleaf; uint8_t mult, model; @@ -97,14 +117,30 @@ maxleaf = __get_cpuid_max(0, NULL); if (maxleaf >= 0x15) { +#ifndef RTE_TOOLCHAIN_MSVC __cpuid(0x15, a, b, c, d); +#else + __cpuid(cpuinfo, 0x15); + a = cpuinfo[0]; + b = cpuinfo[1]; + c = cpuinfo[2]; + d = cpuinfo[3]; +#endif /* EBX : TSC/Crystal ratio, ECX : Crystal Hz */ if (b && c) return c * (b / a); } +#ifndef RTE_TOOLCHAIN_MSVC __cpuid(0x1, a, b, c, d); +#else + __cpuid(cpuinfo, 0x1); + a = cpuinfo[0]; + b = cpuinfo[1]; + c = cpuinfo[2]; + d = cpuinfo[3]; +#endif model = rte_cpu_get_model(a); if (check_model_wsm_nhm(model)) diff --git a/lib/eal/x86/rte_hypervisor.c b/lib/eal/x86/rte_hypervisor.c index c38cfc0..a9c2017 100644 --- a/lib/eal/x86/rte_hypervisor.c +++ b/lib/eal/x86/rte_hypervisor.c @@ -23,9 +23,13 @@ enum rte_hypervisor if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_HYPERVISOR)) return RTE_HYPERVISOR_NONE; +#ifndef RTE_TOOLCHAIN_MSVC __cpuid(HYPERVISOR_INFO_LEAF, regs[RTE_REG_EAX], regs[RTE_REG_EBX], regs[RTE_REG_ECX], regs[RTE_REG_EDX]); +#else + __cpuid(regs, HYPERVISOR_INFO_LEAF); +#endif for (reg = 1; reg < 4; reg++) memcpy(name + (reg - 1) * 4, ®s[reg], 4); name[12] = '\0';