From patchwork Thu Sep 2 12:22:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anoob Joseph X-Patchwork-Id: 97797 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AD85BA0C47; Thu, 2 Sep 2021 14:23:15 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E232940E09; Thu, 2 Sep 2021 14:23:13 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 6E15A40DF7 for ; Thu, 2 Sep 2021 14:23:12 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 18280wTo011170 for ; Thu, 2 Sep 2021 05:23:11 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=K8i511aBLx5AwbFEXHQZjjCGxrjQartKepGDPJM767Y=; b=LiOYwIKOi58w5+k7haJxGNIshfSwJcIWHx+otr6Pz0ET+tbuX0NeZSaecS3pWL8TW7gu MWsBGJJQdIahRj80cAyAxvtMbrZcfEU896kEQsiEWY0pDeYCAAe/erR07lsnz0mI40Ev aPHnAB/LjGMO8Qbu8ttQM70K+AjCsHBAwBQ3ICqD+KO0/suSPWY/wkLPkNDHoFw9nAWH 9tB4p27lzHJEa9avKsM4jdLqGkHHp5bSq4mGGhyoV/Vf2FOzZevgU+PQuPlChaYvt65E CD0pq/h+/aAs93mr7wQKRHHoR1QS1ILO2eCNE4U1eWX+y9QlAOrjkusZ33kPYRTZUjRT aw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 3attqmgusr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 02 Sep 2021 05:23:11 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 2 Sep 2021 05:23:09 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 2 Sep 2021 05:23:09 -0700 Received: from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218]) by maili.marvell.com (Postfix) with ESMTP id EC8033F705E; Thu, 2 Sep 2021 05:23:05 -0700 (PDT) From: Anoob Joseph To: Akhil Goyal , Jerin Jacob CC: Anoob Joseph , Archana Muniganti , Tejasree Kondoj , Date: Thu, 2 Sep 2021 17:52:31 +0530 Message-ID: <1630585354-1136-5-git-send-email-anoobj@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1630585354-1136-1-git-send-email-anoobj@marvell.com> References: <1630585354-1136-1-git-send-email-anoobj@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: zUiPiaGoo-RRy_6ka9GPNmc1sjoGBkCY X-Proofpoint-ORIG-GUID: zUiPiaGoo-RRy_6ka9GPNmc1sjoGBkCY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-09-02_04,2021-09-02_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH 4/7] crypto/cnxk: remove redundant memcpy of IV for ZUC X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Swap is not required for ZUC. Update IV updation sequence to remove the redundant swap in case of ZUC. Signed-off-by: Anoob Joseph --- drivers/crypto/cnxk/cnxk_se.h | 55 +++++++++++++++++++++++-------------------- 1 file changed, 30 insertions(+), 25 deletions(-) diff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h index 9d1ce09..bbad289 100644 --- a/drivers/crypto/cnxk/cnxk_se.h +++ b/drivers/crypto/cnxk/cnxk_se.h @@ -36,6 +36,29 @@ struct cnxk_se_sess { struct roc_se_ctx roc_se_ctx; } __rte_cache_aligned; +static inline void +pdcp_iv_copy(uint8_t *iv_d, uint8_t *iv_s, const uint8_t pdcp_alg_type) +{ + uint32_t *iv_s_temp, iv_temp[4]; + int j; + + if (pdcp_alg_type == ROC_SE_PDCP_ALG_TYPE_SNOW3G) { + /* + * DPDK seems to provide it in form of IV3 IV2 IV1 IV0 + * and BigEndian, MC needs it as IV0 IV1 IV2 IV3 + */ + + iv_s_temp = (uint32_t *)iv_s; + + for (j = 0; j < 4; j++) + iv_temp[j] = iv_s_temp[3 - j]; + memcpy(iv_d, iv_temp, 16); + } else { + /* ZUC doesn't need a swap */ + memcpy(iv_d, iv_s, 16); + } +} + static __rte_always_inline int cpt_mac_len_verify(struct rte_crypto_auth_xform *auth) { @@ -954,13 +977,13 @@ cpt_zuc_snow3g_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens, int32_t inputlen, outputlen; struct roc_se_ctx *se_ctx; uint32_t mac_len = 0; - uint8_t pdcp_alg_type, j; + uint8_t pdcp_alg_type; uint32_t encr_offset, auth_offset; uint32_t encr_data_len, auth_data_len; int flags, iv_len = 16; uint64_t offset_ctrl; uint64_t *offset_vaddr; - uint32_t *iv_s, iv[4]; + uint8_t *iv_s; union cpt_inst_w4 cpt_inst_w4; se_ctx = params->ctx_buf.vaddr; @@ -1030,20 +1053,6 @@ cpt_zuc_snow3g_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens, return -1; } - if (pdcp_alg_type == ROC_SE_PDCP_ALG_TYPE_SNOW3G) { - /* - * DPDK seems to provide it in form of IV3 IV2 IV1 IV0 - * and BigEndian, MC needs it as IV0 IV1 IV2 IV3 - */ - - for (j = 0; j < 4; j++) - iv[j] = iv_s[3 - j]; - } else { - /* ZUC doesn't need a swap */ - for (j = 0; j < 4; j++) - iv[j] = iv_s[j]; - } - /* * GP op header, lengths are expected in bits. */ @@ -1072,11 +1081,8 @@ cpt_zuc_snow3g_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens, cpt_inst_w4.s.dlen = inputlen + ROC_SE_OFF_CTRL_LEN; - if (likely(iv_len)) { - uint32_t *iv_d = (uint32_t *)((uint8_t *)offset_vaddr + - ROC_SE_OFF_CTRL_LEN); - memcpy(iv_d, iv, 16); - } + uint8_t *iv_d = ((uint8_t *)offset_vaddr + ROC_SE_OFF_CTRL_LEN); + pdcp_iv_copy(iv_d, iv_s, pdcp_alg_type); *offset_vaddr = offset_ctrl; } else { @@ -1085,7 +1091,7 @@ cpt_zuc_snow3g_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens, struct roc_se_sglist_comp *gather_comp; struct roc_se_sglist_comp *scatter_comp; uint8_t *in_buffer; - uint32_t *iv_d; + uint8_t *iv_d; /* save space for iv */ offset_vaddr = m_vaddr; @@ -1117,9 +1123,8 @@ cpt_zuc_snow3g_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens, /* iv offset is 0 */ *offset_vaddr = offset_ctrl; - iv_d = (uint32_t *)((uint8_t *)offset_vaddr + - ROC_SE_OFF_CTRL_LEN); - memcpy(iv_d, iv, 16); + iv_d = ((uint8_t *)offset_vaddr + ROC_SE_OFF_CTRL_LEN); + pdcp_iv_copy(iv_d, iv_s, pdcp_alg_type); /* input data */ size = inputlen - iv_len;