diff mbox series

[2/7] common/cnxk: update to v1.16 ucc codes

Message ID 1630585354-1136-3-git-send-email-anoobj@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers
Series Improvements and fixes in crypto/cnxk PMDs |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Anoob Joseph Sept. 2, 2021, 12:22 p.m. UTC 
  Update to v1.16 microcode completion codes.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
---
 drivers/common/cnxk/roc_ie_ot.h | 65 +++++++++++++++++++++--------------------
 1 file changed, 34 insertions(+), 31 deletions(-)
diff mbox series

Patch

diff --git a/drivers/common/cnxk/roc_ie_ot.h b/drivers/common/cnxk/roc_ie_ot.h
index 3987a08..1ff4688 100644
--- a/drivers/common/cnxk/roc_ie_ot.h
+++ b/drivers/common/cnxk/roc_ie_ot.h
@@ -14,37 +14,40 @@ 
 
 enum roc_ie_ot_ucc_ipsec {
 	ROC_IE_OT_UCC_SUCCESS = 0x00,
-	ROC_IE_OT_UCC_SUCCESS_PKT_IP_GOODCSUM = 0x02,
-	ROC_IE_OT_UCC_ERR_SA_INVAL = 0x03,
-	ROC_IE_OT_UCC_SUCCESS_PKT_IP_BADCSUM = 0x04,
-	ROC_IE_OT_UCC_ERR_SA_EXPIRED = 0x05,
-	ROC_IE_OT_UCC_SUCCESS_PKT_L4_GOODCSUM = 0x06,
-	ROC_IE_OT_UCC_ERR_SA_OVERFLOW = 0x07,
-	ROC_IE_OT_UCC_SUCCESS_PKT_L4_BADCSUM = 0x08,
-	ROC_IE_OT_UCC_ERR_SA_ESP_BAD_ALGO = 0x09,
-	ROC_IE_OT_UCC_SUCCESS_PKT_UDPESP_NZCSUM = 0x0a,
-	ROC_IE_OT_UCC_ERR_SA_ESP_BAD_KEYS = 0x0b,
-	ROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_FIRST = 0x0c,
-	ROC_IE_OT_UCC_ERR_SA_AH_BAD_ALGO = 0x0d,
-	ROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_AGAIN = 0x0e,
-	ROC_IE_OT_UCC_ERR_SA_AH_BAD_KEYS = 0x0f,
-	ROC_IE_OT_UCC_ERR_SA_BAD_IP = 0x11,
-	ROC_IE_OT_UCC_ERR_SA_BAD_CTX = 0x13,
-	ROC_IE_OT_UCC_ERR_AOP_IPSEC = 0x17,
-	ROC_IE_OT_UCC_ERR_PKT_IP = 0x23,
-	ROC_IE_OT_UCC_ERR_PKT_IP6_BAD_EXT = 0x25,
-	ROC_IE_OT_UCC_ERR_PKT_IP6_HBH = 0x27,
-	ROC_IE_OT_UCC_ERR_PKT_IP6_BIGEXT = 0x29,
-	ROC_IE_OT_UCC_ERR_PKT_IP_FRAG = 0x2b,
-	ROC_IE_OT_UCC_ERR_PKT_IP_ULP = 0x2d,
-	ROC_IE_OT_UCC_ERR_PKT_SA_MISMATCH = 0x2f,
-	ROC_IE_OT_UCC_ERR_PKT_SPI_MISMATCH = 0x31,
-	ROC_IE_OT_UCC_ERR_PKT_ESP_BADPAD = 0x33,
-	ROC_IE_OT_UCC_ERR_PKT_BADICV = 0x35,
-	ROC_IE_OT_UCC_ERR_PKT_REPLAY_SEQ = 0x37,
-	ROC_IE_OT_UCC_ERR_PKT_REPLAY_WINDOW = 0x39,
-	ROC_IE_OT_UCC_ERR_PKT_BADNH = 0x3b,
-	ROC_IE_OT_UCC_ERR_PKT_SA_PORT_MISMATCH = 0x3d,
+	ROC_IE_OT_UCC_ERR_SA_INVAL = 0xb0,
+	ROC_IE_OT_UCC_ERR_SA_EXPIRED = 0xb1,
+	ROC_IE_OT_UCC_ERR_SA_OVERFLOW = 0xb2,
+	ROC_IE_OT_UCC_ERR_SA_ESP_BAD_ALGO = 0xb3,
+	ROC_IE_OT_UCC_ERR_SA_AH_BAD_ALGO = 0xb4,
+	ROC_IE_OT_UCC_ERR_SA_BAD_CTX = 0xb5,
+	ROC_IE_OT_UCC_SA_CTX_FLAG_MISMATCH = 0xb6,
+	ROC_IE_OT_UCC_ERR_AOP_IPSEC = 0xb7,
+	ROC_IE_OT_UCC_ERR_PKT_IP = 0xb8,
+	ROC_IE_OT_UCC_ERR_PKT_IP6_BAD_EXT = 0xb9,
+	ROC_IE_OT_UCC_ERR_PKT_IP6_HBH = 0xba,
+	ROC_IE_OT_UCC_ERR_PKT_IP6_BIGEXT = 0xbb,
+	ROC_IE_OT_UCC_ERR_PKT_IP_ULP = 0xbc,
+	ROC_IE_OT_UCC_ERR_PKT_SA_MISMATCH = 0xbd,
+	ROC_IE_OT_UCC_ERR_PKT_SPI_MISMATCH = 0xbe,
+	ROC_IE_OT_UCC_ERR_PKT_ESP_BADPAD = 0xbf,
+	ROC_IE_OT_UCC_ERR_PKT_BADICV = 0xc0,
+	ROC_IE_OT_UCC_ERR_PKT_REPLAY_SEQ = 0xc1,
+	ROC_IE_OT_UCC_ERR_PKT_BADNH = 0xc2,
+	ROC_IE_OT_UCC_ERR_PKT_SA_PORT_MISMATCH = 0xc3,
+	ROC_IE_OT_UCC_ERR_PKT_BAD_DLEN = 0xc4,
+	ROC_IE_OT_UCC_ERR_SA_ESP_BAD_KEYS = 0xc5,
+	ROC_IE_OT_UCC_ERR_SA_AH_BAD_KEYS = 0xc6,
+	ROC_IE_OT_UCC_ERR_SA_BAD_IP = 0xc7,
+	ROC_IE_OT_UCC_ERR_PKT_REPLAY_WINDOW = 0xc8,
+	ROC_IE_OT_UCC_ERR_PKT_IP_FRAG = 0xc9,
+	ROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_FIRST = 0xf0,
+	ROC_IE_OT_UCC_SUCCESS_PKT_IP_BADCSUM = 0xf1,
+	ROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_AGAIN = 0xf2,
+	ROC_IE_OT_UCC_SUCCESS_PKT_L4_GOODCSUM = 0xf3,
+	ROC_IE_OT_UCC_SUCCESS_PKT_L4_BADCSUM = 0xf4,
+	ROC_IE_OT_UCC_SUCCESS_PKT_UDPESP_NZCSUM = 0xf5,
+	ROC_IE_OT_UCC_SUCCESS_PKT_UDP_ZEROCSUM = 0xf6,
+	ROC_IE_OT_UCC_SUCCESS_PKT_IP_GOODCSUM = 0xf7,
 };
 
 enum {