From patchwork Fri Jul 2 10:36:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anoob Joseph X-Patchwork-Id: 95212 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id EA603A0A0C; Fri, 2 Jul 2021 12:37:01 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6899C41353; Fri, 2 Jul 2021 12:37:01 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 1C51340686 for ; Fri, 2 Jul 2021 12:36:59 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 162AVgPU021408 for ; Fri, 2 Jul 2021 03:36:58 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=7Wyzhhf3bmZMk6KRzarXU4qQAE+e0XicXyrATNbJXhM=; b=Nn/i7IK0QXssKXyZgVptSxewVeiY3Pu437TPv99TjHA78QXTiq21NNkIAkhoctrZHQNf a5tYkcdaCjFoh992ERuAU1gt+PQnABL9WhRZXVuBbRR9DhehiivQCbHosYCt9L7VmOrZ CCZR3f4wuQpa+VcOYstMlXRemSkB/NyfWUt5H+VLLRo9SLa/92DQUPENBDZvDtXSc6Jp yJNK0fKh4kgUsxXF+Q6pLPE83lYIWLcDSa3TpfBF/vOGixF91mDSnYP7S41lQdHYuy1P kY19mApe3Sh5wMHNGqZ5PVrBXzJk1Or+VhwXTCqTGbsHu6InnZSplbvVSWchoQFNdW6J pQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 39hq9e235w-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 02 Jul 2021 03:36:56 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Fri, 2 Jul 2021 03:36:53 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Fri, 2 Jul 2021 03:36:53 -0700 Received: from HY-LT1002.marvell.com (unknown [10.193.70.1]) by maili.marvell.com (Postfix) with ESMTP id 22D215B6937; Fri, 2 Jul 2021 03:36:50 -0700 (PDT) From: Anoob Joseph To: Akhil Goyal , Jerin Jacob CC: Anoob Joseph , Ankur Dwivedi , Tejasree Kondoj , Date: Fri, 2 Jul 2021 16:06:35 +0530 Message-ID: <1625222196-215-1-git-send-email-anoobj@marvell.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: ysydxBC--9YL1nxkHeuWiVH_N2Rzr-Pb X-Proofpoint-GUID: ysydxBC--9YL1nxkHeuWiVH_N2Rzr-Pb X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-07-02_01:2021-07-02, 2021-07-02 signatures=0 Subject: [dpdk-dev] [PATCH 1/2] crypto/octeontx2: reset feature flags during config X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Feature flags in dev would be updated during config. On reconfigure, the field need to be set again to original value. Signed-off-by: Anoob Joseph --- drivers/crypto/octeontx2/otx2_cryptodev.c | 30 ++++++++++++++++----------- drivers/crypto/octeontx2/otx2_cryptodev.h | 1 + drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 4 ++-- 3 files changed, 21 insertions(+), 14 deletions(-) diff --git a/drivers/crypto/octeontx2/otx2_cryptodev.c b/drivers/crypto/octeontx2/otx2_cryptodev.c index d4e5ca0..75fb4f9 100644 --- a/drivers/crypto/octeontx2/otx2_cryptodev.c +++ b/drivers/crypto/octeontx2/otx2_cryptodev.c @@ -37,6 +37,23 @@ static struct rte_pci_id pci_id_cpt_table[] = { }, }; +uint64_t +otx2_cpt_default_ff_get(void) +{ + return RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO | + RTE_CRYPTODEV_FF_HW_ACCELERATED | + RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING | + RTE_CRYPTODEV_FF_IN_PLACE_SGL | + RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT | + RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT | + RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT | + RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO | + RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT | + RTE_CRYPTODEV_FF_SYM_SESSIONLESS | + RTE_CRYPTODEV_FF_SECURITY | + RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED; +} + static int otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, struct rte_pci_device *pci_dev) @@ -113,18 +130,7 @@ otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, if (ret) goto otx2_dev_fini; - dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO | - RTE_CRYPTODEV_FF_HW_ACCELERATED | - RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING | - RTE_CRYPTODEV_FF_IN_PLACE_SGL | - RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT | - RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT | - RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT | - RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO | - RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT | - RTE_CRYPTODEV_FF_SYM_SESSIONLESS | - RTE_CRYPTODEV_FF_SECURITY | - RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED; + dev->feature_flags = otx2_cpt_default_ff_get(); if (rte_eal_process_type() == RTE_PROC_SECONDARY) otx2_cpt_set_enqdeq_fns(dev); diff --git a/drivers/crypto/octeontx2/otx2_cryptodev.h b/drivers/crypto/octeontx2/otx2_cryptodev.h index 7e8c5de..15ecfe4 100644 --- a/drivers/crypto/octeontx2/otx2_cryptodev.h +++ b/drivers/crypto/octeontx2/otx2_cryptodev.h @@ -57,6 +57,7 @@ extern int otx2_cpt_logtype; */ extern uint8_t otx2_cryptodev_driver_id; +uint64_t otx2_cpt_default_ff_get(void); void otx2_cpt_set_enqdeq_fns(struct rte_cryptodev *dev); #endif /* _OTX2_CRYPTODEV_H_ */ diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c index 12a2747..bb73a16 100644 --- a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c +++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c @@ -1115,7 +1115,7 @@ otx2_cpt_dev_config(struct rte_cryptodev *dev, return -EINVAL; } - dev->feature_flags &= ~conf->ff_disable; + dev->feature_flags = otx2_cpt_default_ff_get() & ~conf->ff_disable; if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) { /* Initialize shared FPM table */ @@ -1227,7 +1227,7 @@ otx2_cpt_dev_info_get(struct rte_cryptodev *dev, if (info != NULL) { info->max_nb_queue_pairs = vf->max_queues; - info->feature_flags = dev->feature_flags; + info->feature_flags = otx2_cpt_default_ff_get(); info->capabilities = otx2_cpt_capabilities_get(); info->sym.max_nb_sessions = 0; info->driver_id = otx2_cryptodev_driver_id;