diff mbox series

[1/2] crypto/octeontx2: reset feature flags during config

Message ID 1625222196-215-1-git-send-email-anoobj@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers show
Series [1/2] crypto/octeontx2: reset feature flags during config | expand

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Anoob Joseph July 2, 2021, 10:36 a.m. UTC
Feature flags in dev would be updated during config. On reconfigure, the
field need to be set again to original value.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
---
 drivers/crypto/octeontx2/otx2_cryptodev.c     | 30 ++++++++++++++++-----------
 drivers/crypto/octeontx2/otx2_cryptodev.h     |  1 +
 drivers/crypto/octeontx2/otx2_cryptodev_ops.c |  4 ++--
 3 files changed, 21 insertions(+), 14 deletions(-)
diff mbox series

Patch

diff --git a/drivers/crypto/octeontx2/otx2_cryptodev.c b/drivers/crypto/octeontx2/otx2_cryptodev.c
index d4e5ca0..75fb4f9 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev.c
@@ -37,6 +37,23 @@  static struct rte_pci_id pci_id_cpt_table[] = {
 	},
 };
 
+uint64_t
+otx2_cpt_default_ff_get(void)
+{
+	return RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
+	       RTE_CRYPTODEV_FF_HW_ACCELERATED |
+	       RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
+	       RTE_CRYPTODEV_FF_IN_PLACE_SGL |
+	       RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT |
+	       RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
+	       RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
+	       RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO |
+	       RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT |
+	       RTE_CRYPTODEV_FF_SYM_SESSIONLESS |
+	       RTE_CRYPTODEV_FF_SECURITY |
+	       RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED;
+}
+
 static int
 otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 		   struct rte_pci_device *pci_dev)
@@ -113,18 +130,7 @@  otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 	if (ret)
 		goto otx2_dev_fini;
 
-	dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
-			     RTE_CRYPTODEV_FF_HW_ACCELERATED |
-			     RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
-			     RTE_CRYPTODEV_FF_IN_PLACE_SGL |
-			     RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT |
-			     RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
-			     RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
-			     RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO |
-			     RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT |
-			     RTE_CRYPTODEV_FF_SYM_SESSIONLESS |
-			     RTE_CRYPTODEV_FF_SECURITY |
-			     RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED;
+	dev->feature_flags = otx2_cpt_default_ff_get();
 
 	if (rte_eal_process_type() == RTE_PROC_SECONDARY)
 		otx2_cpt_set_enqdeq_fns(dev);
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev.h b/drivers/crypto/octeontx2/otx2_cryptodev.h
index 7e8c5de..15ecfe4 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev.h
+++ b/drivers/crypto/octeontx2/otx2_cryptodev.h
@@ -57,6 +57,7 @@  extern int otx2_cpt_logtype;
  */
 extern uint8_t otx2_cryptodev_driver_id;
 
+uint64_t otx2_cpt_default_ff_get(void);
 void otx2_cpt_set_enqdeq_fns(struct rte_cryptodev *dev);
 
 #endif /* _OTX2_CRYPTODEV_H_ */
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
index 12a2747..bb73a16 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
@@ -1115,7 +1115,7 @@  otx2_cpt_dev_config(struct rte_cryptodev *dev,
 		return -EINVAL;
 	}
 
-	dev->feature_flags &= ~conf->ff_disable;
+	dev->feature_flags = otx2_cpt_default_ff_get() & ~conf->ff_disable;
 
 	if (dev->feature_flags & RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO) {
 		/* Initialize shared FPM table */
@@ -1227,7 +1227,7 @@  otx2_cpt_dev_info_get(struct rte_cryptodev *dev,
 
 	if (info != NULL) {
 		info->max_nb_queue_pairs = vf->max_queues;
-		info->feature_flags = dev->feature_flags;
+		info->feature_flags = otx2_cpt_default_ff_get();
 		info->capabilities = otx2_cpt_capabilities_get();
 		info->sym.max_nb_sessions = 0;
 		info->driver_id = otx2_cryptodev_driver_id;