From patchwork Mon Jun 28 02:57:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: fengchengwen X-Patchwork-Id: 94882 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 51B59A0C40; Mon, 28 Jun 2021 05:01:38 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 51B3D410EE; Mon, 28 Jun 2021 05:01:31 +0200 (CEST) Received: from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187]) by mails.dpdk.org (Postfix) with ESMTP id D0AD4410E8 for ; Mon, 28 Jun 2021 05:01:28 +0200 (CEST) Received: from dggemv711-chm.china.huawei.com (unknown [172.30.72.55]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4GCsk53XnlzZkgG; Mon, 28 Jun 2021 10:58:21 +0800 (CST) Received: from dggpeml500024.china.huawei.com (7.185.36.10) by dggemv711-chm.china.huawei.com (10.1.198.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 28 Jun 2021 11:01:19 +0800 Received: from localhost.localdomain (10.67.165.24) by dggpeml500024.china.huawei.com (7.185.36.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.2; Mon, 28 Jun 2021 11:01:17 +0800 From: Chengwen Feng To: , , CC: , , , , , , , Date: Mon, 28 Jun 2021 10:57:50 +0800 Message-ID: <1624849071-56826-2-git-send-email-fengchengwen@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1624849071-56826-1-git-send-email-fengchengwen@huawei.com> References: <1624849071-56826-1-git-send-email-fengchengwen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.165.24] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To dggpeml500024.china.huawei.com (7.185.36.10) X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH 1/2] build: fix SVE compile error with gcc8.3 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" If the target machine has SVE feature (e.g. "-march=armv8.2-a+sve'), and the compiler are gcc8.3, it will compile error: In file included from ../dpdk-next-net/lib/eal/common/ eal_common_options.c:38: ../dpdk-next-net/lib/eal/arm/include/rte_vect.h:13:10: fatal error: arm_sve.h: No such file or directory #include ^~~~~~~~~~~ compilation terminated. The root cause is that gcc8.3 supports SVE (the macro __ARM_FEATURE_SVE was 1), but it doesn't support SVE ACLE [1]. The solution: a) Detect compiler whether support SVE ACLE, if support then define RTE_HAS_SVE_ACLE macro. b) Use the RTE_HAS_SVE_ACLE macro to include SVE header file. [1] ACLE: Arm C Language Extensions, the SVE ACLE header file is , user should include it when writing ACLE SVE code. Fixes: 67b68824a82d ("lpm/arm: support SVE") Signed-off-by: Chengwen Feng Acked-by: Ruifeng Wang --- config/arm/meson.build | 6 ++++++ lib/eal/arm/include/rte_vect.h | 2 +- lib/lpm/rte_lpm.h | 2 +- 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index e83a56e..7342626 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -488,3 +488,9 @@ if cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != '' compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL', 'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2'] endif + +# Check whether SVE ACLE is supported and set the corresponding flag which will used with SVE ACLE code. +if (cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' and + cc.check_header('arm_sve.h')) + dpdk_conf.set('RTE_HAS_SVE_ACLE', 1) +endif diff --git a/lib/eal/arm/include/rte_vect.h b/lib/eal/arm/include/rte_vect.h index 093e912..4b705ba 100644 --- a/lib/eal/arm/include/rte_vect.h +++ b/lib/eal/arm/include/rte_vect.h @@ -9,7 +9,7 @@ #include "generic/rte_vect.h" #include "rte_debug.h" #include "arm_neon.h" -#ifdef __ARM_FEATURE_SVE +#ifdef RTE_HAS_SVE_ACLE #include #endif diff --git a/lib/lpm/rte_lpm.h b/lib/lpm/rte_lpm.h index 28b5768..5eb14c1 100644 --- a/lib/lpm/rte_lpm.h +++ b/lib/lpm/rte_lpm.h @@ -402,7 +402,7 @@ rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4], uint32_t defv); #if defined(RTE_ARCH_ARM) -#ifdef __ARM_FEATURE_SVE +#ifdef RTE_HAS_SVE_ACLE #include "rte_lpm_sve.h" #else #include "rte_lpm_neon.h"