diff mbox series

[v2,10/20] crypto/cnxk: add aead operation in session

Message ID 1624600591-29841-11-git-send-email-anoobj@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers
Series Add Marvell CNXK crypto PMDs |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Anoob Joseph June 25, 2021, 5:56 a.m. UTC 
  From: Archana Muniganti <marchana@marvell.com>

Add support for AEAD operations in session.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
---
 drivers/crypto/cnxk/cnxk_cryptodev_ops.c |  3 ++
 drivers/crypto/cnxk/cnxk_se.h            | 64 ++++++++++++++++++++++++++++++++
 2 files changed, 67 insertions(+)
diff mbox series

Patch

diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
index f2319df..acb9f1f 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c
@@ -466,6 +466,9 @@  sym_session_configure(struct roc_cpt *roc_cpt, int driver_id,
 		else
 			ret = fill_sess_auth(xform, sess_priv);
 		break;
+	case CNXK_CPT_AEAD:
+		ret = fill_sess_aead(xform, sess_priv);
+		break;
 	default:
 		ret = -1;
 	}
diff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h
index 6e4b032..57bbd70 100644
--- a/drivers/crypto/cnxk/cnxk_se.h
+++ b/drivers/crypto/cnxk/cnxk_se.h
@@ -69,6 +69,70 @@  cpt_mac_len_verify(struct rte_crypto_auth_xform *auth)
 	return ret;
 }
 
+static __rte_always_inline int
+fill_sess_aead(struct rte_crypto_sym_xform *xform, struct cnxk_se_sess *sess)
+{
+	struct rte_crypto_aead_xform *aead_form;
+	roc_se_cipher_type enc_type = 0; /* NULL Cipher type */
+	roc_se_auth_type auth_type = 0;	 /* NULL Auth type */
+	uint32_t cipher_key_len = 0;
+	uint8_t aes_gcm = 0;
+	aead_form = &xform->aead;
+
+	if (aead_form->op == RTE_CRYPTO_AEAD_OP_ENCRYPT) {
+		sess->cpt_op |= ROC_SE_OP_CIPHER_ENCRYPT;
+		sess->cpt_op |= ROC_SE_OP_AUTH_GENERATE;
+	} else if (aead_form->op == RTE_CRYPTO_AEAD_OP_DECRYPT) {
+		sess->cpt_op |= ROC_SE_OP_CIPHER_DECRYPT;
+		sess->cpt_op |= ROC_SE_OP_AUTH_VERIFY;
+	} else {
+		plt_dp_err("Unknown aead operation\n");
+		return -1;
+	}
+	switch (aead_form->algo) {
+	case RTE_CRYPTO_AEAD_AES_GCM:
+		enc_type = ROC_SE_AES_GCM;
+		cipher_key_len = 16;
+		aes_gcm = 1;
+		break;
+	case RTE_CRYPTO_AEAD_AES_CCM:
+		plt_dp_err("Crypto: Unsupported cipher algo %u",
+			   aead_form->algo);
+		return -1;
+	case RTE_CRYPTO_AEAD_CHACHA20_POLY1305:
+		enc_type = ROC_SE_CHACHA20;
+		auth_type = ROC_SE_POLY1305;
+		cipher_key_len = 32;
+		sess->chacha_poly = 1;
+		break;
+	default:
+		plt_dp_err("Crypto: Undefined cipher algo %u specified",
+			   aead_form->algo);
+		return -1;
+	}
+	if (aead_form->key.length < cipher_key_len) {
+		plt_dp_err("Invalid cipher params keylen %u",
+			   aead_form->key.length);
+		return -1;
+	}
+	sess->zsk_flag = 0;
+	sess->aes_gcm = aes_gcm;
+	sess->mac_len = aead_form->digest_length;
+	sess->iv_offset = aead_form->iv.offset;
+	sess->iv_length = aead_form->iv.length;
+	sess->aad_length = aead_form->aad_length;
+
+	if (unlikely(roc_se_ciph_key_set(&sess->roc_se_ctx, enc_type,
+					 aead_form->key.data,
+					 aead_form->key.length, NULL)))
+		return -1;
+
+	if (unlikely(roc_se_auth_key_set(&sess->roc_se_ctx, auth_type, NULL, 0,
+					 aead_form->digest_length)))
+		return -1;
+
+	return 0;
+}
 
 static __rte_always_inline int
 fill_sess_cipher(struct rte_crypto_sym_xform *xform, struct cnxk_se_sess *sess)