From patchwork Wed Jun 2 16:43:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anoob Joseph X-Patchwork-Id: 93810 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6395AA0524; Wed, 2 Jun 2021 18:44:32 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E82E5410E8; Wed, 2 Jun 2021 18:44:21 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id D1B3640689 for ; Wed, 2 Jun 2021 18:44:19 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 152Ga8xX032345; Wed, 2 Jun 2021 09:44:19 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=PZEkMVk52oDCzmZUZT8FsZNG15lFVXwu7NEzFPHQga4=; b=VBD3MGVoklIyDjkkHBZvsCl3kxVCGuNV+ZkiMFMEpOcvX8Ljr9edACuBF1zztn/ZNZ+T q2muMwXkCbd7oP2V6fgvFUIFH0tKDEUYjO3aMcow4SreRCRlaRbd8+lq0f0HF2wUa+s3 DzervziKD/C7LmVcJf/8dT7TQYFxvlAyskbWO4m1P8JuMaIohh7Ujaw8LYGY9B3OBy3A pjtI6MIk642G/mrvY9CqF9vgpnu+s9AnaANQWXMEsSo1IFdhd2ha/WgdlbFV5fKmwj/4 rWHmgy4O2GdFrC5OrVtaSKMrNfS5MNlVKNoruzqocTBBlS+YE6CTNfF23sPwLMFzJgVh nw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 38wufguqvw-8 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 02 Jun 2021 09:44:18 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 2 Jun 2021 09:44:11 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 2 Jun 2021 09:44:11 -0700 Received: from HY-LT1002.marvell.com (unknown [10.193.70.1]) by maili.marvell.com (Postfix) with ESMTP id 44CBB3F703F; Wed, 2 Jun 2021 09:44:06 -0700 (PDT) From: Anoob Joseph To: Akhil Goyal , Thomas Monjalon CC: Ankur Dwivedi , Jerin Jacob , Tejasree Kondoj , , Anoob Joseph , Archana Muniganti Date: Wed, 2 Jun 2021 22:13:23 +0530 Message-ID: <1622652221-22732-3-git-send-email-anoobj@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1622652221-22732-1-git-send-email-anoobj@marvell.com> References: <1622652221-22732-1-git-send-email-anoobj@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: jzXhal5SupiE0be_KKFgKHRtVIVgwFK0 X-Proofpoint-GUID: jzXhal5SupiE0be_KKFgKHRtVIVgwFK0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-06-02_09:2021-06-02, 2021-06-02 signatures=0 Subject: [dpdk-dev] [PATCH 02/20] crypto/cnxk: add probe and remove X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ankur Dwivedi Add probe & remove for cn9k & cn10k crypto PMDs. Signed-off-by: Ankur Dwivedi Signed-off-by: Anoob Joseph > Signed-off-by: Archana Muniganti Signed-off-by: Tejasree Kondoj --- drivers/crypto/cnxk/cn10k_cryptodev.c | 93 ++++++++++++++++++++++++++++++- drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 34 +++++++++++ drivers/crypto/cnxk/cn10k_cryptodev_ops.h | 13 +++++ drivers/crypto/cnxk/cn9k_cryptodev.c | 93 ++++++++++++++++++++++++++++++- drivers/crypto/cnxk/cn9k_cryptodev_ops.c | 34 +++++++++++ drivers/crypto/cnxk/cn9k_cryptodev_ops.h | 12 ++++ drivers/crypto/cnxk/cnxk_cryptodev.c | 33 +++++++++++ drivers/crypto/cnxk/cnxk_cryptodev.h | 33 +++++++++++ drivers/crypto/cnxk/meson.build | 3 + 9 files changed, 344 insertions(+), 4 deletions(-) create mode 100644 drivers/crypto/cnxk/cn10k_cryptodev_ops.c create mode 100644 drivers/crypto/cnxk/cn10k_cryptodev_ops.h create mode 100644 drivers/crypto/cnxk/cn9k_cryptodev_ops.c create mode 100644 drivers/crypto/cnxk/cn9k_cryptodev_ops.h create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev.c create mode 100644 drivers/crypto/cnxk/cnxk_cryptodev.h diff --git a/drivers/crypto/cnxk/cn10k_cryptodev.c b/drivers/crypto/cnxk/cn10k_cryptodev.c index 4d2140c..ef2c3df 100644 --- a/drivers/crypto/cnxk/cn10k_cryptodev.c +++ b/drivers/crypto/cnxk/cn10k_cryptodev.c @@ -11,6 +11,8 @@ #include #include "cn10k_cryptodev.h" +#include "cn10k_cryptodev_ops.h" +#include "cnxk_cryptodev.h" #include "roc_api.h" uint8_t cn10k_cryptodev_driver_id; @@ -26,11 +28,98 @@ static struct rte_pci_id pci_id_cpt_table[] = { }, }; +static int +cn10k_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, + struct rte_pci_device *pci_dev) +{ + struct rte_cryptodev_pmd_init_params init_params = { + .name = "", + .socket_id = rte_socket_id(), + .private_data_size = sizeof(struct cnxk_cpt_vf) + }; + char name[RTE_CRYPTODEV_NAME_MAX_LEN]; + struct rte_cryptodev *dev; + struct roc_cpt *roc_cpt; + struct cnxk_cpt_vf *vf; + int rc; + + rte_pci_device_name(&pci_dev->addr, name, sizeof(name)); + + dev = rte_cryptodev_pmd_create(name, &pci_dev->device, &init_params); + if (dev == NULL) { + rc = -ENODEV; + goto exit; + } + + dev->dev_ops = &cn10k_cpt_ops; + + dev->driver_id = cn10k_cryptodev_driver_id; + + /* Get private data space allocated */ + vf = dev->data->dev_private; + + roc_cpt = &vf->cpt; + + if (rte_eal_process_type() == RTE_PROC_PRIMARY) { + roc_cpt->pci_dev = pci_dev; + rc = roc_cpt_dev_init(roc_cpt); + if (rc) { + plt_err("Failed to initialize roc cpt rc=%d", rc); + goto pmd_destroy; + } + + rc = cnxk_cpt_eng_grp_add(roc_cpt); + if (rc) { + plt_err("Failed to add engine group rc=%d", rc); + goto dev_fini; + } + } + + return 0; + +dev_fini: + if (rte_eal_process_type() == RTE_PROC_PRIMARY) + roc_cpt_dev_fini(roc_cpt); +pmd_destroy: + rte_cryptodev_pmd_destroy(dev); +exit: + plt_err("Could not create device (vendor_id: 0x%x device_id: 0x%x)", + pci_dev->id.vendor_id, pci_dev->id.device_id); + return rc; +} + +static int +cn10k_cpt_pci_remove(struct rte_pci_device *pci_dev) +{ + char name[RTE_CRYPTODEV_NAME_MAX_LEN]; + struct rte_cryptodev *dev; + struct cnxk_cpt_vf *vf; + int ret; + + if (pci_dev == NULL) + return -EINVAL; + + rte_pci_device_name(&pci_dev->addr, name, sizeof(name)); + + dev = rte_cryptodev_pmd_get_named_dev(name); + if (dev == NULL) + return -ENODEV; + + if (rte_eal_process_type() == RTE_PROC_PRIMARY) { + vf = dev->data->dev_private; + ret = roc_cpt_dev_fini(&vf->cpt); + if (ret) + return ret; + } + + return rte_cryptodev_pmd_destroy(dev); +} + static struct rte_pci_driver cn10k_cryptodev_pmd = { .id_table = pci_id_cpt_table, .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA, - .probe = NULL, - .remove = NULL, + .probe = cn10k_cpt_pci_probe, + .remove = cn10k_cpt_pci_remove, }; static struct cryptodev_driver cn10k_cryptodev_drv; diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c new file mode 100644 index 0000000..6f80f74 --- /dev/null +++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#include +#include + +#include "cn10k_cryptodev.h" +#include "cn10k_cryptodev_ops.h" + +struct rte_cryptodev_ops cn10k_cpt_ops = { + /* Device control ops */ + .dev_configure = NULL, + .dev_start = NULL, + .dev_stop = NULL, + .dev_close = NULL, + .dev_infos_get = NULL, + + .stats_get = NULL, + .stats_reset = NULL, + .queue_pair_setup = NULL, + .queue_pair_release = NULL, + + /* Symmetric crypto ops */ + .sym_session_get_size = NULL, + .sym_session_configure = NULL, + .sym_session_clear = NULL, + + /* Asymmetric crypto ops */ + .asym_session_get_size = NULL, + .asym_session_configure = NULL, + .asym_session_clear = NULL, + +}; diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.h b/drivers/crypto/cnxk/cn10k_cryptodev_ops.h new file mode 100644 index 0000000..24611bf --- /dev/null +++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#ifndef _CN10K_CRYPTODEV_OPS_H_ +#define _CN10K_CRYPTODEV_OPS_H_ + +#include +#include + +extern struct rte_cryptodev_ops cn10k_cpt_ops; + +#endif /* _CN10K_CRYPTODEV_OPS_H_ */ diff --git a/drivers/crypto/cnxk/cn9k_cryptodev.c b/drivers/crypto/cnxk/cn9k_cryptodev.c index 7654c53..54610c7 100644 --- a/drivers/crypto/cnxk/cn9k_cryptodev.c +++ b/drivers/crypto/cnxk/cn9k_cryptodev.c @@ -11,6 +11,8 @@ #include #include "cn9k_cryptodev.h" +#include "cn9k_cryptodev_ops.h" +#include "cnxk_cryptodev.h" #include "roc_api.h" uint8_t cn9k_cryptodev_driver_id; @@ -24,11 +26,98 @@ static struct rte_pci_id pci_id_cpt_table[] = { }, }; +static int +cn9k_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, + struct rte_pci_device *pci_dev) +{ + struct rte_cryptodev_pmd_init_params init_params = { + .name = "", + .socket_id = rte_socket_id(), + .private_data_size = sizeof(struct cnxk_cpt_vf) + }; + char name[RTE_CRYPTODEV_NAME_MAX_LEN]; + struct rte_cryptodev *dev; + struct roc_cpt *roc_cpt; + struct cnxk_cpt_vf *vf; + int rc; + + rte_pci_device_name(&pci_dev->addr, name, sizeof(name)); + + dev = rte_cryptodev_pmd_create(name, &pci_dev->device, &init_params); + if (dev == NULL) { + rc = -ENODEV; + goto exit; + } + + dev->dev_ops = &cn9k_cpt_ops; + + dev->driver_id = cn9k_cryptodev_driver_id; + + /* Get private data space allocated */ + vf = dev->data->dev_private; + + roc_cpt = &vf->cpt; + + if (rte_eal_process_type() == RTE_PROC_PRIMARY) { + roc_cpt->pci_dev = pci_dev; + rc = roc_cpt_dev_init(roc_cpt); + if (rc) { + plt_err("Failed to initialize roc cpt rc=%d", rc); + goto pmd_destroy; + } + + rc = cnxk_cpt_eng_grp_add(roc_cpt); + if (rc) { + plt_err("Failed to add engine group rc=%d", rc); + goto dev_fini; + } + } + + return 0; + +dev_fini: + if (rte_eal_process_type() == RTE_PROC_PRIMARY) + roc_cpt_dev_fini(roc_cpt); +pmd_destroy: + rte_cryptodev_pmd_destroy(dev); +exit: + plt_err("Could not create device (vendor_id: 0x%x device_id: 0x%x)", + pci_dev->id.vendor_id, pci_dev->id.device_id); + return rc; +} + +static int +cn9k_cpt_pci_remove(struct rte_pci_device *pci_dev) +{ + char name[RTE_CRYPTODEV_NAME_MAX_LEN]; + struct rte_cryptodev *dev; + struct cnxk_cpt_vf *vf; + int ret; + + if (pci_dev == NULL) + return -EINVAL; + + rte_pci_device_name(&pci_dev->addr, name, sizeof(name)); + + dev = rte_cryptodev_pmd_get_named_dev(name); + if (dev == NULL) + return -ENODEV; + + if (rte_eal_process_type() == RTE_PROC_PRIMARY) { + vf = dev->data->dev_private; + ret = roc_cpt_dev_fini(&vf->cpt); + if (ret) + return ret; + } + + return rte_cryptodev_pmd_destroy(dev); +} + static struct rte_pci_driver cn9k_cryptodev_pmd = { .id_table = pci_id_cpt_table, .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA, - .probe = NULL, - .remove = NULL, + .probe = cn9k_cpt_pci_probe, + .remove = cn9k_cpt_pci_remove, }; static struct cryptodev_driver cn9k_cryptodev_drv; diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c new file mode 100644 index 0000000..51f9845 --- /dev/null +++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#include +#include + +#include "cn9k_cryptodev.h" +#include "cn9k_cryptodev_ops.h" + +struct rte_cryptodev_ops cn9k_cpt_ops = { + /* Device control ops */ + .dev_configure = NULL, + .dev_start = NULL, + .dev_stop = NULL, + .dev_close = NULL, + .dev_infos_get = NULL, + + .stats_get = NULL, + .stats_reset = NULL, + .queue_pair_setup = NULL, + .queue_pair_release = NULL, + + /* Symmetric crypto ops */ + .sym_session_get_size = NULL, + .sym_session_configure = NULL, + .sym_session_clear = NULL, + + /* Asymmetric crypto ops */ + .asym_session_get_size = NULL, + .asym_session_configure = NULL, + .asym_session_clear = NULL, + +}; diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.h b/drivers/crypto/cnxk/cn9k_cryptodev_ops.h new file mode 100644 index 0000000..72fc297 --- /dev/null +++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#ifndef _CN9K_CRYPTODEV_OPS_H_ +#define _CN9K_CRYPTODEV_OPS_H_ + +#include + +extern struct rte_cryptodev_ops cn9k_cpt_ops; + +#endif /* _CN9K_CRYPTODEV_OPS_H_ */ diff --git a/drivers/crypto/cnxk/cnxk_cryptodev.c b/drivers/crypto/cnxk/cnxk_cryptodev.c new file mode 100644 index 0000000..0ffe9d0 --- /dev/null +++ b/drivers/crypto/cnxk/cnxk_cryptodev.c @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#include "roc_cpt.h" + +#include "cnxk_cryptodev.h" + +int +cnxk_cpt_eng_grp_add(struct roc_cpt *roc_cpt) +{ + int ret; + + ret = roc_cpt_eng_grp_add(roc_cpt, CPT_ENG_TYPE_SE); + if (ret < 0) { + plt_err("Could not add CPT SE engines"); + return -ENOTSUP; + } + + ret = roc_cpt_eng_grp_add(roc_cpt, CPT_ENG_TYPE_IE); + if (ret < 0) { + plt_err("Could not add CPT IE engines"); + return -ENOTSUP; + } + + ret = roc_cpt_eng_grp_add(roc_cpt, CPT_ENG_TYPE_AE); + if (ret < 0) { + plt_err("Could not add CPT AE engines"); + return -ENOTSUP; + } + + return 0; +} diff --git a/drivers/crypto/cnxk/cnxk_cryptodev.h b/drivers/crypto/cnxk/cnxk_cryptodev.h new file mode 100644 index 0000000..769f784 --- /dev/null +++ b/drivers/crypto/cnxk/cnxk_cryptodev.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#ifndef _CNXK_CRYPTODEV_H_ +#define _CNXK_CRYPTODEV_H_ + +#include + +#include "roc_cpt.h" + +/* + * DP logs, toggled out at compile time if level lower than current level. + * DP logs would be logged under 'PMD' type. So for dynamic logging, the + * level of 'pmd' has to be used. + */ +#define CPT_LOG_DP(level, fmt, args...) RTE_LOG_DP(level, PMD, fmt "\n", ##args) + +#define CPT_LOG_DP_DEBUG(fmt, args...) CPT_LOG_DP(DEBUG, fmt, ##args) +#define CPT_LOG_DP_INFO(fmt, args...) CPT_LOG_DP(INFO, fmt, ##args) +#define CPT_LOG_DP_WARN(fmt, args...) CPT_LOG_DP(WARNING, fmt, ##args) +#define CPT_LOG_DP_ERR(fmt, args...) CPT_LOG_DP(ERR, fmt, ##args) + +/** + * Device private data + */ +struct cnxk_cpt_vf { + struct roc_cpt cpt; +}; + +int cnxk_cpt_eng_grp_add(struct roc_cpt *roc_cpt); + +#endif /* _CNXK_CRYPTODEV_H_ */ diff --git a/drivers/crypto/cnxk/meson.build b/drivers/crypto/cnxk/meson.build index 197b94c..4150ae6 100644 --- a/drivers/crypto/cnxk/meson.build +++ b/drivers/crypto/cnxk/meson.build @@ -10,7 +10,10 @@ endif sources = files( 'cn9k_cryptodev.c', + 'cn9k_cryptodev_ops.c', 'cn10k_cryptodev.c', + 'cn10k_cryptodev_ops.c', + 'cnxk_cryptodev.c', ) deps += ['bus_pci', 'common_cnxk']