From patchwork Sat May 8 07:40:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "humin (Q)" X-Patchwork-Id: 93056 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AF53BA0A0F; Sat, 8 May 2021 09:41:08 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3B34A40140; Sat, 8 May 2021 09:41:08 +0200 (CEST) Received: from szxga04-in.huawei.com (szxga04-in.huawei.com [45.249.212.190]) by mails.dpdk.org (Postfix) with ESMTP id 505534013F for ; Sat, 8 May 2021 09:41:05 +0200 (CEST) Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4FcfKy5cbWznbkc for ; Sat, 8 May 2021 15:37:42 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.498.0; Sat, 8 May 2021 15:40:55 +0800 From: "Min Hu (Connor)" To: CC: Date: Sat, 8 May 2021 15:40:57 +0800 Message-ID: <1620459657-38326-1-git-send-email-humin29@huawei.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH] net/hns3: fix TM QCN error event report by MSIX X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Chengwen Feng The TM QCN error event should report by RAS other than MSIX. Also this patch adds fifo int enable configuration before the TM QCN error event is enabled. Fixes: f53a793bb7c2 ("net/hns3: add more hardware error types") Fixes: 3903c05382c5 ("net/hns3: remove read when enabling TM QCN error event") Cc: stable@dpdk.org Signed-off-by: Chengwen Feng Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_intr.c | 5 ++++- drivers/net/hns3/hns3_intr.h | 2 ++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/net/hns3/hns3_intr.c b/drivers/net/hns3/hns3_intr.c index 905c6d9..6bdb17f 100644 --- a/drivers/net/hns3/hns3_intr.c +++ b/drivers/net/hns3/hns3_intr.c @@ -1783,8 +1783,11 @@ enable_tm_err_intr(struct hns3_adapter *hns, bool en) /* configure TM QCN hw errors */ hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_TM_QCN_MEM_INT_CFG, false); - if (en) + desc.data[0] = rte_cpu_to_le_32(HNS3_TM_QCN_ERR_INT_TYPE); + if (en) { + desc.data[0] |= rte_cpu_to_le_32(HNS3_TM_QCN_FIFO_INT_EN); desc.data[1] = rte_cpu_to_le_32(HNS3_TM_QCN_MEM_ERR_INT_EN); + } ret = hns3_cmd_send(hw, &desc, 1); if (ret) diff --git a/drivers/net/hns3/hns3_intr.h b/drivers/net/hns3/hns3_intr.h index 8bee8d7..1a0f196 100644 --- a/drivers/net/hns3/hns3_intr.h +++ b/drivers/net/hns3/hns3_intr.h @@ -77,6 +77,8 @@ #define HNS3_NCSI_ERR_INT_EN 0x3 #define HNS3_TM_SCH_ECC_ERR_INT_EN 0x3 +#define HNS3_TM_QCN_ERR_INT_TYPE 0x29 +#define HNS3_TM_QCN_FIFO_INT_EN 0xFFFF00 #define HNS3_TM_QCN_MEM_ERR_INT_EN 0xFFFFFF #define HNS3_RESET_PROCESS_MS 200