From patchwork Sat Apr 17 09:54:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "humin (Q)" X-Patchwork-Id: 91707 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C68D8A0562; Sat, 17 Apr 2021 11:55:04 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D0F38161EC3; Sat, 17 Apr 2021 11:54:54 +0200 (CEST) Received: from szxga04-in.huawei.com (szxga04-in.huawei.com [45.249.212.190]) by mails.dpdk.org (Postfix) with ESMTP id B30DC4068F for ; Sat, 17 Apr 2021 11:54:50 +0200 (CEST) Received: from DGGEMS408-HUB.china.huawei.com (unknown [172.30.72.59]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4FMpK86zGdz17R8L for ; Sat, 17 Apr 2021 17:52:28 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP Server id 14.3.498.0; Sat, 17 Apr 2021 17:54:45 +0800 From: "Min Hu (Connor)" To: CC: Date: Sat, 17 Apr 2021 17:54:54 +0800 Message-ID: <1618653299-40380-3-git-send-email-humin29@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1618653299-40380-1-git-send-email-humin29@huawei.com> References: <1618653299-40380-1-git-send-email-humin29@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH 2/7] net/hns3: Rx vector add compile-time verify X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Chengwen Feng According the Rx vector implement, it depends on the MBUF's fields (such as rearm_data/rx_descriptor_fields1) layout, this patch adds compile-time verifies with this. Signed-off-by: Chengwen Feng Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_rxtx_vec.c | 22 ++++++++++++++++++++++ drivers/net/hns3/hns3_rxtx_vec_neon.h | 8 ++++++++ drivers/net/hns3/hns3_rxtx_vec_sve.c | 6 ++++++ 3 files changed, 36 insertions(+) diff --git a/drivers/net/hns3/hns3_rxtx_vec.c b/drivers/net/hns3/hns3_rxtx_vec.c index 08a86e0..dc1e1ae 100644 --- a/drivers/net/hns3/hns3_rxtx_vec.c +++ b/drivers/net/hns3/hns3_rxtx_vec.c @@ -147,6 +147,28 @@ hns3_rxq_vec_setup_rearm_data(struct hns3_rx_queue *rxq) mb_def.port = rxq->port_id; rte_mbuf_refcnt_set(&mb_def, 1); + /* compile-time verifies the rearm_data first 8bytes */ + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_off) < + offsetof(struct rte_mbuf, rearm_data)); + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, refcnt) < + offsetof(struct rte_mbuf, rearm_data)); + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, refcnt) < + offsetof(struct rte_mbuf, rearm_data)); + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, nb_segs) < + offsetof(struct rte_mbuf, rearm_data)); + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, port) < + offsetof(struct rte_mbuf, rearm_data)); + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_off) - + offsetof(struct rte_mbuf, rearm_data) > 6); + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, refcnt) - + offsetof(struct rte_mbuf, rearm_data) > 6); + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, refcnt) - + offsetof(struct rte_mbuf, rearm_data) > 6); + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, nb_segs) - + offsetof(struct rte_mbuf, rearm_data) > 6); + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, port) - + offsetof(struct rte_mbuf, rearm_data) > 6); + /* prevent compiler reordering: rearm_data covers previous fields */ rte_compiler_barrier(); p = (uintptr_t)&mb_def.rearm_data; diff --git a/drivers/net/hns3/hns3_rxtx_vec_neon.h b/drivers/net/hns3/hns3_rxtx_vec_neon.h index 14d6fb0..69af7b3 100644 --- a/drivers/net/hns3/hns3_rxtx_vec_neon.h +++ b/drivers/net/hns3/hns3_rxtx_vec_neon.h @@ -161,6 +161,14 @@ hns3_recv_burst_vec(struct hns3_rx_queue *__restrict rxq, 0, 0, 0, /* ignore non-length fields */ }; + /* compile-time verifies the shuffle mask */ + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, pkt_len) != + offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4); + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_len) != + offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8); + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, hash.rss) != + offsetof(struct rte_mbuf, rx_descriptor_fields1) + 12); + for (pos = 0; pos < nb_pkts; pos += HNS3_DEFAULT_DESCS_PER_LOOP, rxdp += HNS3_DEFAULT_DESCS_PER_LOOP) { uint64x2x2_t descs[HNS3_DEFAULT_DESCS_PER_LOOP]; diff --git a/drivers/net/hns3/hns3_rxtx_vec_sve.c b/drivers/net/hns3/hns3_rxtx_vec_sve.c index 2eaf692..1fd87ca 100644 --- a/drivers/net/hns3/hns3_rxtx_vec_sve.c +++ b/drivers/net/hns3/hns3_rxtx_vec_sve.c @@ -122,6 +122,12 @@ hns3_recv_burst_vec_sve(struct hns3_rx_queue *__restrict rxq, svuint32_t rss_tbl1 = svld1_u32(PG32_256BIT, rss_adjust); svuint32_t rss_tbl2 = svld1_u32(PG32_256BIT, &rss_adjust[8]); + /* compile-time verifies the xlen_adjust mask */ + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_len) != + offsetof(struct rte_mbuf, pkt_len) + 4); + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, vlan_tci) != + offsetof(struct rte_mbuf, data_len) + 2); + for (pos = 0; pos < nb_pkts; pos += HNS3_SVE_DEFAULT_DESCS_PER_LOOP, rxdp += HNS3_SVE_DEFAULT_DESCS_PER_LOOP) { svuint64_t vld_clz, mbp1st, mbp2st, mbuf_init;